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https://github.com/edk2-porting/linux-next.git
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Merge branch 'pci/host-tegra' into next
* pci/host-tegra: PCI: tegra: Do not allocate MSI target memory PCI: tegra: Support MSI 64-bit addressing
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1fb3d7d5e1
@ -233,8 +233,8 @@ struct tegra_msi {
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struct msi_controller chip;
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DECLARE_BITMAP(used, INT_PCI_MSI_NR);
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struct irq_domain *domain;
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unsigned long pages;
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struct mutex lock;
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u64 phys;
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int irq;
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};
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@ -1448,9 +1448,8 @@ static int tegra_msi_setup_irq(struct msi_controller *chip,
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irq_set_msi_desc(irq, desc);
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msg.address_lo = virt_to_phys((void *)msi->pages);
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/* 32 bit address only */
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msg.address_hi = 0;
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msg.address_lo = lower_32_bits(msi->phys);
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msg.address_hi = upper_32_bits(msi->phys);
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msg.data = hwirq;
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pci_write_msi_msg(irq, &msg);
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@ -1499,7 +1498,6 @@ static int tegra_pcie_enable_msi(struct tegra_pcie *pcie)
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const struct tegra_pcie_soc *soc = pcie->soc;
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struct tegra_msi *msi = &pcie->msi;
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struct device *dev = pcie->dev;
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unsigned long base;
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int err;
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u32 reg;
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@ -1531,12 +1529,25 @@ static int tegra_pcie_enable_msi(struct tegra_pcie *pcie)
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goto err;
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}
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/* setup AFI/FPCI range */
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msi->pages = __get_free_pages(GFP_KERNEL, 0);
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base = virt_to_phys((void *)msi->pages);
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/*
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* The PCI host bridge on Tegra contains some logic that intercepts
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* MSI writes, which means that the MSI target address doesn't have
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* to point to actual physical memory. Rather than allocating one 4
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* KiB page of system memory that's never used, we can simply pick
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* an arbitrary address within an area reserved for system memory
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* in the FPCI address map.
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*
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* However, in order to avoid confusion, we pick an address that
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* doesn't map to physical memory. The FPCI address map reserves a
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* 1012 GiB region for system memory and memory-mapped I/O. Since
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* none of the Tegra SoCs that contain this PCI host bridge can
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* address more than 16 GiB of system memory, the last 4 KiB of
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* these 1012 GiB is a good candidate.
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*/
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msi->phys = 0xfcfffff000;
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afi_writel(pcie, base >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST);
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afi_writel(pcie, base, AFI_MSI_AXI_BAR_ST);
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afi_writel(pcie, msi->phys >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST);
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afi_writel(pcie, msi->phys, AFI_MSI_AXI_BAR_ST);
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/* this register is in 4K increments */
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afi_writel(pcie, 1, AFI_MSI_BAR_SZ);
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@ -1585,8 +1596,6 @@ static int tegra_pcie_disable_msi(struct tegra_pcie *pcie)
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afi_writel(pcie, 0, AFI_MSI_EN_VEC6);
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afi_writel(pcie, 0, AFI_MSI_EN_VEC7);
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free_pages(msi->pages, 0);
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if (msi->irq > 0)
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free_irq(msi->irq, pcie);
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