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powerpc/83xx: Add power management support for MPC83xx QE boards
Simply add power management controller nodes and sleep properties. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -59,6 +59,13 @@
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reg = <0xe0000000 0x00000200>;
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bus-frequency = <0>; /* Filled in by U-Boot */
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pmc: power@b00 {
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compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
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reg = <0xb00 0x100 0xa00 0x100>;
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interrupts = <80 0x8>;
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interrupt-parent = <&ipic>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -79,6 +79,13 @@
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reg = <0x200 0x100>;
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};
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pmc: power@b00 {
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compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
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reg = <0xb00 0x100 0xa00 0x100>;
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interrupts = <80 0x8>;
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interrupt-parent = <&ipic>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -163,6 +170,7 @@
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0x4c>;
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fsl,descriptor-types-mask = <0x0122003f>;
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sleep = <&pmc 0x03000000>;
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};
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ipic: pic@700 {
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@ -428,5 +436,6 @@
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0xe0008300 0x8>; /* config space access registers */
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compatible = "fsl,mpc8349-pci";
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device_type = "pci";
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sleep = <&pmc 0x00010000>;
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};
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};
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@ -62,6 +62,13 @@
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reg = <0x200 0x100>;
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};
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pmc: power@b00 {
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compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
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reg = <0xb00 0x100 0xa00 0x100>;
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interrupts = <80 0x8>;
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interrupt-parent = <&ipic>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -141,6 +148,7 @@
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0x4c>;
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fsl,descriptor-types-mask = <0x0122003f>;
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sleep = <&pmc 0x03000000>;
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};
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ipic:pic@700 {
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@ -360,5 +368,6 @@
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0xe0008300 0x8>; /* config space access registers */
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compatible = "fsl,mpc8349-pci";
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device_type = "pci";
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sleep = <&pmc 0x00010000>;
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};
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};
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@ -99,6 +99,13 @@
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reg = <0x200 0x100>;
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};
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pmc: power@b00 {
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compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
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reg = <0xb00 0x100 0xa00 0x100>;
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interrupts = <80 0x8>;
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interrupt-parent = <&ipic>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -194,6 +201,7 @@
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0x7e>;
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fsl,descriptor-types-mask = <0x01010ebf>;
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sleep = <&pmc 0x03000000>;
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};
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ipic: pic@700 {
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@ -470,5 +478,6 @@
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0xe0008300 0x8>; /* config space access registers */
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compatible = "fsl,mpc8349-pci";
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device_type = "pci";
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sleep = <&pmc 0x00010000>;
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};
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};
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@ -71,6 +71,13 @@
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reg = <0x200 0x100>;
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};
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pmc: power@b00 {
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compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
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reg = <0xb00 0x100 0xa00 0x100>;
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interrupts = <80 0x8>;
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interrupt-parent = <&ipic>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -161,6 +168,7 @@
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0x7e>;
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fsl,descriptor-types-mask = <0x01010ebf>;
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sleep = <&pmc 0x03000000>;
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};
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ipic: interrupt-controller@700 {
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@ -455,6 +463,7 @@
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0xa800 0 0 2 &ipic 20 8
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0xa800 0 0 3 &ipic 21 8
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0xa800 0 0 4 &ipic 18 8>;
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sleep = <&pmc 0x00010000>;
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/* filled by u-boot */
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bus-range = <0 0>;
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clock-frequency = <0>;
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