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Merge branch 'pci/virtualization'
- Add ACS quirks for Zhaoxin Root Ports, Downstream Ports, and multi-function devices (Raymond Pang) * pci/virtualization: PCI: Add ACS quirk for Zhaoxin Root/Downstream Ports PCI: Add ACS quirk for Zhaoxin multi-function devices PCI: Add Zhaoxin Vendor ID
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commit
1ee57ad69e
@ -4465,6 +4465,29 @@ static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags)
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PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
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}
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/*
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* Many Zhaoxin Root Ports and Switch Downstream Ports have no ACS capability.
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* But the implementation could block peer-to-peer transactions between them
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* and provide ACS-like functionality.
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*/
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static int pci_quirk_zhaoxin_pcie_ports_acs(struct pci_dev *dev, u16 acs_flags)
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{
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if (!pci_is_pcie(dev) ||
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((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
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(pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
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return -ENOTTY;
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switch (dev->device) {
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case 0x0710 ... 0x071e:
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case 0x0721:
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case 0x0723 ... 0x0732:
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return pci_acs_ctrl_enabled(acs_flags,
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PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
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}
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return false;
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}
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/*
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* Many Intel PCH Root Ports do provide ACS-like features to disable peer
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* transactions and validate bus numbers in requests, but do not provide an
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@ -4767,6 +4790,12 @@ static const struct pci_dev_acs_enabled {
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{ PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
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/* Amazon Annapurna Labs */
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{ PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, pci_quirk_al_acs },
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/* Zhaoxin multi-function devices */
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{ PCI_VENDOR_ID_ZHAOXIN, 0x3038, pci_quirk_mf_endpoint_acs },
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{ PCI_VENDOR_ID_ZHAOXIN, 0x3104, pci_quirk_mf_endpoint_acs },
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{ PCI_VENDOR_ID_ZHAOXIN, 0x9083, pci_quirk_mf_endpoint_acs },
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/* Zhaoxin Root/Downstream Ports */
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{ PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs },
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{ 0 }
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};
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@ -2583,6 +2583,8 @@
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#define PCI_VENDOR_ID_AMAZON 0x1d0f
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#define PCI_VENDOR_ID_ZHAOXIN 0x1d17
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#define PCI_VENDOR_ID_HYGON 0x1d94
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#define PCI_VENDOR_ID_HXT 0x1dbf
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