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ARM: OMAP: am33xx: Update common OMAP machine specific sources
This patch updates the common machine specific source files for support for AM33XX/AM335x with cpu type, macros for identification of AM33XX/AM335X device. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> [tony@atomide.com: updated for map_io and common.h changes, dropped CK_AM33XX] Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -3517,6 +3517,8 @@ int __init omap3xxx_clk_init(void)
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} else if (cpu_is_ti816x()) {
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cpu_mask = RATE_IN_TI816X;
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cpu_clkflg = CK_TI816X;
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} else if (cpu_is_am33xx()) {
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cpu_mask = RATE_IN_AM33XX;
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} else if (cpu_is_omap34xx()) {
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if (omap_rev() == OMAP3430_REV_ES1_0) {
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cpu_mask = RATE_IN_3430ES1;
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@ -128,6 +128,27 @@ void __init omap2_set_globals_ti816x(void)
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{
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__omap2_set_globals(&ti816x_globals);
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}
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#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \
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TI816X_CONTROL_DEVICE_ID - 0x204)
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static struct omap_globals am33xx_globals = {
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.class = AM335X_CLASS,
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.tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE),
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.ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
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.prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
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.cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
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};
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void __init omap2_set_globals_am33xx(void)
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{
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__omap2_set_globals(&am33xx_globals);
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}
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void __init am33xx_map_io(void)
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{
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omapam33xx_map_common_io();
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP4)
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@ -60,6 +60,14 @@ static inline void omapti816x_map_common_io(void)
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}
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#endif
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#ifdef CONFIG_SOC_OMAPAM33XX
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extern void omapam33xx_map_common_io(void);
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#else
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static inline void omapam33xx_map_common_io(void)
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{
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}
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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extern void omap44xx_map_common_io(void);
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#else
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@ -107,6 +115,7 @@ void omap2_set_globals_243x(void);
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void omap2_set_globals_3xxx(void);
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void omap2_set_globals_443x(void);
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void omap2_set_globals_ti816x(void);
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void omap2_set_globals_am33xx(void);
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/* These get called from omap2_set_globals_xxxx(), do not call these */
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void omap2_set_globals_tap(struct omap_globals *);
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@ -117,6 +126,7 @@ void omap2_set_globals_prcm(struct omap_globals *);
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void omap242x_map_io(void);
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void omap243x_map_io(void);
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void omap3_map_io(void);
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void am33xx_map_io(void);
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void omap4_map_io(void);
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/**
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@ -340,6 +340,10 @@ static void __init omap3_check_revision(const char **cpu_rev)
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break;
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}
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break;
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case 0xb944:
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omap_revision = AM335X_REV_ES1_0;
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*cpu_rev = "1.0";
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break;
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default:
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/* Unknown default to latest silicon rev as default */
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omap_revision = OMAP3630_REV_ES1_2;
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@ -432,6 +436,8 @@ static void __init omap3_cpuinfo(const char *cpu_rev)
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cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
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} else if (cpu_is_ti816x()) {
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cpu_name = "TI816X";
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} else if (cpu_is_am335x()) {
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cpu_name = "AM335X";
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} else if (omap3_has_iva() && omap3_has_sgx()) {
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/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
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cpu_name = "OMAP3430/3530";
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@ -178,12 +178,29 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
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#ifdef CONFIG_SOC_OMAPTI816X
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static struct map_desc omapti816x_io_desc[] __initdata = {
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{
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.virtual = L4_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_34XX_PHYS),
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.length = L4_34XX_SIZE,
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.type = MT_DEVICE
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}
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};
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#endif
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#ifdef CONFIG_SOC_OMAPAM33XX
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static struct map_desc omapam33xx_io_desc[] __initdata = {
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{
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.virtual = L4_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_34XX_PHYS),
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.length = L4_34XX_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = L4_WK_AM33XX_VIRT,
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.pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
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.length = L4_WK_AM33XX_SIZE,
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.type = MT_DEVICE
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}
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};
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#endif
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@ -270,6 +287,13 @@ void __init omapti816x_map_common_io(void)
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}
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#endif
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#ifdef CONFIG_SOC_OMAPAM33XX
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void __init omapam33xx_map_common_io(void)
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{
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iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
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}
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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void __init omap44xx_map_common_io(void)
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{
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@ -464,7 +464,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
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mod_timer(&uart->timer, jiffies + uart->timeout);
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omap_uart_smart_idle_enable(uart, 0);
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if (cpu_is_omap34xx() && !cpu_is_ti816x()) {
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if (cpu_is_omap34xx() && !(cpu_is_ti816x() || cpu_is_am33xx())) {
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u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
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u32 wk_mask = 0;
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u32 padconf = 0;
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@ -828,7 +828,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
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}
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/* Enable the MDR1 errata for OMAP3 */
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if (cpu_is_omap34xx() && !cpu_is_ti816x())
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if (cpu_is_omap34xx() && !(cpu_is_ti816x() || cpu_is_am33xx()))
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uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
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}
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@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_device.o
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obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
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obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
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obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
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obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
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obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
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25
arch/arm/plat-omap/include/plat/am33xx.h
Normal file
25
arch/arm/plat-omap/include/plat/am33xx.h
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@ -0,0 +1,25 @@
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/*
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* This file contains the address info for various AM33XX modules.
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*
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* Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_ARCH_AM33XX_H
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#define __ASM_ARCH_AM33XX_H
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#define L4_SLOW_AM33XX_BASE 0x48000000
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#define AM33XX_SCM_BASE 0x44E10000
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#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
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#define AM33XX_PRCM_BASE 0x44E00000
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#endif /* __ASM_ARCH_AM33XX_H */
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@ -287,5 +287,6 @@
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#include <plat/omap34xx.h>
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#include <plat/omap44xx.h>
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#include <plat/ti816x.h>
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#include <plat/am33xx.h>
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#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
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@ -73,6 +73,9 @@
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#define OMAP4_L3_IO_OFFSET 0xb4000000
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#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
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#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
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#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
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#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
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#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
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@ -153,6 +156,15 @@
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#define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
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/*
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* ----------------------------------------------------------------------------
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* AM33XX specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
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#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
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#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
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/*
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* Need to look at the Size 4M for L4.
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* VPOM3430 was not working for Int controller
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#define L4_EMU_34XX_BASE 0x54000000
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#define L3_34XX_BASE 0x68000000
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#define L4_WK_AM33XX_BASE 0x44C00000
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#define OMAP3430_32KSYNCT_BASE 0x48320000
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#define OMAP3430_CM_BASE 0x48004800
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#define OMAP3430_PRM_BASE 0x48306800
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