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ARM: dts: SAMSUNG: Add aliases of UART nodes

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This patch adds alias entries for UART nodes of all SoCs using
samsung-uart compatible UART controllers, so that the dependency on
probe order is removed and deterministic device naming is assured.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Tomasz Figa 2014-06-26 13:24:35 +02:00 committed by Greg Kroah-Hartman
parent 13a9f6c64f
commit 1e64f48ea7
9 changed files with 50 additions and 14 deletions
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2
arch/arm/boot/dts/exynos3250.dtsi
View File

@ -39,6 +39,8 @@
i2c5 = &i2c_5;
i2c6 = &i2c_6;
i2c7 = &i2c_7;
serial0 = &serial_0;
serial1 = &serial_1;
};
cpus {

12
arch/arm/boot/dts/exynos4.dtsi
View File

@ -44,6 +44,10 @@
fimc1 = &fimc_1;
fimc2 = &fimc_2;
fimc3 = &fimc_3;
serial0 = &serial_0;
serial1 = &serial_1;
serial2 = &serial_2;
serial3 = &serial_3;
};
clock_audss: clock-controller@03810000 {
@ -363,7 +367,7 @@
status = "disabled";
};
serial@13800000 {
serial_0: serial@13800000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13800000 0x100>;
interrupts = <0 52 0>;
@ -372,7 +376,7 @@
status = "disabled";
};
serial@13810000 {
serial_1: serial@13810000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13810000 0x100>;
interrupts = <0 53 0>;
@ -381,7 +385,7 @@
status = "disabled";
};
serial@13820000 {
serial_2: serial@13820000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13820000 0x100>;
interrupts = <0 54 0>;
@ -390,7 +394,7 @@
status = "disabled";
};
serial@13830000 {
serial_3: serial@13830000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13830000 0x100>;
interrupts = <0 55 0>;

15
arch/arm/boot/dts/exynos5.dtsi
View File

@ -18,6 +18,13 @@
/ {
interrupt-parent = <&gic>;
aliases {
serial0 = &serial_0;
serial1 = &serial_1;
serial2 = &serial_2;
serial3 = &serial_3;
};
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
@ -50,25 +57,25 @@
interrupts = <1 9 0xf04>;
};
serial@12C00000 {
serial_0: serial@12C00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
interrupts = <0 51 0>;
};
serial@12C10000 {
serial_1: serial@12C10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
interrupts = <0 52 0>;
};
serial@12C20000 {
serial_2: serial@12C20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
interrupts = <0 53 0>;
};
serial@12C30000 {
serial_3: serial@12C30000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>;
interrupts = <0 54 0>;

4
arch/arm/boot/dts/exynos5260.dtsi
View File

@ -21,6 +21,10 @@
pinctrl0 = &pinctrl_0;
pinctrl1 = &pinctrl_1;
pinctrl2 = &pinctrl_2;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
cpus {

6
arch/arm/boot/dts/exynos5410.dtsi
View File

@ -20,6 +20,12 @@
compatible = "samsung,exynos5410", "samsung,exynos5";
interrupt-parent = <&gic>;
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;

6
arch/arm/boot/dts/exynos5440.dtsi
View File

@ -18,6 +18,8 @@
interrupt-parent = <&gic>;
aliases {
serial0 = &serial_0;
serial1 = &serial_1;
spi0 = &spi_0;
tmuctrl0 = &tmuctrl_0;
tmuctrl1 = &tmuctrl_1;
@ -102,7 +104,7 @@
>;
};
serial@B0000 {
serial_0: serial@B0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xB0000 0x1000>;
interrupts = <0 2 0>;
@ -110,7 +112,7 @@
clock-names = "uart", "clk_uart_baud0";
};
serial@C0000 {
serial_1: serial@C0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xC0000 0x1000>;
interrupts = <0 3 0>;

6
arch/arm/boot/dts/s3c2416.dtsi
View File

@ -16,6 +16,10 @@
model = "Samsung S3C2416 SoC";
compatible = "samsung,s3c2416";
aliases {
serial3 = &uart3;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@ -68,7 +72,7 @@
<&clocks SCLK_UART>;
};
serial@5000C000 {
uart3: serial@5000C000 {
compatible = "samsung,s3c2440-uart";
reg = <0x5000C000 0x4000>;
interrupts = <1 18 24 4>, <1 18 25 4>;

9
arch/arm/boot/dts/s3c24xx.dtsi
View File

@ -16,6 +16,9 @@
aliases {
pinctrl0 = &pinctrl_0;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
};
intc:interrupt-controller@4a000000 {
@ -46,21 +49,21 @@
#pwm-cells = <4>;
};
serial@50000000 {
uart0: serial@50000000 {
compatible = "samsung,s3c2410-uart";
reg = <0x50000000 0x4000>;
interrupts = <1 28 0 4>, <1 28 1 4>;
status = "disabled";
};
serial@50004000 {
uart1: serial@50004000 {
compatible = "samsung,s3c2410-uart";
reg = <0x50004000 0x4000>;
interrupts = <1 23 3 4>, <1 23 4 4>;
status = "disabled";
};
serial@50008000 {
uart2: serial@50008000 {
compatible = "samsung,s3c2410-uart";
reg = <0x50008000 0x4000>;
interrupts = <1 15 6 4>, <1 15 7 4>;

4
arch/arm/boot/dts/s3c64xx.dtsi
View File

@ -23,6 +23,10 @@
aliases {
i2c0 = &i2c0;
pinctrl0 = &pinctrl0;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
cpus {