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ARM: dts: use macros in clock bindings for exynos5420
The patch replaces magic numbers with macros defined in DT header in exynos5420 clock bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Andrzej Hajda
Kukjin Kim
parent
fe273c3e6f
commit
1dd4e5991c
@ -13,184 +13,12 @@ Required Properties:
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- #clock-cells: should be 1.
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The following is the list of clocks generated by the controller. Each clock is
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assigned an identifier and client nodes use this identifier to specify the
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clock which they consume.
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume.
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[Core Clocks]
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Clock ID
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----------------------------
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fin_pll 1
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[Clock Gate for Special Clocks]
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Clock ID
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----------------------------
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sclk_uart0 128
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sclk_uart1 129
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sclk_uart2 130
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sclk_uart3 131
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sclk_mmc0 132
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sclk_mmc1 133
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sclk_mmc2 134
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sclk_spi0 135
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sclk_spi1 136
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sclk_spi2 137
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sclk_i2s1 138
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sclk_i2s2 139
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sclk_pcm1 140
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sclk_pcm2 141
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sclk_spdif 142
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sclk_hdmi 143
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sclk_pixel 144
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sclk_dp1 145
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sclk_mipi1 146
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sclk_fimd1 147
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sclk_maudio0 148
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sclk_maupcm0 149
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sclk_usbd300 150
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sclk_usbd301 151
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sclk_usbphy300 152
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sclk_usbphy301 153
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sclk_unipro 154
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sclk_pwm 155
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sclk_gscl_wa 156
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sclk_gscl_wb 157
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sclk_hdmiphy 158
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[Peripheral Clock Gates]
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Clock ID
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----------------------------
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aclk66_peric 256
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uart0 257
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uart1 258
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uart2 259
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uart3 260
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i2c0 261
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i2c1 262
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i2c2 263
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i2c3 264
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i2c4 265
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i2c5 266
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i2c6 267
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i2c7 268
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i2c_hdmi 269
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tsadc 270
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spi0 271
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spi1 272
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spi2 273
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keyif 274
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i2s1 275
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i2s2 276
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pcm1 277
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pcm2 278
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pwm 279
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spdif 280
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i2c8 281
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i2c9 282
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i2c10 283
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aclk66_psgen 300
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chipid 301
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sysreg 302
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tzpc0 303
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tzpc1 304
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tzpc2 305
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tzpc3 306
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tzpc4 307
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tzpc5 308
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tzpc6 309
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tzpc7 310
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tzpc8 311
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tzpc9 312
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hdmi_cec 313
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seckey 314
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mct 315
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wdt 316
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rtc 317
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tmu 318
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tmu_gpu 319
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pclk66_gpio 330
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aclk200_fsys2 350
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mmc0 351
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mmc1 352
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mmc2 353
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sromc 354
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ufs 355
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aclk200_fsys 360
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tsi 361
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pdma0 362
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pdma1 363
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rtic 364
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usbh20 365
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usbd300 366
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usbd301 377
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aclk400_mscl 380
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mscl0 381
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mscl1 382
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mscl2 383
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smmu_mscl0 384
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smmu_mscl1 385
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smmu_mscl2 386
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aclk333 400
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mfc 401
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smmu_mfcl 402
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smmu_mfcr 403
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aclk200_disp1 410
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dsim1 411
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dp1 412
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hdmi 413
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aclk300_disp1 420
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fimd1 421
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smmu_fimd1 422
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aclk166 430
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mixer 431
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aclk266 440
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rotator 441
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mdma1 442
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smmu_rotator 443
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smmu_mdma1 444
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aclk300_jpeg 450
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jpeg 451
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jpeg2 452
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smmu_jpeg 453
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aclk300_gscl 460
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smmu_gscl0 461
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smmu_gscl1 462
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gscl_wa 463
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gscl_wb 464
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gscl0 465
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gscl1 466
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clk_3aa 467
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aclk266_g2d 470
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sss 471
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slim_sss 472
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mdma0 473
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aclk333_g2d 480
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g2d 481
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aclk333_432_gscl 490
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smmu_3aa 491
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smmu_fimcl0 492
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smmu_fimcl1 493
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smmu_fimcl3 494
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fimc_lite3 495
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aclk_g3d 500
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g3d 501
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smmu_mixer 502
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Mux ID
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----------------------------
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mout_hdmi 640
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Divider ID
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----------------------------
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dout_pixel 768
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All available clocks are defined as preprocessor macros in
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dt-bindings/clock/exynos5420.h header and can be used in device
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tree sources.
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Example 1: An example of a clock controller node is listed below.
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@ -208,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
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compatible = "samsung,exynos4210-uart";
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reg = <0x13820000 0x100>;
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interrupts = <0 54 0>;
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clocks = <&clock 259>, <&clock 130>;
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clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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clock-names = "uart", "clk_uart_baud0";
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};
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@ -13,6 +13,7 @@
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/clock/exynos5420.h>
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#include "exynos5.dtsi"
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#include "exynos5420-pinctrl.dtsi"
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@ -119,7 +120,8 @@
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compatible = "samsung,exynos5420-audss-clock";
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reg = <0x03810000 0x0C>;
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#clock-cells = <1>;
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clocks = <&clock 1>, <&clock 5>, <&clock 148>, <&clock 149>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
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<&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
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clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
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};
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@ -127,7 +129,7 @@
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compatible = "samsung,mfc-v7";
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reg = <0x11000000 0x10000>;
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interrupts = <0 96 0>;
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clocks = <&clock 401>;
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clocks = <&clock CLK_MFC>;
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clock-names = "mfc";
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};
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@ -137,7 +139,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x12200000 0x2000>;
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clocks = <&clock 351>, <&clock 132>;
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clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x40>;
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status = "disabled";
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@ -149,7 +151,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x12210000 0x2000>;
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clocks = <&clock 352>, <&clock 133>;
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clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x40>;
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status = "disabled";
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@ -161,7 +163,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x12220000 0x1000>;
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clocks = <&clock 353>, <&clock 134>;
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clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x40>;
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status = "disabled";
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@ -175,7 +177,7 @@
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interrupt-parent = <&mct_map>;
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interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
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<8>, <9>, <10>, <11>;
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clocks = <&clock 1>, <&clock 315>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
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clock-names = "fin_pll", "mct";
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mct_map: mct-map {
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@ -269,7 +271,7 @@
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};
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rtc@101E0000 {
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clocks = <&clock 317>;
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clocks = <&clock CLK_RTC>;
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clock-names = "rtc";
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status = "disabled";
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};
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@ -296,7 +298,7 @@
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x121A0000 0x1000>;
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interrupts = <0 34 0>;
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clocks = <&clock 362>;
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clocks = <&clock CLK_PDMA0>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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@ -307,7 +309,7 @@
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x121B0000 0x1000>;
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interrupts = <0 35 0>;
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clocks = <&clock 363>;
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clocks = <&clock CLK_PDMA1>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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@ -318,7 +320,7 @@
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x10800000 0x1000>;
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interrupts = <0 33 0>;
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clocks = <&clock 473>;
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clocks = <&clock CLK_MDMA0>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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@ -329,7 +331,7 @@
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x11C10000 0x1000>;
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interrupts = <0 124 0>;
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clocks = <&clock 442>;
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clocks = <&clock CLK_MDMA1>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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@ -360,7 +362,7 @@
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dmas = <&pdma1 12
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&pdma1 11>;
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dma-names = "tx", "rx";
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clocks = <&clock 275>, <&clock 138>;
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clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
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clock-names = "iis", "i2s_opclk0";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1_bus>;
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@ -373,7 +375,7 @@
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dmas = <&pdma0 12
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&pdma0 11>;
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dma-names = "tx", "rx";
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clocks = <&clock 276>, <&clock 139>;
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clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
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clock-names = "iis", "i2s_opclk0";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s2_bus>;
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@ -391,7 +393,7 @@
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_bus>;
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clocks = <&clock 271>, <&clock 135>;
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clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
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clock-names = "spi", "spi_busclk0";
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status = "disabled";
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};
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@ -407,7 +409,7 @@
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_bus>;
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clocks = <&clock 272>, <&clock 136>;
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clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
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clock-names = "spi", "spi_busclk0";
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status = "disabled";
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};
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@ -423,28 +425,28 @@
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi2_bus>;
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clocks = <&clock 273>, <&clock 137>;
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clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
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clock-names = "spi", "spi_busclk0";
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status = "disabled";
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};
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serial@12C00000 {
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clocks = <&clock 257>, <&clock 128>;
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clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@12C10000 {
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clocks = <&clock 258>, <&clock 129>;
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clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@12C20000 {
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clocks = <&clock 259>, <&clock 130>;
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clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@12C30000 {
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clocks = <&clock 260>, <&clock 131>;
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clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
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clock-names = "uart", "clk_uart_baud0";
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};
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@ -453,7 +455,7 @@
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reg = <0x12dd0000 0x100>;
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samsung,pwm-outputs = <0>, <1>, <2>, <3>;
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#pwm-cells = <3>;
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clocks = <&clock 279>;
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clocks = <&clock CLK_PWM>;
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clock-names = "timers";
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};
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@ -464,7 +466,7 @@
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};
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dp-controller@145B0000 {
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clocks = <&clock 412>;
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clocks = <&clock CLK_DP1>;
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clock-names = "dp";
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phys = <&dp_phy>;
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phy-names = "dp";
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@ -472,7 +474,7 @@
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fimd@14400000 {
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samsung,power-domain = <&disp_pd>;
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clocks = <&clock 147>, <&clock 421>;
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clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
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clock-names = "sclk_fimd", "fimd";
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};
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@ -480,7 +482,7 @@
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compatible = "samsung,exynos-adc-v2";
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reg = <0x12D10000 0x100>, <0x10040720 0x4>;
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interrupts = <0 106 0>;
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clocks = <&clock 270>;
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clocks = <&clock CLK_TSADC>;
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clock-names = "adc";
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#io-channel-cells = <1>;
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io-channel-ranges;
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@ -493,7 +495,7 @@
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interrupts = <0 56 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 261>;
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clocks = <&clock CLK_I2C0>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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@ -506,7 +508,7 @@
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interrupts = <0 57 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 262>;
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clocks = <&clock CLK_I2C1>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_bus>;
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@ -519,7 +521,7 @@
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interrupts = <0 58 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 263>;
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clocks = <&clock CLK_I2C2>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_bus>;
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@ -532,7 +534,7 @@
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interrupts = <0 59 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 264>;
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clocks = <&clock CLK_I2C3>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_bus>;
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@ -547,7 +549,7 @@
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_hs_bus>;
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clocks = <&clock 265>;
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clocks = <&clock CLK_I2C4>;
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clock-names = "hsi2c";
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status = "disabled";
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};
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@ -560,7 +562,7 @@
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5_hs_bus>;
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clocks = <&clock 266>;
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clocks = <&clock CLK_I2C5>;
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clock-names = "hsi2c";
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status = "disabled";
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};
|
||||
@ -573,7 +575,7 @@
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c6_hs_bus>;
|
||||
clocks = <&clock 267>;
|
||||
clocks = <&clock CLK_I2C6>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -586,7 +588,7 @@
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c7_hs_bus>;
|
||||
clocks = <&clock 268>;
|
||||
clocks = <&clock CLK_I2C7>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -599,7 +601,7 @@
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c8_hs_bus>;
|
||||
clocks = <&clock 281>;
|
||||
clocks = <&clock CLK_I2C8>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -612,7 +614,7 @@
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c9_hs_bus>;
|
||||
clocks = <&clock 282>;
|
||||
clocks = <&clock CLK_I2C9>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -625,7 +627,7 @@
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c10_hs_bus>;
|
||||
clocks = <&clock 283>;
|
||||
clocks = <&clock CLK_I2C10>;
|
||||
clock-names = "hsi2c";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -634,8 +636,9 @@
|
||||
compatible = "samsung,exynos4212-hdmi";
|
||||
reg = <0x14530000 0x70000>;
|
||||
interrupts = <0 95 0>;
|
||||
clocks = <&clock 413>, <&clock 143>, <&clock 768>,
|
||||
<&clock 158>, <&clock 640>;
|
||||
clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
|
||||
<&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
|
||||
<&clock CLK_MOUT_HDMI>;
|
||||
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
|
||||
"sclk_hdmiphy", "mout_hdmi";
|
||||
status = "disabled";
|
||||
@ -645,7 +648,7 @@
|
||||
compatible = "samsung,exynos5420-mixer";
|
||||
reg = <0x14450000 0x10000>;
|
||||
interrupts = <0 94 0>;
|
||||
clocks = <&clock 431>, <&clock 143>;
|
||||
clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
|
||||
clock-names = "mixer", "sclk_hdmi";
|
||||
};
|
||||
|
||||
@ -653,7 +656,7 @@
|
||||
compatible = "samsung,exynos5-gsc";
|
||||
reg = <0x13e00000 0x1000>;
|
||||
interrupts = <0 85 0>;
|
||||
clocks = <&clock 465>;
|
||||
clocks = <&clock CLK_GSCL0>;
|
||||
clock-names = "gscl";
|
||||
samsung,power-domain = <&gsc_pd>;
|
||||
};
|
||||
@ -662,7 +665,7 @@
|
||||
compatible = "samsung,exynos5-gsc";
|
||||
reg = <0x13e10000 0x1000>;
|
||||
interrupts = <0 86 0>;
|
||||
clocks = <&clock 466>;
|
||||
clocks = <&clock CLK_GSCL1>;
|
||||
clock-names = "gscl";
|
||||
samsung,power-domain = <&gsc_pd>;
|
||||
};
|
||||
@ -676,7 +679,7 @@
|
||||
compatible = "samsung,exynos5420-tmu";
|
||||
reg = <0x10060000 0x100>;
|
||||
interrupts = <0 65 0>;
|
||||
clocks = <&clock 318>;
|
||||
clocks = <&clock CLK_TMU>;
|
||||
clock-names = "tmu_apbif";
|
||||
};
|
||||
|
||||
@ -684,7 +687,7 @@
|
||||
compatible = "samsung,exynos5420-tmu";
|
||||
reg = <0x10064000 0x100>;
|
||||
interrupts = <0 183 0>;
|
||||
clocks = <&clock 318>;
|
||||
clocks = <&clock CLK_TMU>;
|
||||
clock-names = "tmu_apbif";
|
||||
};
|
||||
|
||||
@ -692,7 +695,7 @@
|
||||
compatible = "samsung,exynos5420-tmu-ext-triminfo";
|
||||
reg = <0x10068000 0x100>, <0x1006c000 0x4>;
|
||||
interrupts = <0 184 0>;
|
||||
clocks = <&clock 318>, <&clock 318>;
|
||||
clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
|
||||
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
|
||||
};
|
||||
|
||||
@ -700,7 +703,7 @@
|
||||
compatible = "samsung,exynos5420-tmu-ext-triminfo";
|
||||
reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
|
||||
interrupts = <0 185 0>;
|
||||
clocks = <&clock 318>, <&clock 319>;
|
||||
clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
|
||||
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
|
||||
};
|
||||
|
||||
@ -708,7 +711,7 @@
|
||||
compatible = "samsung,exynos5420-tmu-ext-triminfo";
|
||||
reg = <0x100a0000 0x100>, <0x10068000 0x4>;
|
||||
interrupts = <0 215 0>;
|
||||
clocks = <&clock 319>, <&clock 318>;
|
||||
clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
|
||||
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
|
||||
};
|
||||
|
||||
@ -716,7 +719,7 @@
|
||||
compatible = "samsung,exynos5420-wdt";
|
||||
reg = <0x101D0000 0x100>;
|
||||
interrupts = <0 42 0>;
|
||||
clocks = <&clock 316>;
|
||||
clocks = <&clock CLK_WDT>;
|
||||
clock-names = "watchdog";
|
||||
samsung,syscon-phandle = <&pmu_system_controller>;
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user