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usb: dwc3: clean up whitespace damage, typos, missing parens, etc.
trivial patch, no functional changes Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Paul Zimmerman
Felipe Balbi
parent
2cd0e85121
commit
1d04679395
@ -167,11 +167,11 @@ static void dwc3_free_one_event_buffer(struct dwc3 *dwc,
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}
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/**
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* dwc3_alloc_one_event_buffer - Allocated one event buffer structure
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* dwc3_alloc_one_event_buffer - Allocates one event buffer structure
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* @dwc: Pointer to our controller context structure
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* @length: size of the event buffer
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*
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* Returns a pointer to the allocated event buffer structure on succes
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* Returns a pointer to the allocated event buffer structure on success
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* otherwise ERR_PTR(errno).
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*/
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static struct dwc3_event_buffer *__devinit
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@ -215,10 +215,10 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc)
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/**
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* dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
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* @dwc: Pointer to out controller context structure
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* @dwc: pointer to our controller context structure
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* @length: size of event buffer
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*
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* Returns 0 on success otherwise negative errno. In error the case, dwc
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* Returns 0 on success otherwise negative errno. In the error case, dwc
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* may contain some buffers allocated but not all which were requested.
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*/
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static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length)
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@ -251,7 +251,7 @@ static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length)
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/**
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* dwc3_event_buffers_setup - setup our allocated event buffers
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* @dwc: Pointer to out controller context structure
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* @dwc: pointer to our controller context structure
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*
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* Returns 0 on success otherwise negative errno.
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*/
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@ -363,9 +363,9 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
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/*
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* WORKAROUND: DWC3 revisions <1.90a have a bug
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* when The device fails to connect at SuperSpeed
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* where the device can fail to connect at SuperSpeed
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* and falls back to high-speed mode which causes
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* the device to enter in a Connect/Disconnect loop
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* the device to enter a Connect/Disconnect loop
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*/
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if (dwc->revision < DWC3_REVISION_190A)
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reg |= DWC3_GCTL_U2RSTECN;
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@ -145,22 +145,22 @@
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/* Bit fields */
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/* Global Configuration Register */
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#define DWC3_GCTL_PWRDNSCALE(n) (n << 19)
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#define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19)
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#define DWC3_GCTL_U2RSTECN (1 << 16)
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#define DWC3_GCTL_RAMCLKSEL(x) ((x & DWC3_GCTL_CLK_MASK) << 6)
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#define DWC3_GCTL_RAMCLKSEL(x) (((x) & DWC3_GCTL_CLK_MASK) << 6)
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#define DWC3_GCTL_CLK_BUS (0)
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#define DWC3_GCTL_CLK_PIPE (1)
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#define DWC3_GCTL_CLK_PIPEHALF (2)
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#define DWC3_GCTL_CLK_MASK (3)
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#define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12)
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#define DWC3_GCTL_PRTCAPDIR(n) (n << 12)
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#define DWC3_GCTL_PRTCAPDIR(n) ((n) << 12)
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#define DWC3_GCTL_PRTCAP_HOST 1
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#define DWC3_GCTL_PRTCAP_DEVICE 2
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#define DWC3_GCTL_PRTCAP_OTG 3
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#define DWC3_GCTL_CORESOFTRESET (1 << 11)
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#define DWC3_GCTL_SCALEDOWN(n) (n << 4)
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#define DWC3_GCTL_SCALEDOWN(n) ((n) << 4)
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#define DWC3_GCTL_DISSCRAMBLE (1 << 3)
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#define DWC3_GCTL_DSBLCLKGTNG (1 << 0)
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@ -177,7 +177,7 @@
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#define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000)
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/* Global HWPARAMS1 Register */
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#define DWC3_GHWPARAMS1_EN_PWROPT(n) ((n & (3 << 24)) >> 24)
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#define DWC3_GHWPARAMS1_EN_PWROPT(n) (((n) & (3 << 24)) >> 24)
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#define DWC3_GHWPARAMS1_EN_PWROPT_NO 0
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#define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1
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@ -273,10 +273,10 @@
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/* Device Endpoint Command Register */
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#define DWC3_DEPCMD_PARAM_SHIFT 16
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#define DWC3_DEPCMD_PARAM(x) (x << DWC3_DEPCMD_PARAM_SHIFT)
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#define DWC3_DEPCMD_GET_RSC_IDX(x) ((x >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
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#define DWC3_DEPCMD_PARAM(x) ((x) << DWC3_DEPCMD_PARAM_SHIFT)
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#define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
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#define DWC3_DEPCMD_STATUS_MASK (0x0f << 12)
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#define DWC3_DEPCMD_STATUS(x) ((x & DWC3_DEPCMD_STATUS_MASK) >> 12)
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#define DWC3_DEPCMD_STATUS(x) (((x) & DWC3_DEPCMD_STATUS_MASK) >> 12)
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#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)
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#define DWC3_DEPCMD_CMDACT (1 << 10)
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#define DWC3_DEPCMD_CMDIOC (1 << 8)
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@ -683,9 +683,9 @@ struct dwc3_event_depevt {
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#define DEPEVT_STATUS_TRANSFER_ACTIVE (1 << 3)
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/* Within XferComplete */
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#define DEPEVT_STATUS_BUSERR (1 << 0)
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#define DEPEVT_STATUS_SHORT (1 << 1)
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#define DEPEVT_STATUS_IOC (1 << 2)
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#define DEPEVT_STATUS_BUSERR (1 << 0)
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#define DEPEVT_STATUS_SHORT (1 << 1)
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#define DEPEVT_STATUS_IOC (1 << 2)
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#define DEPEVT_STATUS_LST (1 << 3)
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/* Stream event only */
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@ -69,7 +69,7 @@ static int __devinit dwc3_pci_probe(struct pci_dev *pci,
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return -ENOMEM;
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}
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glue->dev = dev;
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glue->dev = dev;
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ret = pci_enable_device(pci);
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if (ret) {
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@ -114,7 +114,7 @@ static int __devinit dwc3_pci_probe(struct pci_dev *pci,
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dwc3->dev.dma_mask = dev->dma_mask;
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dwc3->dev.dma_parms = dev->dma_parms;
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dwc3->dev.parent = dev;
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glue->dwc3 = dwc3;
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glue->dwc3 = dwc3;
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ret = platform_device_add(dwc3);
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if (ret) {
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@ -374,7 +374,7 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
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case USB_RECIP_ENDPOINT:
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switch (wValue) {
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case USB_ENDPOINT_HALT:
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dep = dwc3_wIndex_to_dep(dwc, wIndex);
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dep = dwc3_wIndex_to_dep(dwc, wIndex);
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if (!dep)
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return -EINVAL;
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ret = __dwc3_gadget_ep_set_halt(dep, set);
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@ -548,7 +548,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
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memset(&trb_link, 0, sizeof(trb_link));
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/* Link TRB for ISOC. The HWO but is never reset */
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/* Link TRB for ISOC. The HWO bit is never reset */
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trb_st_hw = &dep->trb_pool[0];
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trb_link = &dep->trb_pool[DWC3_TRB_NUM - 1];
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@ -818,9 +818,9 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
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* @dep: endpoint for which requests are being prepared
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* @starting: true if the endpoint is idle and no requests are queued.
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*
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* The functions goes through the requests list and setups TRBs for the
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* transfers. The functions returns once there are not more TRBs available or
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* it run out of requests.
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* The function goes through the requests list and sets up TRBs for the
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* transfers. The function returns once there are no more TRBs available or
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* it runs out of requests.
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*/
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static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
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{
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@ -834,8 +834,8 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
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trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK;
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/*
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* if busy & slot are equal than it is either full or empty. If we are
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* starting to proceed requests then we are empty. Otherwise we ar
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* If busy & slot are equal than it is either full or empty. If we are
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* starting to process requests then we are empty. Otherwise we are
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* full and don't do anything
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*/
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if (!trbs_left) {
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@ -846,7 +846,7 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
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* In case we start from scratch, we queue the ISOC requests
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* starting from slot 1. This is done because we use ring
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* buffer and have no LST bit to stop us. Instead, we place
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* IOC bit TRB_NUM/4. We try to avoid to having an interrupt
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* IOC bit every TRB_NUM/4. We try to avoid having an interrupt
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* after the first request so we start at slot 1 and have
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* 7 requests proceed before we hit the first IOC.
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* Other transfer types don't use the ring buffer and are
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@ -882,8 +882,8 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
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length = sg_dma_len(s);
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dma = sg_dma_address(s);
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if (i == (request->num_mapped_sgs - 1)
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|| sg_is_last(s)) {
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if (i == (request->num_mapped_sgs - 1) ||
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sg_is_last(s)) {
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last_one = true;
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chain = false;
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}
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@ -951,8 +951,7 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
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dwc3_prepare_trbs(dep, start_new);
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/*
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* req points to the first request where HWO changed
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* from 0 to 1
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* req points to the first request where HWO changed from 0 to 1
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*/
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req = next_request(&dep->req_queued);
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}
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@ -978,7 +977,7 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
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/*
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* FIXME we need to iterate over the list of requests
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* here and stop, unmap, free and del each of the linked
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* requests instead of we do now.
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* requests instead of what we do now.
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*/
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dwc3_unmap_buffer_from_dma(req);
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list_del(&req->list);
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@ -1011,7 +1010,7 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
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* particular token from the Host side.
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*
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* This will also avoid Host cancelling URBs due to too
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* many NACKs.
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* many NAKs.
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*/
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dwc3_map_buffer_to_dma(req);
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list_add_tail(&req->list, &dep->request_list);
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@ -1034,10 +1033,10 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
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start_trans = 1;
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if (usb_endpoint_xfer_isoc(dep->desc) &&
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dep->flags & DWC3_EP_BUSY)
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(dep->flags & DWC3_EP_BUSY))
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start_trans = 0;
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ret = __dwc3_gadget_kick_transfer(dep, 0, start_trans);
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ret = __dwc3_gadget_kick_transfer(dep, 0, start_trans);
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if (ret && ret != -EBUSY) {
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struct dwc3 *dwc = dep->dwc;
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@ -1291,10 +1290,10 @@ static int dwc3_gadget_wakeup(struct usb_gadget *g)
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reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
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dwc3_writel(dwc->regs, DWC3_DCTL, reg);
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/* pool until Link State change to ON */
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/* poll until Link State changes to ON */
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timeout = jiffies + msecs_to_jiffies(100);
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while (!(time_after(jiffies, timeout))) {
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while (!time_after(jiffies, timeout)) {
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reg = dwc3_readl(dwc->regs, DWC3_DSTS);
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/* in HS, means ON */
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@ -1558,10 +1557,10 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
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if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN)
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/*
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* We continue despite the error. There is not much we
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* can do. If we don't clean in up we loop for ever. If
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* we skip the TRB than it gets overwritten reused after
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* a while since we use them in a ring buffer. a BUG()
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* would help. Lets hope that if this occures, someone
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* can do. If we don't clean it up we loop forever. If
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* we skip the TRB then it gets overwritten after a
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* while since we use them in a ring buffer. A BUG()
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* would help. Lets hope that if this occurs, someone
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* fixes the root cause instead of looking away :)
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*/
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dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n",
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@ -1614,7 +1613,7 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
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if (event->status & DEPEVT_STATUS_BUSERR)
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status = -ECONNRESET;
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clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
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clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
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if (clean_busy) {
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dep->flags &= ~DWC3_EP_BUSY;
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dep->res_trans_idx = 0;
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@ -1678,8 +1677,8 @@ static void dwc3_process_ep_cmd_complete(struct dwc3_ep *dep,
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struct dwc3_event_depevt mod_ev = *event;
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/*
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* We were asked to remove one requests. It is possible that this
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* request and a few other were started together and have the same
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* We were asked to remove one request. It is possible that this
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* request and a few others were started together and have the same
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* transfer index. Since we stopped the complete endpoint we don't
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* know how many requests were already completed (and not yet)
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* reported and how could be done (later). We purge them all until
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@ -1688,7 +1687,7 @@ static void dwc3_process_ep_cmd_complete(struct dwc3_ep *dep,
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mod_ev.status = DEPEVT_STATUS_LST;
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dwc3_cleanup_done_reqs(dwc, dep, &mod_ev, -ESHUTDOWN);
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dep->flags &= ~DWC3_EP_BUSY;
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/* pending requets are ignored and are queued on XferNotReady */
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/* pending requests are ignored and are queued on XferNotReady */
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}
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static void dwc3_ep_cmd_compl(struct dwc3_ep *dep,
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@ -2285,7 +2284,7 @@ static irqreturn_t dwc3_interrupt(int irq, void *_dwc)
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/**
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* dwc3_gadget_init - Initializes gadget related registers
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* @dwc: Pointer to out controller context structure
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* @dwc: pointer to our controller context structure
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*
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* Returns 0 on success otherwise negative errno.
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*/
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