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intel-gpio for v5.5-1
* Prerequisite patch against GPIO library to register pin ranges in time. * Second attempt to fix Intel Merrifield GPIO driver to utilize irqchip. The following is an automated git shortlog grouped by driver: gpiolib: - Introduce ->add_pin_ranges() callback merrifield: - Pass irqchip when adding gpiochip - Add GPIO <-> pin mapping ranges via callback -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAl3MBkoACgkQb7wzTHR8 rCg8Ew//TacyTIH1Q6LLrGw92lsGl1F7Svl/dwM2Oz1Crhr2MgPpYAJfTLcYNVZL j1TRfj8bHHdxKsK3cnabgwmjf4VYvEgQoY8PhJYhEw+VeKMZutHEVMKFiKtyzw0J KjIj30RJ82pQxRXdqz1urSKbYNm85RSpaSlj3Tf/Qe5Kvww9d8BNQ0qd8zoJCZ8c mgjNq3IpdPCvW11BJo6OtZfy4rM+99wOpp9uW2uCrgymsvJrZo/6mbPIb5S2SSIV 4a75QISPZR2RRPUPO5tMyU88icuBlEnWOyPYyk/2Y7VwrW716XLcKHo+qygTyia3 XH+MWHOqDjIBz8BcB2zXy1D5OBzttbNlUQ3PZqLiceX5+AelnQ3NW4SqT2WsLrI+ HHcSxgr+GhShdUGnYKr5PRr3JxbHiarEUsIDdJBWQsHYqT5MT2oi/YXlP65cnWdh hFSwepwUK1VQY4dFHXE1hCbEQFg8GBJkQtXWw8ObzXhw+3Gae/B9TBfCHI1fg9rP vsSaprenaIxMsc7h0ZK9B8gUZSCL+vGhxurh10KSu2+hMSqLPziR5CPh+eMxvTig qbLym1tQAriKNLqdz47ZGPdcxC3XGXAJHKeS0wt23NFzSQ8jHJS+3+yLIHB7w2ae 7TpISEdDMqiF9mffzBzIxQdi17/FEukI0SOIPKoPq2tueNEHUhc= =BRPx -----END PGP SIGNATURE----- Merge tag 'intel-gpio-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel intel-gpio for v5.5-1 * Prerequisite patch against GPIO library to register pin ranges in time. * Second attempt to fix Intel Merrifield GPIO driver to utilize irqchip. The following is an automated git shortlog grouped by driver: gpiolib: - Introduce ->add_pin_ranges() callback merrifield: - Pass irqchip when adding gpiochip - Add GPIO <-> pin mapping ranges via callback
This commit is contained in:
commit
1bcab70b78
@ -365,8 +365,9 @@ static void mrfld_irq_handler(struct irq_desc *desc)
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chained_irq_exit(irqchip, desc);
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}
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static void mrfld_irq_init_hw(struct mrfld_gpio *priv)
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static int mrfld_irq_init_hw(struct gpio_chip *chip)
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{
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struct mrfld_gpio *priv = gpiochip_get_data(chip);
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void __iomem *reg;
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unsigned int base;
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@ -378,6 +379,8 @@ static void mrfld_irq_init_hw(struct mrfld_gpio *priv)
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reg = gpio_reg(&priv->chip, base, GFER);
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writel(0, reg);
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}
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return 0;
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}
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static const char *mrfld_gpio_get_pinctrl_dev_name(struct mrfld_gpio *priv)
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@ -396,14 +399,36 @@ static const char *mrfld_gpio_get_pinctrl_dev_name(struct mrfld_gpio *priv)
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return name;
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}
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static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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static int mrfld_gpio_add_pin_ranges(struct gpio_chip *chip)
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{
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struct mrfld_gpio *priv = gpiochip_get_data(chip);
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const struct mrfld_gpio_pinrange *range;
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const char *pinctrl_dev_name;
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unsigned int i;
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int retval;
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pinctrl_dev_name = mrfld_gpio_get_pinctrl_dev_name(priv);
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for (i = 0; i < ARRAY_SIZE(mrfld_gpio_ranges); i++) {
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range = &mrfld_gpio_ranges[i];
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retval = gpiochip_add_pin_range(&priv->chip, pinctrl_dev_name,
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range->gpio_base,
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range->pin_base,
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range->npins);
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if (retval) {
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dev_err(priv->dev, "failed to add GPIO pin range\n");
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return retval;
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}
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}
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return 0;
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}
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static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct gpio_irq_chip *girq;
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struct mrfld_gpio *priv;
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u32 gpio_base, irq_base;
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void __iomem *base;
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unsigned int i;
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int retval;
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retval = pcim_enable_device(pdev);
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@ -444,42 +469,31 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
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priv->chip.base = gpio_base;
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priv->chip.ngpio = MRFLD_NGPIO;
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priv->chip.can_sleep = false;
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priv->chip.add_pin_ranges = mrfld_gpio_add_pin_ranges;
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raw_spin_lock_init(&priv->lock);
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pci_set_drvdata(pdev, priv);
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girq = &priv->chip.irq;
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girq->chip = &mrfld_irqchip;
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girq->init_hw = mrfld_irq_init_hw;
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girq->parent_handler = mrfld_irq_handler;
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girq->num_parents = 1;
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girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents,
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sizeof(*girq->parents), GFP_KERNEL);
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if (!girq->parents)
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return -ENOMEM;
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girq->parents[0] = pdev->irq;
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girq->first = irq_base;
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girq->default_type = IRQ_TYPE_NONE;
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girq->handler = handle_bad_irq;
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retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv);
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if (retval) {
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dev_err(&pdev->dev, "gpiochip_add error %d\n", retval);
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return retval;
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}
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pinctrl_dev_name = mrfld_gpio_get_pinctrl_dev_name(priv);
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for (i = 0; i < ARRAY_SIZE(mrfld_gpio_ranges); i++) {
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range = &mrfld_gpio_ranges[i];
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retval = gpiochip_add_pin_range(&priv->chip,
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pinctrl_dev_name,
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range->gpio_base,
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range->pin_base,
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range->npins);
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if (retval) {
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dev_err(&pdev->dev, "failed to add GPIO pin range\n");
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return retval;
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}
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}
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retval = gpiochip_irqchip_add(&priv->chip, &mrfld_irqchip, irq_base,
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handle_bad_irq, IRQ_TYPE_NONE);
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if (retval) {
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dev_err(&pdev->dev, "could not connect irqchip to gpiochip\n");
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return retval;
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}
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mrfld_irq_init_hw(priv);
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gpiochip_set_chained_irqchip(&priv->chip, &mrfld_irqchip, pdev->irq,
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mrfld_irq_handler);
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pci_set_drvdata(pdev, priv);
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return 0;
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}
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@ -390,6 +390,14 @@ static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
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gpiochip->valid_mask = NULL;
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}
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static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
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{
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if (gc->add_pin_ranges)
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return gc->add_pin_ranges(gc);
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return 0;
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}
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bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
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unsigned int offset)
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{
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@ -1520,6 +1528,10 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
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}
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}
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ret = gpiochip_add_pin_ranges(chip);
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if (ret)
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goto err_remove_of_chip;
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acpi_gpiochip_add(chip);
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machine_gpiochip_add(chip);
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@ -289,6 +289,9 @@ struct gpio_irq_chip {
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* state (such as pullup/pulldown configuration).
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* @init_valid_mask: optional routine to initialize @valid_mask, to be used if
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* not all GPIOs are valid.
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* @add_pin_ranges: optional routine to initialize pin ranges, to be used when
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* requires special mapping of the pins that provides GPIO functionality.
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* It is called after adding GPIO chip and before adding IRQ chip.
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* @base: identifies the first GPIO number handled by this chip;
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* or, if negative during registration, requests dynamic ID allocation.
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* DEPRECATION: providing anything non-negative and nailing the base
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@ -379,6 +382,8 @@ struct gpio_chip {
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unsigned long *valid_mask,
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unsigned int ngpios);
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int (*add_pin_ranges)(struct gpio_chip *chip);
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int base;
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u16 ngpio;
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const char *const *names;
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