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net: aquantia: Cleanup hardware access modules
Use direct aq_hw_s *self reference where possible Eliminate useless abstraction PHAL, duplicated structures definitions, Simplify nic config structure creation and management. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
78f5193dbc
commit
1a713f87a0
@ -7,7 +7,7 @@
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* version 2, as published by the Free Software Foundation.
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*/
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/* File aq_hw.h: Declaraion of abstract interface for NIC hardware specific
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/* File aq_hw.h: Declaration of abstract interface for NIC hardware specific
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* functions.
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*/
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@ -15,6 +15,7 @@
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#define AQ_HW_H
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#include "aq_common.h"
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#include "hw_atl/hw_atl_utils.h"
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/* NIC H/W capabilities */
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struct aq_hw_caps_s {
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@ -93,6 +94,19 @@ struct aq_hw_s {
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void __iomem *mmio;
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unsigned int not_ff_addr;
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struct aq_hw_link_status_s aq_link_status;
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struct hw_aq_atl_utils_mbox mbox;
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struct hw_atl_stats_s last_stats;
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struct aq_stats_s curr_stats;
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u64 speed;
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u32 itr_tx;
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u32 itr_rx;
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unsigned int chip_features;
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u32 fw_ver_actual;
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atomic_t dpc;
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u32 mbox_addr;
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u32 rpc_addr;
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u32 rpc_tid;
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struct hw_aq_atl_utils_fw_rpc rpc;
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};
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struct aq_ring_s;
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@ -102,7 +116,7 @@ struct sk_buff;
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struct aq_hw_ops {
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struct aq_hw_s *(*create)(struct aq_pci_func_s *aq_pci_func,
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unsigned int port, struct aq_hw_ops *ops);
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unsigned int port);
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void (*destroy)(struct aq_hw_s *self);
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@ -124,7 +138,6 @@ struct aq_hw_ops {
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struct aq_ring_s *aq_ring);
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int (*hw_get_mac_permanent)(struct aq_hw_s *self,
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struct aq_hw_caps_s *aq_hw_caps,
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u8 *mac);
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int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr);
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@ -135,8 +148,7 @@ struct aq_hw_ops {
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int (*hw_reset)(struct aq_hw_s *self);
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int (*hw_init)(struct aq_hw_s *self, struct aq_nic_cfg_s *aq_nic_cfg,
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u8 *mac_addr);
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int (*hw_init)(struct aq_hw_s *self, u8 *mac_addr);
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int (*hw_start)(struct aq_hw_s *self);
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@ -242,8 +242,9 @@ struct aq_nic_s *aq_nic_alloc_cold(const struct net_device_ops *ndev_ops,
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self->aq_hw_ops = *aq_hw_ops;
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self->port = (u8)port;
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self->aq_hw = self->aq_hw_ops.create(aq_pci_func, self->port,
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&self->aq_hw_ops);
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self->aq_hw = self->aq_hw_ops.create(aq_pci_func, self->port);
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self->aq_hw->aq_nic_cfg = &self->aq_nic_cfg;
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err = self->aq_hw_ops.get_hw_caps(self->aq_hw, &self->aq_hw_caps,
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pdev->device, pdev->subsystem_device);
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if (err < 0)
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@ -268,7 +269,6 @@ int aq_nic_ndev_register(struct aq_nic_s *self)
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goto err_exit;
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}
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err = self->aq_hw_ops.hw_get_mac_permanent(self->aq_hw,
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self->aq_nic_cfg.aq_hw_caps,
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self->ndev->dev_addr);
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if (err < 0)
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goto err_exit;
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@ -387,7 +387,7 @@ int aq_nic_init(struct aq_nic_s *self)
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if (err < 0)
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goto err_exit;
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err = self->aq_hw_ops.hw_init(self->aq_hw, &self->aq_nic_cfg,
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err = self->aq_hw_ops.hw_init(self->aq_hw,
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aq_nic_get_ndev(self)->dev_addr);
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if (err < 0)
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goto err_exit;
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@ -14,6 +14,7 @@
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#include "aq_common.h"
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#include "aq_rss.h"
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#include "aq_hw.h"
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struct aq_ring_s;
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struct aq_pci_func_s;
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@ -13,6 +13,7 @@
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#define AQ_PCI_FUNC_H
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#include "aq_common.h"
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#include "aq_nic.h"
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struct aq_pci_func_s *aq_pci_func_alloc(struct aq_hw_ops *hw_ops,
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struct pci_dev *pdev,
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@ -36,21 +36,20 @@ static int hw_atl_a0_get_hw_caps(struct aq_hw_s *self,
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}
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static struct aq_hw_s *hw_atl_a0_create(struct aq_pci_func_s *aq_pci_func,
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unsigned int port,
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struct aq_hw_ops *ops)
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unsigned int port)
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{
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struct hw_atl_s *self = NULL;
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struct aq_hw_s *self = NULL;
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self = kzalloc(sizeof(*self), GFP_KERNEL);
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if (!self)
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goto err_exit;
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self->base.aq_pci_func = aq_pci_func;
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self->aq_pci_func = aq_pci_func;
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self->base.not_ff_addr = 0x10U;
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self->not_ff_addr = 0x10U;
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err_exit:
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return (struct aq_hw_s *)self;
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return self;
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}
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static void hw_atl_a0_destroy(struct aq_hw_s *self)
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@ -151,13 +150,11 @@ static int hw_atl_a0_hw_qos_set(struct aq_hw_s *self)
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static int hw_atl_a0_hw_rss_hash_set(struct aq_hw_s *self,
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struct aq_rss_parameters *rss_params)
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{
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struct aq_nic_cfg_s *cfg = NULL;
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struct aq_nic_cfg_s *cfg = self->aq_nic_cfg;
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int err = 0;
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unsigned int i = 0U;
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unsigned int addr = 0U;
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cfg = self->aq_nic_cfg;
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for (i = 10, addr = 0U; i--; ++addr) {
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u32 key_data = cfg->is_rss ?
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__swab32(rss_params->hash_secret_key[i]) : 0U;
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@ -312,9 +309,7 @@ err_exit:
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return err;
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}
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static int hw_atl_a0_hw_init(struct aq_hw_s *self,
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struct aq_nic_cfg_s *aq_nic_cfg,
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u8 *mac_addr)
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static int hw_atl_a0_hw_init(struct aq_hw_s *self, u8 *mac_addr)
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{
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static u32 aq_hw_atl_igcr_table_[4][2] = {
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{ 0x20000000U, 0x20000000U }, /* AQ_IRQ_INVALID */
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@ -325,10 +320,7 @@ static int hw_atl_a0_hw_init(struct aq_hw_s *self,
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int err = 0;
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self->aq_nic_cfg = aq_nic_cfg;
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hw_atl_utils_hw_chip_features_init(self,
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&PHAL_ATLANTIC_A0->chip_features);
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struct aq_nic_cfg_s *aq_nic_cfg = self->aq_nic_cfg;
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hw_atl_a0_hw_init_tx_path(self);
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hw_atl_a0_hw_init_rx_path(self);
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@ -704,8 +696,7 @@ static int hw_atl_a0_hw_irq_disable(struct aq_hw_s *self, u64 mask)
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itr_irq_status_clearlsw_set(self, LODWORD(mask));
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if ((1U << 16) & reg_gen_irq_status_get(self))
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atomic_inc(&PHAL_ATLANTIC_A0->dpc);
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atomic_inc(&self->dpc);
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return aq_hw_err_from_flags(self);
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}
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@ -37,21 +37,20 @@ static int hw_atl_b0_get_hw_caps(struct aq_hw_s *self,
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}
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static struct aq_hw_s *hw_atl_b0_create(struct aq_pci_func_s *aq_pci_func,
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unsigned int port,
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struct aq_hw_ops *ops)
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unsigned int port)
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{
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struct hw_atl_s *self = NULL;
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struct aq_hw_s *self = NULL;
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self = kzalloc(sizeof(*self), GFP_KERNEL);
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if (!self)
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goto err_exit;
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self->base.aq_pci_func = aq_pci_func;
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self->aq_pci_func = aq_pci_func;
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self->base.not_ff_addr = 0x10U;
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self->not_ff_addr = 0x10U;
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err_exit:
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return (struct aq_hw_s *)self;
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return self;
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}
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static void hw_atl_b0_destroy(struct aq_hw_s *self)
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@ -152,13 +151,11 @@ static int hw_atl_b0_hw_qos_set(struct aq_hw_s *self)
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static int hw_atl_b0_hw_rss_hash_set(struct aq_hw_s *self,
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struct aq_rss_parameters *rss_params)
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{
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struct aq_nic_cfg_s *cfg = NULL;
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struct aq_nic_cfg_s *cfg = self->aq_nic_cfg;
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int err = 0;
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unsigned int i = 0U;
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unsigned int addr = 0U;
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cfg = self->aq_nic_cfg;
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for (i = 10, addr = 0U; i--; ++addr) {
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u32 key_data = cfg->is_rss ?
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__swab32(rss_params->hash_secret_key[i]) : 0U;
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@ -357,9 +354,7 @@ err_exit:
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return err;
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}
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static int hw_atl_b0_hw_init(struct aq_hw_s *self,
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struct aq_nic_cfg_s *aq_nic_cfg,
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u8 *mac_addr)
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static int hw_atl_b0_hw_init(struct aq_hw_s *self, u8 *mac_addr)
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{
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static u32 aq_hw_atl_igcr_table_[4][2] = {
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{ 0x20000000U, 0x20000000U }, /* AQ_IRQ_INVALID */
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@ -371,10 +366,7 @@ static int hw_atl_b0_hw_init(struct aq_hw_s *self,
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int err = 0;
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u32 val;
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self->aq_nic_cfg = aq_nic_cfg;
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hw_atl_utils_hw_chip_features_init(self,
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&PHAL_ATLANTIC_B0->chip_features);
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struct aq_nic_cfg_s *aq_nic_cfg = self->aq_nic_cfg;
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hw_atl_b0_hw_init_tx_path(self);
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hw_atl_b0_hw_init_rx_path(self);
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@ -737,7 +729,7 @@ static int hw_atl_b0_hw_irq_disable(struct aq_hw_s *self, u64 mask)
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itr_irq_msk_clearlsw_set(self, LODWORD(mask));
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itr_irq_status_clearlsw_set(self, LODWORD(mask));
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atomic_inc(&PHAL_ATLANTIC_B0->dpc);
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atomic_inc(&self->dpc);
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return aq_hw_err_from_flags(self);
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}
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@ -11,11 +11,9 @@
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* abstraction layer.
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*/
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#include "../aq_hw.h"
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#include "../aq_nic.h"
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#include "../aq_hw_utils.h"
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#include "../aq_pci_func.h"
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#include "../aq_ring.h"
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#include "../aq_vec.h"
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#include "hw_atl_utils.h"
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#include "hw_atl_llh.h"
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@ -136,7 +134,7 @@ static int hw_atl_utils_init_ucp(struct aq_hw_s *self,
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reg_glb_cpu_scratch_scp_set(self, 0x00000000U, 25U);
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/* check 10 times by 1ms */
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AQ_HW_WAIT_FOR(0U != (PHAL_ATLANTIC_A0->mbox_addr =
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AQ_HW_WAIT_FOR(0U != (self->mbox_addr =
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aq_hw_read_reg(self, 0x360U)), 1000U, 10U);
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err = hw_atl_utils_ver_match(aq_hw_caps->fw_ver_expected,
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@ -174,14 +172,14 @@ static int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size)
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err = -1;
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goto err_exit;
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}
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err = hw_atl_utils_fw_upload_dwords(self, PHAL_ATLANTIC->rpc_addr,
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(u32 *)(void *)&PHAL_ATLANTIC->rpc,
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err = hw_atl_utils_fw_upload_dwords(self, self->rpc_addr,
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(u32 *)(void *)&self->rpc,
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(rpc_size + sizeof(u32) -
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sizeof(u8)) / sizeof(u32));
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if (err < 0)
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goto err_exit;
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sw.tid = 0xFFFFU & (++PHAL_ATLANTIC->rpc_tid);
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sw.tid = 0xFFFFU & (++self->rpc_tid);
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sw.len = (u16)rpc_size;
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aq_hw_write_reg(self, HW_ATL_RPC_CONTROL_ADR, sw.val);
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@ -199,7 +197,7 @@ static int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
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do {
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sw.val = aq_hw_read_reg(self, HW_ATL_RPC_CONTROL_ADR);
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PHAL_ATLANTIC->rpc_tid = sw.tid;
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self->rpc_tid = sw.tid;
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AQ_HW_WAIT_FOR(sw.tid ==
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(fw.val =
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@ -221,9 +219,9 @@ static int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
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if (fw.len) {
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err =
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hw_atl_utils_fw_downld_dwords(self,
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PHAL_ATLANTIC->rpc_addr,
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self->rpc_addr,
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(u32 *)(void *)
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&PHAL_ATLANTIC->rpc,
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&self->rpc,
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(fw.len + sizeof(u32) -
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sizeof(u8)) /
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sizeof(u32));
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@ -231,19 +229,18 @@ static int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
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goto err_exit;
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}
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*rpc = &PHAL_ATLANTIC->rpc;
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*rpc = &self->rpc;
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}
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err_exit:
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return err;
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}
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static int hw_atl_utils_mpi_create(struct aq_hw_s *self,
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struct aq_hw_caps_s *aq_hw_caps)
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static int hw_atl_utils_mpi_create(struct aq_hw_s *self)
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{
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int err = 0;
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err = hw_atl_utils_init_ucp(self, aq_hw_caps);
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err = hw_atl_utils_init_ucp(self, self->aq_nic_cfg->aq_hw_caps);
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if (err < 0)
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goto err_exit;
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@ -259,7 +256,7 @@ int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,
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struct hw_aq_atl_utils_mbox_header *pmbox)
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{
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return hw_atl_utils_fw_downld_dwords(self,
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PHAL_ATLANTIC->mbox_addr,
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self->mbox_addr,
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(u32 *)(void *)pmbox,
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sizeof(*pmbox) / sizeof(u32));
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}
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@ -270,7 +267,7 @@ void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
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int err = 0;
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err = hw_atl_utils_fw_downld_dwords(self,
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PHAL_ATLANTIC->mbox_addr,
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self->mbox_addr,
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(u32 *)(void *)pmbox,
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sizeof(*pmbox) / sizeof(u32));
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if (err < 0)
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@ -281,7 +278,7 @@ void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
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self->aq_nic_cfg->mtu : 1514U;
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pmbox->stats.ubrc = pmbox->stats.uprc * mtu;
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pmbox->stats.ubtc = pmbox->stats.uptc * mtu;
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pmbox->stats.dpc = atomic_read(&PHAL_ATLANTIC_A0->dpc);
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pmbox->stats.dpc = atomic_read(&self->dpc);
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} else {
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pmbox->stats.dpc = reg_rx_dma_stat_counter7get(self);
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}
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@ -365,7 +362,6 @@ int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self)
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}
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int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
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struct aq_hw_caps_s *aq_hw_caps,
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u8 *mac)
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{
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int err = 0;
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@ -376,9 +372,9 @@ int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
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self->mmio = aq_pci_func_get_mmio(self->aq_pci_func);
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hw_atl_utils_hw_chip_features_init(self,
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&PHAL_ATLANTIC_A0->chip_features);
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&self->chip_features);
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err = hw_atl_utils_mpi_create(self, aq_hw_caps);
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err = hw_atl_utils_mpi_create(self);
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if (err < 0)
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goto err_exit;
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@ -500,13 +496,13 @@ int hw_atl_utils_hw_set_power(struct aq_hw_s *self,
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int hw_atl_utils_update_stats(struct aq_hw_s *self)
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{
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struct hw_atl_s *hw_self = PHAL_ATLANTIC;
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struct hw_aq_atl_utils_mbox mbox;
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hw_atl_utils_mpi_read_stats(self, &mbox);
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#define AQ_SDELTA(_N_) (hw_self->curr_stats._N_ += \
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mbox.stats._N_ - hw_self->last_stats._N_)
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#define AQ_SDELTA(_N_) (self->curr_stats._N_ += \
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mbox.stats._N_ - self->last_stats._N_)
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if (self->aq_link_status.mbps) {
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AQ_SDELTA(uprc);
|
||||
AQ_SDELTA(mprc);
|
||||
@ -527,19 +523,19 @@ int hw_atl_utils_update_stats(struct aq_hw_s *self)
|
||||
AQ_SDELTA(dpc);
|
||||
}
|
||||
#undef AQ_SDELTA
|
||||
hw_self->curr_stats.dma_pkt_rc = stats_rx_dma_good_pkt_counterlsw_get(self);
|
||||
hw_self->curr_stats.dma_pkt_tc = stats_tx_dma_good_pkt_counterlsw_get(self);
|
||||
hw_self->curr_stats.dma_oct_rc = stats_rx_dma_good_octet_counterlsw_get(self);
|
||||
hw_self->curr_stats.dma_oct_tc = stats_tx_dma_good_octet_counterlsw_get(self);
|
||||
self->curr_stats.dma_pkt_rc = stats_rx_dma_good_pkt_counterlsw_get(self);
|
||||
self->curr_stats.dma_pkt_tc = stats_tx_dma_good_pkt_counterlsw_get(self);
|
||||
self->curr_stats.dma_oct_rc = stats_rx_dma_good_octet_counterlsw_get(self);
|
||||
self->curr_stats.dma_oct_tc = stats_tx_dma_good_octet_counterlsw_get(self);
|
||||
|
||||
memcpy(&hw_self->last_stats, &mbox.stats, sizeof(mbox.stats));
|
||||
memcpy(&self->last_stats, &mbox.stats, sizeof(mbox.stats));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self)
|
||||
{
|
||||
return &PHAL_ATLANTIC->curr_stats;
|
||||
return &self->curr_stats;
|
||||
}
|
||||
|
||||
static const u32 hw_atl_utils_hw_mac_regs[] = {
|
||||
|
@ -14,8 +14,6 @@
|
||||
#ifndef HW_ATL_UTILS_H
|
||||
#define HW_ATL_UTILS_H
|
||||
|
||||
#include "../aq_common.h"
|
||||
|
||||
#define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }
|
||||
|
||||
struct __packed hw_atl_stats_s {
|
||||
@ -126,26 +124,6 @@ struct __packed hw_aq_atl_utils_mbox {
|
||||
struct hw_atl_stats_s stats;
|
||||
};
|
||||
|
||||
struct __packed hw_atl_s {
|
||||
struct aq_hw_s base;
|
||||
struct hw_atl_stats_s last_stats;
|
||||
struct aq_stats_s curr_stats;
|
||||
u64 speed;
|
||||
unsigned int chip_features;
|
||||
u32 fw_ver_actual;
|
||||
atomic_t dpc;
|
||||
u32 mbox_addr;
|
||||
u32 rpc_addr;
|
||||
u32 rpc_tid;
|
||||
struct hw_aq_atl_utils_fw_rpc rpc;
|
||||
};
|
||||
|
||||
#define SELF ((struct hw_atl_s *)self)
|
||||
|
||||
#define PHAL_ATLANTIC ((struct hw_atl_s *)((void *)(self)))
|
||||
#define PHAL_ATLANTIC_A0 ((struct hw_atl_s *)((void *)(self)))
|
||||
#define PHAL_ATLANTIC_B0 ((struct hw_atl_s *)((void *)(self)))
|
||||
|
||||
#define HAL_ATLANTIC_UTILS_CHIP_MIPS 0x00000001U
|
||||
#define HAL_ATLANTIC_UTILS_CHIP_TPO2 0x00000002U
|
||||
#define HAL_ATLANTIC_UTILS_CHIP_RPF2 0x00000004U
|
||||
@ -154,7 +132,7 @@ struct __packed hw_atl_s {
|
||||
#define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 0x02000000U
|
||||
|
||||
#define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
|
||||
PHAL_ATLANTIC->chip_features)
|
||||
self->chip_features)
|
||||
|
||||
enum hal_atl_utils_fw_state_e {
|
||||
MPI_DEINIT = 0,
|
||||
@ -171,6 +149,10 @@ enum hal_atl_utils_fw_state_e {
|
||||
#define HAL_ATLANTIC_RATE_100M BIT(5)
|
||||
#define HAL_ATLANTIC_RATE_INVALID BIT(6)
|
||||
|
||||
struct aq_hw_s;
|
||||
struct aq_hw_caps_s;
|
||||
struct aq_hw_link_status_s;
|
||||
|
||||
void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p);
|
||||
|
||||
int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,
|
||||
@ -189,7 +171,6 @@ int hw_atl_utils_mpi_set_speed(struct aq_hw_s *self, u32 speed,
|
||||
int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self);
|
||||
|
||||
int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
|
||||
struct aq_hw_caps_s *aq_hw_caps,
|
||||
u8 *mac);
|
||||
|
||||
unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps);
|
||||
|
Loading…
Reference in New Issue
Block a user