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drm/msm: remove qcom,gpu-pwrlevels bindings

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The plan is to use the OPP bindings.  For now, remove the documentation
for qcom,gpu-pwrlevels, and make the driver fall back to a safe low
clock if the node is not present.

Note that no upstream dtb use this node.  For now we keep compatibility
with this node to avoid breaking compatibility with downstream android
dt files.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Rob Clark 2017-01-30 10:46:35 -05:00
parent 99743ae4c5
commit 1a4a66ddc7
2 changed files with 4 additions and 17 deletions
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15
Documentation/devicetree/bindings/display/msm/gpu.txt
View File

@ -12,12 +12,6 @@ Required properties:
* "mem_iface_clk"
- qcom,chipid: gpu chip-id. Note this may become optional for future
devices if we can reliably read the chipid from hw
- qcom,gpu-pwrlevels: list of operating points
- compatible: "qcom,gpu-pwrlevels"
- for each qcom,gpu-pwrlevel:
- qcom,gpu-freq: requested gpu clock speed
- NOTE: downstream android driver defines additional parameters to
configure memory bandwidth scaling per OPP.
Example:
@ -39,14 +33,5 @@ Example:
<&mmcc GFX3D_AHB_CLK>,
<&mmcc MMSS_IMEM_AHB_CLK>;
qcom,chipid = <0x03020100>;
qcom,gpu-pwrlevels {
compatible = "qcom,gpu-pwrlevels";
qcom,gpu-pwrlevel@0 {
qcom,gpu-freq = <450000000>;
};
qcom,gpu-pwrlevel@1 {
qcom,gpu-freq = <27000000>;
};
};
};
};

6
drivers/gpu/drm/msm/adreno/adreno_device.c
View File

@ -224,8 +224,10 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
}
if (!config.fast_rate) {
dev_err(dev, "could not find clk rates\n");
return -ENXIO;
dev_warn(dev, "could not find clk rates\n");
/* This is a safe low speed for all devices: */
config.fast_rate = 200000000;
config.slow_rate = 27000000;
}
for (i = 0; i < ARRAY_SIZE(quirks); i++)