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mmc: sh_mmcif: don't clear masked interrupts

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Masking events on MMCIF means that an occurrence of the masked event
won't raise an interrupt, but the event bit will still be set in the
interrupt status register. If simultaneously a different event occurs
which was enabled, both flags will be set. However, only the unmasked
event bit should be cleared in the status register in such a case.

Clearing also the masked bit can lead to lost interrupts, which indeed
can be observed on the armadillo800eva r8a7740 board with an eMMC chip.
The problem has been introduced by the recent "mmc: sh_mmcif: simplify
IRQ processing" patch. Fix the problem by only clearing enabled interrupts.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
This commit is contained in:
Guennadi Liakhovetski 2013-05-15 07:50:51 +02:00 committed by Chris Ball
parent b22ffdcd25
commit 19f1ba51c7
1 changed files with 2 additions and 1 deletions
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3
drivers/mmc/host/sh_mmcif.c
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@ -1244,7 +1244,8 @@ static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
u32 state;
state = sh_mmcif_readl(host->addr, MMCIF_CE_INT);
sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~state);
sh_mmcif_writel(host->addr, MMCIF_CE_INT,
~(state & sh_mmcif_readl(host->addr, MMCIF_CE_INT_MASK)));
sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, state & MASK_CLEAN);
if (state & ~MASK_CLEAN)