mirror of
https://github.com/edk2-porting/linux-next.git
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drm/tegra: Changes for v4.17-rc1
This fixes mmap() for fbdev devices by providing a custom implementation
based on the KMS variant. This is a fairly exotic case these days, hence
why it is not flagged for stable.
There is also support for dedicating one of the overlay planes to serve
as a hardware cursor on older Tegra that did support hardware cursors
but not RGBA formats for it.
Planes will now also export the IN_FORMATS property by supporting the
various block-linear tiling modifiers for RGBA pixel formats.
Other than that, there's a bit of cleanup of DMA API abuse, use of the
private object infrastructure for global state (rather than subclassing
atomic state objects) and an implementation of ->{begin,end}_cpu_access
callbacks for PRIME exported buffers, which allow users to perform cache
maintenance on these buffers.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlqviKkTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zod+zD/9p04Jmsbd30dttPqb1Dns1e4N/cXcP
hLgqYjc+Apov3ksrFS7bhlmIKxMcIXvw6s/ciwapO4tNMuWfKke6+LX7eGxyzMFn
aGm7Na0fcb+R6U7Cs8J45b9XB0NBGuz2Vv9rIne/I7BoVE1XCPfEBYgYGT6hR0cj
fPWKAldD1CVJXJX48mIsgUe8w8PHBijN0qEfrNTmQTA/zZ4PeZQpdoilLS8lsb74
fg9BWaTHYLchHFaLShsuSJwS/qHCMLCMv01dhCV5OlpaZWXki4iqhjuIuHeZnk3c
ygWcmjDkE4Aaihq5mcPD1tYe8D223TW3XbtHDsl1MKVLdHliSSp3xsWlbqB42BiK
QtXNhmEUbx4cnvNA6e/5wXTZImNHRJnkcAIMro7z5Vq3Xav+4bcPiLROd9nz28GS
WNuAoV26YedWtK9taJEAoO6Nas6K+f2jQKcph97Rrii+LwkZqNLeHzikTXcIAwDF
M55wIcLRt1b2a3ZPxWOE3sl0gTyMdJbITt5t2zyl3OXCnGINmSCn6Bfm8EZsFY+j
2J8v25T6VTQC5MWyR75abppMvdqk4ihIWSmIH4vdlpj202dD5q9T+CWaLCguxZPY
racx4bDUEJB9Gt5iJAQNVq8alDhioynygXwGbVuPY7BAiBKQWNyHBbgRWBAPGjXR
CnGh3KfFFEFWkA==
=gOLI
-----END PGP SIGNATURE-----
Merge tag 'drm/tegra/for-4.17-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/tegra: Changes for v4.17-rc1
This fixes mmap() for fbdev devices by providing a custom implementation
based on the KMS variant. This is a fairly exotic case these days, hence
why it is not flagged for stable.
There is also support for dedicating one of the overlay planes to serve
as a hardware cursor on older Tegra that did support hardware cursors
but not RGBA formats for it.
Planes will now also export the IN_FORMATS property by supporting the
various block-linear tiling modifiers for RGBA pixel formats.
Other than that, there's a bit of cleanup of DMA API abuse, use of the
private object infrastructure for global state (rather than subclassing
atomic state objects) and an implementation of ->{begin,end}_cpu_access
callbacks for PRIME exported buffers, which allow users to perform cache
maintenance on these buffers.
* tag 'drm/tegra/for-4.17-rc1' of git://anongit.freedesktop.org/tegra/linux:
drm/tegra: prime: Implement ->{begin,end}_cpu_access()
drm/tegra: gem: Map pages via the DMA API
drm/tegra: hub: Use private object for global state
drm/tegra: fb: Properly support linear modifier
drm/tegra: plane: Support format modifiers
drm/tegra: dc: Dedicate overlay plane to cursor on older Tegra's
drm/tegra: plane: Make tegra_plane_get_overlap_index() static
drm/tegra: fb: Implement ->fb_mmap() callback
drm/tegra: gem: Make __tegra_gem_mmap() available more widely
drm/tegra: gem: Reshuffle declarations
This commit is contained in:
Dave Airlie
commit
19c800caa6
@ -383,6 +383,12 @@ static const u32 tegra20_primary_formats[] = {
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DRM_FORMAT_XRGB8888,
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};
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static const u64 tegra20_modifiers[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED,
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DRM_FORMAT_MOD_INVALID
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};
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static const u32 tegra114_primary_formats[] = {
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DRM_FORMAT_ARGB4444,
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DRM_FORMAT_ARGB1555,
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@ -430,6 +436,17 @@ static const u32 tegra124_primary_formats[] = {
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DRM_FORMAT_BGRX8888,
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};
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static const u64 tegra124_modifiers[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5),
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DRM_FORMAT_MOD_INVALID
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};
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static int tegra_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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@ -596,6 +613,7 @@ static struct drm_plane *tegra_primary_plane_create(struct drm_device *drm,
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enum drm_plane_type type = DRM_PLANE_TYPE_PRIMARY;
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struct tegra_plane *plane;
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unsigned int num_formats;
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const u64 *modifiers;
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const u32 *formats;
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int err;
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@ -610,10 +628,11 @@ static struct drm_plane *tegra_primary_plane_create(struct drm_device *drm,
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num_formats = dc->soc->num_primary_formats;
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formats = dc->soc->primary_formats;
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modifiers = dc->soc->modifiers;
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err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,
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&tegra_plane_funcs, formats,
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num_formats, NULL, type, NULL);
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num_formats, modifiers, type, NULL);
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if (err < 0) {
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kfree(plane);
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return ERR_PTR(err);
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@ -864,11 +883,13 @@ static const u32 tegra124_overlay_formats[] = {
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static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm,
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struct tegra_dc *dc,
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unsigned int index)
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unsigned int index,
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bool cursor)
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{
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unsigned long possible_crtcs = tegra_plane_get_possible_crtcs(drm);
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struct tegra_plane *plane;
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unsigned int num_formats;
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enum drm_plane_type type;
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const u32 *formats;
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int err;
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@ -883,10 +904,14 @@ static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm,
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num_formats = dc->soc->num_overlay_formats;
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formats = dc->soc->overlay_formats;
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if (!cursor)
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type = DRM_PLANE_TYPE_OVERLAY;
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else
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type = DRM_PLANE_TYPE_CURSOR;
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err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,
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&tegra_plane_funcs, formats,
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num_formats, NULL,
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DRM_PLANE_TYPE_OVERLAY, NULL);
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num_formats, NULL, type, NULL);
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if (err < 0) {
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kfree(plane);
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return ERR_PTR(err);
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@ -938,6 +963,7 @@ static struct drm_plane *tegra_dc_add_planes(struct drm_device *drm,
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struct tegra_dc *dc)
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{
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struct drm_plane *planes[2], *primary;
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unsigned int planes_num;
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unsigned int i;
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int err;
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@ -945,8 +971,14 @@ static struct drm_plane *tegra_dc_add_planes(struct drm_device *drm,
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if (IS_ERR(primary))
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return primary;
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for (i = 0; i < 2; i++) {
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planes[i] = tegra_dc_overlay_plane_create(drm, dc, 1 + i);
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if (dc->soc->supports_cursor)
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planes_num = 2;
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else
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planes_num = 1;
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for (i = 0; i < planes_num; i++) {
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planes[i] = tegra_dc_overlay_plane_create(drm, dc, 1 + i,
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false);
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if (IS_ERR(planes[i])) {
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err = PTR_ERR(planes[i]);
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@ -1704,31 +1736,6 @@ static void tegra_crtc_atomic_enable(struct drm_crtc *crtc,
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drm_crtc_vblank_on(crtc);
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}
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static int tegra_crtc_atomic_check(struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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{
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struct tegra_atomic_state *s = to_tegra_atomic_state(state->state);
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struct tegra_dc_state *tegra = to_dc_state(state);
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/*
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* The display hub display clock needs to be fed by the display clock
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* with the highest frequency to ensure proper functioning of all the
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* displays.
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*
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* Note that this isn't used before Tegra186, but it doesn't hurt and
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* conditionalizing it would make the code less clean.
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*/
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if (state->active) {
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if (!s->clk_disp || tegra->pclk > s->rate) {
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s->dc = to_tegra_dc(crtc);
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s->clk_disp = s->dc->clk;
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s->rate = tegra->pclk;
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}
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}
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return 0;
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}
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static void tegra_crtc_atomic_begin(struct drm_crtc *crtc,
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struct drm_crtc_state *old_crtc_state)
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{
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@ -1765,7 +1772,6 @@ static void tegra_crtc_atomic_flush(struct drm_crtc *crtc,
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}
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static const struct drm_crtc_helper_funcs tegra_crtc_helper_funcs = {
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.atomic_check = tegra_crtc_atomic_check,
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.atomic_begin = tegra_crtc_atomic_begin,
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.atomic_flush = tegra_crtc_atomic_flush,
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.atomic_enable = tegra_crtc_atomic_enable,
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@ -1864,6 +1870,13 @@ static int tegra_dc_init(struct host1x_client *client)
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err = PTR_ERR(cursor);
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goto cleanup;
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}
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} else {
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/* dedicate one overlay to mouse cursor */
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cursor = tegra_dc_overlay_plane_create(drm, dc, 2, true);
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if (IS_ERR(cursor)) {
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err = PTR_ERR(cursor);
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goto cleanup;
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}
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}
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err = drm_crtc_init_with_planes(drm, &dc->base, primary, cursor,
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@ -1954,6 +1967,7 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info = {
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.primary_formats = tegra20_primary_formats,
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.num_overlay_formats = ARRAY_SIZE(tegra20_overlay_formats),
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.overlay_formats = tegra20_overlay_formats,
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.modifiers = tegra20_modifiers,
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};
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static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
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@ -1970,6 +1984,7 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
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.primary_formats = tegra20_primary_formats,
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.num_overlay_formats = ARRAY_SIZE(tegra20_overlay_formats),
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.overlay_formats = tegra20_overlay_formats,
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.modifiers = tegra20_modifiers,
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};
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static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
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@ -1986,6 +2001,7 @@ static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
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.primary_formats = tegra114_primary_formats,
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.num_overlay_formats = ARRAY_SIZE(tegra114_overlay_formats),
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.overlay_formats = tegra114_overlay_formats,
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.modifiers = tegra20_modifiers,
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};
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static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
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@ -2002,6 +2018,7 @@ static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
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.primary_formats = tegra114_primary_formats,
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.num_overlay_formats = ARRAY_SIZE(tegra124_overlay_formats),
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.overlay_formats = tegra114_overlay_formats,
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.modifiers = tegra124_modifiers,
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};
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static const struct tegra_dc_soc_info tegra210_dc_soc_info = {
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@ -2018,6 +2035,7 @@ static const struct tegra_dc_soc_info tegra210_dc_soc_info = {
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.primary_formats = tegra114_primary_formats,
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.num_overlay_formats = ARRAY_SIZE(tegra114_overlay_formats),
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.overlay_formats = tegra114_overlay_formats,
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.modifiers = tegra124_modifiers,
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};
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static const struct tegra_windowgroup_soc tegra186_dc_wgrps[] = {
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@ -66,6 +66,7 @@ struct tegra_dc_soc_info {
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unsigned int num_primary_formats;
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const u32 *overlay_formats;
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unsigned int num_overlay_formats;
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const u64 *modifiers;
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};
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struct tegra_dc {
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@ -42,6 +42,10 @@ static int tegra_atomic_check(struct drm_device *drm,
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if (err < 0)
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return err;
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err = tegra_display_hub_atomic_check(drm, state);
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if (err < 0)
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return err;
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err = drm_atomic_normalize_zpos(drm, state);
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if (err < 0)
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return err;
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@ -56,35 +60,6 @@ static int tegra_atomic_check(struct drm_device *drm,
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return 0;
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}
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static struct drm_atomic_state *
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tegra_atomic_state_alloc(struct drm_device *drm)
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{
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struct tegra_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (!state || drm_atomic_state_init(drm, &state->base) < 0) {
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kfree(state);
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return NULL;
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}
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return &state->base;
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}
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static void tegra_atomic_state_clear(struct drm_atomic_state *state)
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{
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struct tegra_atomic_state *tegra = to_tegra_atomic_state(state);
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drm_atomic_state_default_clear(state);
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tegra->clk_disp = NULL;
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tegra->dc = NULL;
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tegra->rate = 0;
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}
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static void tegra_atomic_state_free(struct drm_atomic_state *state)
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{
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drm_atomic_state_default_release(state);
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kfree(state);
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}
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static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
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.fb_create = tegra_fb_create,
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#ifdef CONFIG_DRM_FBDEV_EMULATION
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@ -92,9 +67,6 @@ static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
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#endif
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.atomic_check = tegra_atomic_check,
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.atomic_commit = drm_atomic_helper_commit,
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.atomic_state_alloc = tegra_atomic_state_alloc,
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.atomic_state_clear = tegra_atomic_state_clear,
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.atomic_state_free = tegra_atomic_state_free,
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};
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static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
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@ -42,20 +42,6 @@ struct tegra_fbdev {
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};
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#endif
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struct tegra_atomic_state {
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struct drm_atomic_state base;
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|
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struct clk *clk_disp;
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struct tegra_dc *dc;
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unsigned long rate;
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};
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static inline struct tegra_atomic_state *
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to_tegra_atomic_state(struct drm_atomic_state *state)
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{
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return container_of(state, struct tegra_atomic_state, base);
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}
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|
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struct tegra_drm {
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struct drm_device *drm;
|
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|
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|
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@ -55,6 +55,11 @@ int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
|
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uint64_t modifier = fb->base.modifier;
|
||||
|
||||
switch (modifier) {
|
||||
case DRM_FORMAT_MOD_LINEAR:
|
||||
tiling->mode = TEGRA_BO_TILING_MODE_PITCH;
|
||||
tiling->value = 0;
|
||||
break;
|
||||
|
||||
case DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED:
|
||||
tiling->mode = TEGRA_BO_TILING_MODE_TILED;
|
||||
tiling->value = 0;
|
||||
@ -91,9 +96,7 @@ int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
|
||||
break;
|
||||
|
||||
default:
|
||||
/* TODO: handle YUV formats? */
|
||||
*tiling = fb->planes[0]->tiling;
|
||||
break;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
@ -224,12 +227,28 @@ unreference:
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DRM_FBDEV_EMULATION
|
||||
static int tegra_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
|
||||
{
|
||||
struct drm_fb_helper *helper = info->par;
|
||||
struct tegra_bo *bo;
|
||||
int err;
|
||||
|
||||
bo = tegra_fb_get_plane(helper->fb, 0);
|
||||
|
||||
err = drm_gem_mmap_obj(&bo->gem, bo->gem.size, vma);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
return __tegra_gem_mmap(&bo->gem, vma);
|
||||
}
|
||||
|
||||
static struct fb_ops tegra_fb_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
DRM_FB_HELPER_DEFAULT_OPS,
|
||||
.fb_fillrect = drm_fb_helper_sys_fillrect,
|
||||
.fb_copyarea = drm_fb_helper_sys_copyarea,
|
||||
.fb_imageblit = drm_fb_helper_sys_imageblit,
|
||||
.fb_mmap = tegra_fb_mmap,
|
||||
};
|
||||
|
||||
static int tegra_fbdev_probe(struct drm_fb_helper *helper,
|
||||
|
||||
@ -203,6 +203,8 @@ free:
|
||||
static void tegra_bo_free(struct drm_device *drm, struct tegra_bo *bo)
|
||||
{
|
||||
if (bo->pages) {
|
||||
dma_unmap_sg(drm->dev, bo->sgt->sgl, bo->sgt->nents,
|
||||
DMA_BIDIRECTIONAL);
|
||||
drm_gem_put_pages(&bo->gem, bo->pages, true, true);
|
||||
sg_free_table(bo->sgt);
|
||||
kfree(bo->sgt);
|
||||
@ -213,8 +215,7 @@ static void tegra_bo_free(struct drm_device *drm, struct tegra_bo *bo)
|
||||
|
||||
static int tegra_bo_get_pages(struct drm_device *drm, struct tegra_bo *bo)
|
||||
{
|
||||
struct scatterlist *s;
|
||||
unsigned int i;
|
||||
int err;
|
||||
|
||||
bo->pages = drm_gem_get_pages(&bo->gem);
|
||||
if (IS_ERR(bo->pages))
|
||||
@ -223,27 +224,26 @@ static int tegra_bo_get_pages(struct drm_device *drm, struct tegra_bo *bo)
|
||||
bo->num_pages = bo->gem.size >> PAGE_SHIFT;
|
||||
|
||||
bo->sgt = drm_prime_pages_to_sg(bo->pages, bo->num_pages);
|
||||
if (IS_ERR(bo->sgt))
|
||||
if (IS_ERR(bo->sgt)) {
|
||||
err = PTR_ERR(bo->sgt);
|
||||
goto put_pages;
|
||||
}
|
||||
|
||||
/*
|
||||
* Fake up the SG table so that dma_sync_sg_for_device() can be used
|
||||
* to flush the pages associated with it.
|
||||
*
|
||||
* TODO: Replace this by drm_clflash_sg() once it can be implemented
|
||||
* without relying on symbols that are not exported.
|
||||
*/
|
||||
for_each_sg(bo->sgt->sgl, s, bo->sgt->nents, i)
|
||||
sg_dma_address(s) = sg_phys(s);
|
||||
|
||||
dma_sync_sg_for_device(drm->dev, bo->sgt->sgl, bo->sgt->nents,
|
||||
DMA_TO_DEVICE);
|
||||
err = dma_map_sg(drm->dev, bo->sgt->sgl, bo->sgt->nents,
|
||||
DMA_BIDIRECTIONAL);
|
||||
if (err == 0) {
|
||||
err = -EFAULT;
|
||||
goto free_sgt;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
free_sgt:
|
||||
sg_free_table(bo->sgt);
|
||||
kfree(bo->sgt);
|
||||
put_pages:
|
||||
drm_gem_put_pages(&bo->gem, bo->pages, false, false);
|
||||
return PTR_ERR(bo->sgt);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int tegra_bo_alloc(struct drm_device *drm, struct tegra_bo *bo)
|
||||
@ -459,8 +459,7 @@ const struct vm_operations_struct tegra_bo_vm_ops = {
|
||||
.close = drm_gem_vm_close,
|
||||
};
|
||||
|
||||
static int tegra_gem_mmap(struct drm_gem_object *gem,
|
||||
struct vm_area_struct *vma)
|
||||
int __tegra_gem_mmap(struct drm_gem_object *gem, struct vm_area_struct *vma)
|
||||
{
|
||||
struct tegra_bo *bo = to_tegra_bo(gem);
|
||||
|
||||
@ -507,7 +506,7 @@ int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma)
|
||||
|
||||
gem = vma->vm_private_data;
|
||||
|
||||
return tegra_gem_mmap(gem, vma);
|
||||
return __tegra_gem_mmap(gem, vma);
|
||||
}
|
||||
|
||||
static struct sg_table *
|
||||
@ -569,6 +568,34 @@ static void tegra_gem_prime_release(struct dma_buf *buf)
|
||||
drm_gem_dmabuf_release(buf);
|
||||
}
|
||||
|
||||
static int tegra_gem_prime_begin_cpu_access(struct dma_buf *buf,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct drm_gem_object *gem = buf->priv;
|
||||
struct tegra_bo *bo = to_tegra_bo(gem);
|
||||
struct drm_device *drm = gem->dev;
|
||||
|
||||
if (bo->pages)
|
||||
dma_sync_sg_for_cpu(drm->dev, bo->sgt->sgl, bo->sgt->nents,
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tegra_gem_prime_end_cpu_access(struct dma_buf *buf,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct drm_gem_object *gem = buf->priv;
|
||||
struct tegra_bo *bo = to_tegra_bo(gem);
|
||||
struct drm_device *drm = gem->dev;
|
||||
|
||||
if (bo->pages)
|
||||
dma_sync_sg_for_device(drm->dev, bo->sgt->sgl, bo->sgt->nents,
|
||||
DMA_TO_DEVICE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void *tegra_gem_prime_kmap_atomic(struct dma_buf *buf,
|
||||
unsigned long page)
|
||||
{
|
||||
@ -600,7 +627,7 @@ static int tegra_gem_prime_mmap(struct dma_buf *buf, struct vm_area_struct *vma)
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
return tegra_gem_mmap(gem, vma);
|
||||
return __tegra_gem_mmap(gem, vma);
|
||||
}
|
||||
|
||||
static void *tegra_gem_prime_vmap(struct dma_buf *buf)
|
||||
@ -619,6 +646,8 @@ static const struct dma_buf_ops tegra_gem_prime_dmabuf_ops = {
|
||||
.map_dma_buf = tegra_gem_prime_map_dma_buf,
|
||||
.unmap_dma_buf = tegra_gem_prime_unmap_dma_buf,
|
||||
.release = tegra_gem_prime_release,
|
||||
.begin_cpu_access = tegra_gem_prime_begin_cpu_access,
|
||||
.end_cpu_access = tegra_gem_prime_end_cpu_access,
|
||||
.map_atomic = tegra_gem_prime_kmap_atomic,
|
||||
.unmap_atomic = tegra_gem_prime_kunmap_atomic,
|
||||
.map = tegra_gem_prime_kmap,
|
||||
|
||||
@ -68,10 +68,11 @@ void tegra_bo_free_object(struct drm_gem_object *gem);
|
||||
int tegra_bo_dumb_create(struct drm_file *file, struct drm_device *drm,
|
||||
struct drm_mode_create_dumb *args);
|
||||
|
||||
int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma);
|
||||
|
||||
extern const struct vm_operations_struct tegra_bo_vm_ops;
|
||||
|
||||
int __tegra_gem_mmap(struct drm_gem_object *gem, struct vm_area_struct *vma);
|
||||
int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma);
|
||||
|
||||
struct dma_buf *tegra_gem_prime_export(struct drm_device *drm,
|
||||
struct drm_gem_object *gem,
|
||||
int flags);
|
||||
|
||||
@ -49,6 +49,17 @@ static const u32 tegra_shared_plane_formats[] = {
|
||||
DRM_FORMAT_YUV422,
|
||||
};
|
||||
|
||||
static const u64 tegra_shared_plane_modifiers[] = {
|
||||
DRM_FORMAT_MOD_LINEAR,
|
||||
DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0),
|
||||
DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1),
|
||||
DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2),
|
||||
DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3),
|
||||
DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4),
|
||||
DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5),
|
||||
DRM_FORMAT_MOD_INVALID
|
||||
};
|
||||
|
||||
static inline unsigned int tegra_plane_offset(struct tegra_plane *plane,
|
||||
unsigned int offset)
|
||||
{
|
||||
@ -527,6 +538,7 @@ struct drm_plane *tegra_shared_plane_create(struct drm_device *drm,
|
||||
unsigned int possible_crtcs = 0x7;
|
||||
struct tegra_shared_plane *plane;
|
||||
unsigned int num_formats;
|
||||
const u64 *modifiers;
|
||||
struct drm_plane *p;
|
||||
const u32 *formats;
|
||||
int err;
|
||||
@ -545,10 +557,11 @@ struct drm_plane *tegra_shared_plane_create(struct drm_device *drm,
|
||||
|
||||
num_formats = ARRAY_SIZE(tegra_shared_plane_formats);
|
||||
formats = tegra_shared_plane_formats;
|
||||
modifiers = tegra_shared_plane_modifiers;
|
||||
|
||||
err = drm_universal_plane_init(drm, p, possible_crtcs,
|
||||
&tegra_plane_funcs, formats,
|
||||
num_formats, NULL, type, NULL);
|
||||
num_formats, modifiers, type, NULL);
|
||||
if (err < 0) {
|
||||
kfree(plane);
|
||||
return ERR_PTR(err);
|
||||
@ -560,6 +573,89 @@ struct drm_plane *tegra_shared_plane_create(struct drm_device *drm,
|
||||
return p;
|
||||
}
|
||||
|
||||
static struct drm_private_state *
|
||||
tegra_display_hub_duplicate_state(struct drm_private_obj *obj)
|
||||
{
|
||||
struct tegra_display_hub_state *state;
|
||||
|
||||
state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL);
|
||||
if (!state)
|
||||
return NULL;
|
||||
|
||||
__drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
|
||||
|
||||
return &state->base;
|
||||
}
|
||||
|
||||
static void tegra_display_hub_destroy_state(struct drm_private_obj *obj,
|
||||
struct drm_private_state *state)
|
||||
{
|
||||
struct tegra_display_hub_state *hub_state =
|
||||
to_tegra_display_hub_state(state);
|
||||
|
||||
kfree(hub_state);
|
||||
}
|
||||
|
||||
static const struct drm_private_state_funcs tegra_display_hub_state_funcs = {
|
||||
.atomic_duplicate_state = tegra_display_hub_duplicate_state,
|
||||
.atomic_destroy_state = tegra_display_hub_destroy_state,
|
||||
};
|
||||
|
||||
static struct tegra_display_hub_state *
|
||||
tegra_display_hub_get_state(struct tegra_display_hub *hub,
|
||||
struct drm_atomic_state *state)
|
||||
{
|
||||
struct drm_device *drm = dev_get_drvdata(hub->client.parent);
|
||||
struct drm_private_state *priv;
|
||||
|
||||
WARN_ON(!drm_modeset_is_locked(&drm->mode_config.connection_mutex));
|
||||
|
||||
priv = drm_atomic_get_private_obj_state(state, &hub->base);
|
||||
if (IS_ERR(priv))
|
||||
return ERR_CAST(priv);
|
||||
|
||||
return to_tegra_display_hub_state(priv);
|
||||
}
|
||||
|
||||
int tegra_display_hub_atomic_check(struct drm_device *drm,
|
||||
struct drm_atomic_state *state)
|
||||
{
|
||||
struct tegra_drm *tegra = drm->dev_private;
|
||||
struct tegra_display_hub_state *hub_state;
|
||||
struct drm_crtc_state *old, *new;
|
||||
struct drm_crtc *crtc;
|
||||
unsigned int i;
|
||||
|
||||
if (!tegra->hub)
|
||||
return 0;
|
||||
|
||||
hub_state = tegra_display_hub_get_state(tegra->hub, state);
|
||||
if (IS_ERR(hub_state))
|
||||
return PTR_ERR(hub_state);
|
||||
|
||||
/*
|
||||
* The display hub display clock needs to be fed by the display clock
|
||||
* with the highest frequency to ensure proper functioning of all the
|
||||
* displays.
|
||||
*
|
||||
* Note that this isn't used before Tegra186, but it doesn't hurt and
|
||||
* conditionalizing it would make the code less clean.
|
||||
*/
|
||||
for_each_oldnew_crtc_in_state(state, crtc, old, new, i) {
|
||||
struct tegra_dc_state *dc = to_dc_state(new);
|
||||
|
||||
if (new->active) {
|
||||
if (!hub_state->clk || dc->pclk > hub_state->rate) {
|
||||
hub_state->dc = to_tegra_dc(dc->base.crtc);
|
||||
hub_state->clk = hub_state->dc->clk;
|
||||
hub_state->rate = dc->pclk;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void tegra_display_hub_update(struct tegra_dc *dc)
|
||||
{
|
||||
u32 value;
|
||||
@ -585,26 +681,28 @@ static void tegra_display_hub_update(struct tegra_dc *dc)
|
||||
void tegra_display_hub_atomic_commit(struct drm_device *drm,
|
||||
struct drm_atomic_state *state)
|
||||
{
|
||||
struct tegra_atomic_state *s = to_tegra_atomic_state(state);
|
||||
struct tegra_drm *tegra = drm->dev_private;
|
||||
struct tegra_display_hub *hub = tegra->hub;
|
||||
struct tegra_display_hub_state *hub_state;
|
||||
struct device *dev = hub->client.dev;
|
||||
int err;
|
||||
|
||||
if (s->clk_disp) {
|
||||
err = clk_set_rate(s->clk_disp, s->rate);
|
||||
hub_state = tegra_display_hub_get_state(hub, state);
|
||||
|
||||
if (hub_state->clk) {
|
||||
err = clk_set_rate(hub_state->clk, hub_state->rate);
|
||||
if (err < 0)
|
||||
dev_err(dev, "failed to set rate of %pC to %lu Hz\n",
|
||||
s->clk_disp, s->rate);
|
||||
hub_state->clk, hub_state->rate);
|
||||
|
||||
err = clk_set_parent(hub->clk_disp, s->clk_disp);
|
||||
err = clk_set_parent(hub->clk_disp, hub_state->clk);
|
||||
if (err < 0)
|
||||
dev_err(dev, "failed to set parent of %pC to %pC: %d\n",
|
||||
hub->clk_disp, s->clk_disp, err);
|
||||
hub->clk_disp, hub_state->clk, err);
|
||||
}
|
||||
|
||||
if (s->dc)
|
||||
tegra_display_hub_update(s->dc);
|
||||
if (hub_state->dc)
|
||||
tegra_display_hub_update(hub_state->dc);
|
||||
}
|
||||
|
||||
static int tegra_display_hub_init(struct host1x_client *client)
|
||||
@ -612,6 +710,14 @@ static int tegra_display_hub_init(struct host1x_client *client)
|
||||
struct tegra_display_hub *hub = to_tegra_display_hub(client);
|
||||
struct drm_device *drm = dev_get_drvdata(client->parent);
|
||||
struct tegra_drm *tegra = drm->dev_private;
|
||||
struct tegra_display_hub_state *state;
|
||||
|
||||
state = kzalloc(sizeof(*state), GFP_KERNEL);
|
||||
if (!state)
|
||||
return -ENOMEM;
|
||||
|
||||
drm_atomic_private_obj_init(&hub->base, &state->base,
|
||||
&tegra_display_hub_state_funcs);
|
||||
|
||||
tegra->hub = hub;
|
||||
|
||||
@ -623,6 +729,7 @@ static int tegra_display_hub_exit(struct host1x_client *client)
|
||||
struct drm_device *drm = dev_get_drvdata(client->parent);
|
||||
struct tegra_drm *tegra = drm->dev_private;
|
||||
|
||||
drm_atomic_private_obj_fini(&tegra->hub->base);
|
||||
tegra->hub = NULL;
|
||||
|
||||
return 0;
|
||||
|
||||
@ -41,6 +41,7 @@ struct tegra_display_hub_soc {
|
||||
};
|
||||
|
||||
struct tegra_display_hub {
|
||||
struct drm_private_obj base;
|
||||
struct host1x_client client;
|
||||
struct clk *clk_disp;
|
||||
struct clk *clk_dsc;
|
||||
@ -57,6 +58,20 @@ to_tegra_display_hub(struct host1x_client *client)
|
||||
return container_of(client, struct tegra_display_hub, client);
|
||||
}
|
||||
|
||||
struct tegra_display_hub_state {
|
||||
struct drm_private_state base;
|
||||
|
||||
struct tegra_dc *dc;
|
||||
unsigned long rate;
|
||||
struct clk *clk;
|
||||
};
|
||||
|
||||
static inline struct tegra_display_hub_state *
|
||||
to_tegra_display_hub_state(struct drm_private_state *priv)
|
||||
{
|
||||
return container_of(priv, struct tegra_display_hub_state, base);
|
||||
}
|
||||
|
||||
struct tegra_dc;
|
||||
struct tegra_plane;
|
||||
|
||||
@ -68,6 +83,8 @@ struct drm_plane *tegra_shared_plane_create(struct drm_device *drm,
|
||||
unsigned int wgrp,
|
||||
unsigned int index);
|
||||
|
||||
int tegra_display_hub_atomic_check(struct drm_device *drm,
|
||||
struct drm_atomic_state *state);
|
||||
void tegra_display_hub_atomic_commit(struct drm_device *drm,
|
||||
struct drm_atomic_state *state);
|
||||
|
||||
|
||||
@ -68,6 +68,21 @@ static void tegra_plane_atomic_destroy_state(struct drm_plane *plane,
|
||||
kfree(state);
|
||||
}
|
||||
|
||||
static bool tegra_plane_format_mod_supported(struct drm_plane *plane,
|
||||
uint32_t format,
|
||||
uint64_t modifier)
|
||||
{
|
||||
const struct drm_format_info *info = drm_format_info(format);
|
||||
|
||||
if (modifier == DRM_FORMAT_MOD_LINEAR)
|
||||
return true;
|
||||
|
||||
if (info->num_planes == 1)
|
||||
return true;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
const struct drm_plane_funcs tegra_plane_funcs = {
|
||||
.update_plane = drm_atomic_helper_update_plane,
|
||||
.disable_plane = drm_atomic_helper_disable_plane,
|
||||
@ -75,6 +90,7 @@ const struct drm_plane_funcs tegra_plane_funcs = {
|
||||
.reset = tegra_plane_reset,
|
||||
.atomic_duplicate_state = tegra_plane_atomic_duplicate_state,
|
||||
.atomic_destroy_state = tegra_plane_atomic_destroy_state,
|
||||
.format_mod_supported = tegra_plane_format_mod_supported,
|
||||
};
|
||||
|
||||
int tegra_plane_state_add(struct tegra_plane *plane,
|
||||
@ -296,8 +312,8 @@ int tegra_plane_format_get_alpha(unsigned int opaque, unsigned int *alpha)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
unsigned int tegra_plane_get_overlap_index(struct tegra_plane *plane,
|
||||
struct tegra_plane *other)
|
||||
static unsigned int tegra_plane_get_overlap_index(struct tegra_plane *plane,
|
||||
struct tegra_plane *other)
|
||||
{
|
||||
unsigned int index = 0, i;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user