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i2c: designware: Move clk_freq into struct dw_i2c_dev
I2c designware controller operate speed is configured in the register IC_CON. Previously the operate speed is determined by a local variable clk_freq. This patch will move the local variable clk_freq into struct dw_i2c_dev. This change will ease the set and get of the clk_freq. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -57,6 +57,7 @@
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* @tx_fifo_depth: depth of the hardware tx fifo
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* @tx_fifo_depth: depth of the hardware tx fifo
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* @rx_fifo_depth: depth of the hardware rx fifo
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* @rx_fifo_depth: depth of the hardware rx fifo
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* @rx_outstanding: current master-rx elements in tx fifo
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* @rx_outstanding: current master-rx elements in tx fifo
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* @clk_freq: bus clock frequency
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* @ss_hcnt: standard speed HCNT value
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* @ss_hcnt: standard speed HCNT value
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* @ss_lcnt: standard speed LCNT value
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* @ss_lcnt: standard speed LCNT value
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* @fs_hcnt: fast speed HCNT value
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* @fs_hcnt: fast speed HCNT value
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@ -96,6 +97,7 @@ struct dw_i2c_dev {
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unsigned int tx_fifo_depth;
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unsigned int tx_fifo_depth;
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unsigned int rx_fifo_depth;
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unsigned int rx_fifo_depth;
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int rx_outstanding;
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int rx_outstanding;
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u32 clk_freq;
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u32 sda_hold_time;
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u32 sda_hold_time;
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u32 sda_falling_time;
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u32 sda_falling_time;
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u32 scl_falling_time;
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u32 scl_falling_time;
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@ -155,7 +155,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
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struct i2c_adapter *adap;
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struct i2c_adapter *adap;
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struct resource *mem;
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struct resource *mem;
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int irq, r;
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int irq, r;
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u32 clk_freq, ht = 0;
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u32 ht = 0;
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irq = platform_get_irq(pdev, 0);
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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if (irq < 0)
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@ -175,10 +175,10 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, dev);
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platform_set_drvdata(pdev, dev);
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/* fast mode by default because of legacy reasons */
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/* fast mode by default because of legacy reasons */
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clk_freq = 400000;
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dev->clk_freq = 400000;
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if (pdata) {
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if (pdata) {
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clk_freq = pdata->i2c_scl_freq;
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dev->clk_freq = pdata->i2c_scl_freq;
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} else {
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} else {
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device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
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device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
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&ht);
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&ht);
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@ -187,7 +187,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
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device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
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device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
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&dev->scl_falling_time);
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&dev->scl_falling_time);
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device_property_read_u32(&pdev->dev, "clock-frequency",
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device_property_read_u32(&pdev->dev, "clock-frequency",
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&clk_freq);
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&dev->clk_freq);
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}
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}
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if (has_acpi_companion(&pdev->dev))
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if (has_acpi_companion(&pdev->dev))
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@ -196,7 +196,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
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/*
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/*
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* Only standard mode at 100kHz and fast mode at 400kHz are supported.
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* Only standard mode at 100kHz and fast mode at 400kHz are supported.
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*/
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*/
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if (clk_freq != 100000 && clk_freq != 400000) {
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if (dev->clk_freq != 100000 && dev->clk_freq != 400000) {
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dev_err(&pdev->dev, "Only 100kHz and 400kHz supported");
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dev_err(&pdev->dev, "Only 100kHz and 400kHz supported");
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -212,7 +212,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
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I2C_FUNC_SMBUS_BYTE_DATA |
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I2C_FUNC_SMBUS_BYTE_DATA |
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I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_I2C_BLOCK;
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I2C_FUNC_SMBUS_I2C_BLOCK;
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if (clk_freq == 100000)
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if (dev->clk_freq == 100000)
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dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
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dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
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DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_STD;
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DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_STD;
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else
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else
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