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https://github.com/edk2-porting/linux-next.git
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Merge remote branch 'korg/drm-radeon-next' into drm-linus
* korg/drm-radeon-next drm/radeon/kms: only evict to GTT if CP is ready drm/radeon/kms: Fix crash getting TV info with no BIOS. drm/radeon/kms/rv100: reject modes > 135 Mhz on DVI (v2) drm/radeon/kms/r6xx+: make irq handler less verbose drm/radeon/kms: fix up LVDS handling on macs (v2)
This commit is contained in:
commit
194fda0dd8
@ -2729,7 +2729,7 @@ restart_ih:
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}
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break;
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default:
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DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
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DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
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break;
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}
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break;
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@ -2749,7 +2749,7 @@ restart_ih:
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}
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break;
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default:
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DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
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DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
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break;
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}
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break;
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@ -2798,7 +2798,7 @@ restart_ih:
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}
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break;
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default:
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DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
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DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
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break;
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}
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break;
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@ -2812,7 +2812,7 @@ restart_ih:
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DRM_DEBUG("IH: CP EOP\n");
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break;
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default:
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DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
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DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
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break;
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}
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@ -687,6 +687,9 @@ radeon_combios_get_tv_info(struct radeon_device *rdev)
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uint16_t tv_info;
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enum radeon_tv_std tv_std = TV_STD_NTSC;
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if (rdev->bios == NULL)
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return tv_std;
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tv_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE);
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if (tv_info) {
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if (RBIOS8(tv_info + 6) == 'T') {
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@ -900,10 +900,18 @@ static void radeon_dvi_force(struct drm_connector *connector)
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static int radeon_dvi_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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struct drm_device *dev = connector->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_connector *radeon_connector = to_radeon_connector(connector);
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/* XXX check mode bandwidth */
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/* clocks over 135 MHz have heat issues with DVI on RV100 */
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if (radeon_connector->use_digital &&
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(rdev->family == CHIP_RV100) &&
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(mode->clock > 135000))
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return MODE_CLOCK_HIGH;
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if (radeon_connector->use_digital && (mode->clock > 165000)) {
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if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
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(radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
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@ -46,6 +46,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
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struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man;
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int panel_pwr_delay = 2000;
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bool is_mac = false;
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DRM_DEBUG("\n");
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if (radeon_encoder->enc_priv) {
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@ -58,6 +59,15 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
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}
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}
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/* macs (and possibly some x86 oem systems?) wire up LVDS strangely
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* Taken from radeonfb.
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*/
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if ((rdev->mode_info.connector_table == CT_IBOOK) ||
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(rdev->mode_info.connector_table == CT_POWERBOOK_EXTERNAL) ||
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(rdev->mode_info.connector_table == CT_POWERBOOK_INTERNAL) ||
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(rdev->mode_info.connector_table == CT_POWERBOOK_VGA))
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is_mac = true;
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switch (mode) {
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case DRM_MODE_DPMS_ON:
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disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN);
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@ -74,6 +84,8 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
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lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
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lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON);
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if (is_mac)
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lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
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lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS);
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udelay(panel_pwr_delay * 1000);
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WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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@ -85,7 +97,14 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
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WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
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lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
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lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
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lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
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if (is_mac) {
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lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN;
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WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN);
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} else {
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WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
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}
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udelay(panel_pwr_delay * 1000);
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WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
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WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
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@ -215,7 +215,10 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo,
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rbo = container_of(bo, struct radeon_bo, tbo);
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switch (bo->mem.mem_type) {
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case TTM_PL_VRAM:
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radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
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if (rbo->rdev->cp.ready == false)
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radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
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else
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radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
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break;
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case TTM_PL_TT:
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default:
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