mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-16 01:04:08 +08:00
ARM: Device-tree updates
Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
New machines:
- The new Action Semi S500 platform is added along with initial
support for the LeMaker Guitar board.
- STM32 gains support for three new boards: stm32h743-disco,
stm32f746-disco, and stm32f769-disco, along with new device
support for the existing stm32f429 boards.
- Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H
with 10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module
plus board.
- On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
wireless router.
- For NXP i.MX, we gain support for the Gateworks Ventana GW5600
and the Technexion Pico i.MX7D single-board computers.
- The BeagleBone Blue is added for OMAP, it's the latest variation
of the popular Beaglebone Black single-board computer.
- The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards
are added, these are the latest variations of a seemingly endless
supply of similar single-board computers.
Other updates:
- Linus Walleij improves support for the "Faraday" based SoC platforms
from various SoC makers (Moxart, Aspeed, Gemini)
- The ARM Mali GPU is now describe on Rockchips SoCs
- Mediatek MT7623 is extended significantly, making it much
more useful.
- Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
Allwinner, Qualcomm, iMX
- For Amlogic, the clock support is extended a lot on meson8b.
- We now build the devicetree file for the Raspberry Pi 3 on 32-bit
ARM, in addition to the existing ARM64 support, to help users
wanting to run a 32-bit system on it.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWVpLH2CrR//JCVInAQK5hxAAj8u8Y1RFWsfEXqAeGBme7PdiilEfm1ZR
U6wu6unW/zUb+QwQj52hzmYB9+FEd/bcNgw4AqEzypqMA+vJ6AP5tpujCrOXREsG
sk2LBnhOi/QbYfzIH6MYqjnrMbjSZ3LZpJ8+PSO+DpGwMkSKhWG5Jjjf1V69IbYJ
8eTpsnDbpo1OA4mtj+7fDxKGdH2WFx4922UuqTSzgoIqaTV1X2wcicpiJsfKynXY
3I9Apwhf/gKbtkWkVlNW7gxaAHONZOHEJ9rgIu6XoUCKbQrtbjZWEbKDUM1nJq5J
4ZYbd9r1HZvujuLk2/IuKTidmXj/4Q1FiIn4jqHINVqNj8dPKKYIoW5nU8rlbxG/
Ymy9WRY97YznWai49dnURGRbPNuiGyd9oaVsw7Wi1G2F4PgkAMgHs1rpERtIgnZg
ZzPxlXZdowYUgL6Qawk3//81QqGG/YL8VZ+VltPkjFNNYtEk0U+j3xW/n2ORAdvT
8EuNlTKid0Cq045nKkpAd5AWcgHIJe7IE3KiX/SpBtgH5PINlnUnwnm2f2TjRZCh
bw3g32er1JLSW9lAl6agu58lxox7NC1AV4Qy7Qk23IsR2mAv5gb5zad5GXwE41nT
qcyJ4OnDUpv/3f0LmH3WATQeHNnG8l8RgY8B6fH2GLlTQdmO7W7UTJ8tWU8E2sZ8
5xPePuor0JM=
=onXv
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM device-tree updates from Arnd Bergmann:
"Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
New machines:
- The new Action Semi S500 platform is added along with initial
support for the LeMaker Guitar board.
- STM32 gains support for three new boards: stm32h743-disco,
stm32f746-disco, and stm32f769-disco, along with new device support
for the existing stm32f429 boards.
- Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H with
10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module plus
board.
- On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
wireless router.
- For NXP i.MX, we gain support for the Gateworks Ventana GW5600 and
the Technexion Pico i.MX7D single-board computers.
- The BeagleBone Blue is added for OMAP, it's the latest variation of
the popular Beaglebone Black single-board computer.
- The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards are
added, these are the latest variations of a seemingly endless
supply of similar single-board computers.
Other updates:
- Linus Walleij improves support for the "Faraday" based SoC
platforms from various SoC makers (Moxart, Aspeed, Gemini)
- The ARM Mali GPU is now describe on Rockchips SoCs
- Mediatek MT7623 is extended significantly, making it much more
useful.
- Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
Allwinner, Qualcomm, iMX
- For Amlogic, the clock support is extended a lot on meson8b.
- We now build the devicetree file for the Raspberry Pi 3 on 32-bit
ARM, in addition to the existing ARM64 support, to help users
wanting to run a 32-bit system on it"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (345 commits)
ARM: dts: socfpga: set the i2c frequency
ARM: dts: socfpga: Add second ethernet alias to VINING FPGA
ARM: dts: socfpga: Drop LED node from VINING FPGA
ARM: dts: socfpga: Remove I2C EEPROMs from VINING FPGA
ARM: dts: socfpga: Enable QSPI support on VINING FPGA
ARM: dts: socfpga: Fix the ethernet clock phandle
ARM: pxa: Use - instead of @ for DT OPP entries
ARM: dts: owl-s500: Add SPS node
ARM: dts: owl-s500: Set CPU enable-method
dt-bindings: arm: cpus: Add S500 enable-method
ARM: dts: Add Actions Semi S500 and LeMaker Guitar
dt-bindings: arm: Document Actions Semi S900
dt-bindings: timer: Document Owl timer
ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes
dt-bindings: arm: Document Actions Semi S500
dt-bindings: Add vendor prefix for Actions Semi
ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
ARM: dts: armada-385-linksys: fixup button node names
ARM: dts: armada-385-linksys: group pins in pinctrl
...
This commit is contained in:
Linus Torvalds
commit
1849f800fb
39
Documentation/devicetree/bindings/arm/actions.txt
Normal file
39
Documentation/devicetree/bindings/arm/actions.txt
Normal file
@ -0,0 +1,39 @@
|
||||
Actions Semi platforms device tree bindings
|
||||
-------------------------------------------
|
||||
|
||||
|
||||
S500 SoC
|
||||
========
|
||||
|
||||
Required root node properties:
|
||||
|
||||
- compatible : must contain "actions,s500"
|
||||
|
||||
|
||||
Modules:
|
||||
|
||||
Root node property compatible must contain, depending on module:
|
||||
|
||||
- LeMaker Guitar: "lemaker,guitar"
|
||||
|
||||
|
||||
Boards:
|
||||
|
||||
Root node property compatible must contain, depending on board:
|
||||
|
||||
- LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar"
|
||||
|
||||
|
||||
S900 SoC
|
||||
========
|
||||
|
||||
Required root node properties:
|
||||
|
||||
- compatible : must contain "actions,s900"
|
||||
|
||||
|
||||
Boards:
|
||||
|
||||
Root node property compatible must contain, depending on board:
|
||||
|
||||
- uCRobotics Bubblegum-96: "ucrobotics,bubblegum-96"
|
||||
@ -193,6 +193,7 @@ nodes to be present and contain the properties described below.
|
||||
"spin-table"
|
||||
# On ARM 32-bit systems this property is optional and
|
||||
can be one of:
|
||||
"actions,s500-smp"
|
||||
"allwinner,sun6i-a31"
|
||||
"allwinner,sun8i-a23"
|
||||
"arm,realview-smp"
|
||||
|
||||
@ -24,6 +24,19 @@ Required nodes:
|
||||
global control registers, with the compatible string
|
||||
"cortina,gemini-syscon", "syscon";
|
||||
|
||||
Required properties on the syscon:
|
||||
- reg: syscon register location and size.
|
||||
- #clock-cells: should be set to <1> - the system controller is also a
|
||||
clock provider.
|
||||
- #reset-cells: should be set to <1> - the system controller is also a
|
||||
reset line provider.
|
||||
|
||||
The clock sources have shorthand defines in the include file:
|
||||
<dt-bindings/clock/cortina,gemini-clock.h>
|
||||
|
||||
The reset lines have shorthand defines in the include file:
|
||||
<dt-bindings/reset/cortina,gemini-reset.h>
|
||||
|
||||
- timer: the soc bus node must have a timer node pointing to the SoC timer
|
||||
block, with the compatible string "cortina,gemini-timer"
|
||||
See: clocksource/cortina,gemini-timer.txt
|
||||
@ -56,12 +69,15 @@ Example:
|
||||
syscon: syscon@40000000 {
|
||||
compatible = "cortina,gemini-syscon", "syscon";
|
||||
reg = <0x40000000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
uart0: serial@42000000 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x42000000 0x100>;
|
||||
clock-frequency = <48000000>;
|
||||
resets = <&syscon GEMINI_RESET_UART>;
|
||||
clocks = <&syscon GEMINI_CLK_UART>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-shift = <2>;
|
||||
};
|
||||
@ -73,12 +89,18 @@ Example:
|
||||
interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */
|
||||
<15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
|
||||
<16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */
|
||||
resets = <&syscon GEMINI_RESET_TIMER>;
|
||||
/* APB clock or RTC clock */
|
||||
clocks = <&syscon GEMINI_CLK_APB>,
|
||||
<&syscon GEMINI_CLK_RTC>;
|
||||
clock-names = "PCLK", "EXTCLK";
|
||||
syscon = <&syscon>;
|
||||
};
|
||||
|
||||
intcon: interrupt-controller@48000000 {
|
||||
compatible = "cortina,gemini-interrupt-controller";
|
||||
reg = <0x48000000 0x1000>;
|
||||
resets = <&syscon GEMINI_RESET_INTCON0>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
@ -37,3 +37,6 @@ Boards:
|
||||
|
||||
- K2G EVM
|
||||
compatible = "ti,k2g-evm", "ti,k2g", "ti-keystone"
|
||||
|
||||
- K2G Industrial Communication Engine EVM
|
||||
compatible = "ti,k2g-ice", "ti,k2g", "ti-keystone"
|
||||
|
||||
@ -138,9 +138,9 @@ Rockchip platforms device tree bindings
|
||||
Required root node properties:
|
||||
- compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
|
||||
|
||||
- Rockchip RK1108 Evaluation board
|
||||
- Rockchip RV1108 Evaluation board
|
||||
Required root node properties:
|
||||
- compatible = "rockchip,rk1108-evb", "rockchip,rk1108";
|
||||
- compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
|
||||
|
||||
- Rockchip RK3368 evb:
|
||||
Required root node properties:
|
||||
|
||||
@ -55,12 +55,19 @@ Boards:
|
||||
compatible = "renesas,bockw", "renesas,r8a7778"
|
||||
- Genmai (RTK772100BC00000BR)
|
||||
compatible = "renesas,genmai", "renesas,r7s72100"
|
||||
- GR-Peach (X28A-M01-E/F)
|
||||
compatible = "renesas,gr-peach", "renesas,r7s72100"
|
||||
- Gose (RTP0RC7793SEB00010S)
|
||||
compatible = "renesas,gose", "renesas,r8a7793"
|
||||
- H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKB00010S)
|
||||
- H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
|
||||
H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
|
||||
compatible = "renesas,h3ulcb", "renesas,r8a7795";
|
||||
- Henninger
|
||||
compatible = "renesas,henninger", "renesas,r8a7791"
|
||||
- iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
|
||||
compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"
|
||||
- iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
|
||||
compatible = "iwave,g20m", "renesas,r8a7743"
|
||||
- Koelsch (RTP0RC7791SEB00010S)
|
||||
compatible = "renesas,koelsch", "renesas,r8a7791"
|
||||
- Kyoto Microcomputer Co. KZM-A9-Dual
|
||||
@ -69,7 +76,7 @@ Boards:
|
||||
compatible = "renesas,kzm9g", "renesas,sh73a0"
|
||||
- Lager (RTP0RC7790SEB00010S)
|
||||
compatible = "renesas,lager", "renesas,r8a7790"
|
||||
- M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S)
|
||||
- M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
|
||||
compatible = "renesas,m3ulcb", "renesas,r8a7796";
|
||||
- Marzen (R0P7779A00010S)
|
||||
compatible = "renesas,marzen", "renesas,r8a7779"
|
||||
@ -81,6 +88,8 @@ Boards:
|
||||
compatible = "renesas,salvator-x", "renesas,r8a7795";
|
||||
- Salvator-X (RTP0RC7796SIPB0011S)
|
||||
compatible = "renesas,salvator-x", "renesas,r8a7796";
|
||||
- Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
|
||||
compatible = "renesas,salvator-xs", "renesas,r8a7795";
|
||||
- SILK (RTP0RC7794LCB00011S)
|
||||
compatible = "renesas,silk", "renesas,r8a7794"
|
||||
- SK-RZG1E (YR8A77450S000BE)
|
||||
|
||||
@ -29,7 +29,6 @@ board-specific compatible values:
|
||||
nvidia,harmony
|
||||
nvidia,seaboard
|
||||
nvidia,ventana
|
||||
nvidia,whistler
|
||||
toradex,apalis_t30
|
||||
toradex,apalis_t30-eval
|
||||
toradex,apalis-tk1
|
||||
|
||||
@ -63,64 +63,64 @@ cpu0_opp_table: opp-table {
|
||||
* because they can not be enabled simultaneously on a
|
||||
* single SoC.
|
||||
*/
|
||||
opp50@300000000 {
|
||||
opp50-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <950000 931000 969000>;
|
||||
opp-supported-hw = <0x06 0x0010>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp100@275000000 {
|
||||
opp100-275000000 {
|
||||
opp-hz = /bits/ 64 <275000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0x01 0x00FF>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp100@300000000 {
|
||||
opp100-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0x06 0x0020>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp100@500000000 {
|
||||
opp100-500000000 {
|
||||
opp-hz = /bits/ 64 <500000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0x01 0xFFFF>;
|
||||
};
|
||||
|
||||
opp100@600000000 {
|
||||
opp100-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0x06 0x0040>;
|
||||
};
|
||||
|
||||
opp120@600000000 {
|
||||
opp120-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <1200000 1176000 1224000>;
|
||||
opp-supported-hw = <0x01 0xFFFF>;
|
||||
};
|
||||
|
||||
opp120@720000000 {
|
||||
opp120-720000000 {
|
||||
opp-hz = /bits/ 64 <720000000>;
|
||||
opp-microvolt = <1200000 1176000 1224000>;
|
||||
opp-supported-hw = <0x06 0x0080>;
|
||||
};
|
||||
|
||||
oppturbo@720000000 {
|
||||
oppturbo-720000000 {
|
||||
opp-hz = /bits/ 64 <720000000>;
|
||||
opp-microvolt = <1260000 1234800 1285200>;
|
||||
opp-supported-hw = <0x01 0xFFFF>;
|
||||
};
|
||||
|
||||
oppturbo@800000000 {
|
||||
oppturbo-800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <1260000 1234800 1285200>;
|
||||
opp-supported-hw = <0x06 0x0100>;
|
||||
};
|
||||
|
||||
oppnitro@1000000000 {
|
||||
oppnitro-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <1325000 1298500 1351500>;
|
||||
opp-supported-hw = <0x04 0x0200>;
|
||||
|
||||
@ -5,9 +5,13 @@ Required properties:
|
||||
- reg: Should contain GPIO controller registers location and length
|
||||
- interrupts: Should be the port interrupt shared by all the pins.
|
||||
- #gpio-cells: Should be two. The first cell is the pin number and
|
||||
the second cell is used to specify optional parameters (currently
|
||||
unused).
|
||||
the second cell is used to specify optional parameters to declare if the GPIO
|
||||
is active high or low. See gpio.txt.
|
||||
- gpio-controller: Marks the device node as a GPIO controller.
|
||||
- interrupt-controller: Marks the device node as an interrupt controller.
|
||||
- #interrupt-cells: Should be two. The first cell is the pin number and the
|
||||
second cell is used to specify irq type flags, see the two cell description
|
||||
in interrupt-controller/interrupts.txt for details.
|
||||
|
||||
optional properties:
|
||||
- #gpio-lines: Number of gpio if absent 32.
|
||||
@ -21,5 +25,7 @@ Example:
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-lines = <19>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
|
||||
86
Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
Normal file
86
Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
Normal file
@ -0,0 +1,86 @@
|
||||
ARM Mali Midgard GPU
|
||||
====================
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible :
|
||||
* Must contain one of the following:
|
||||
+ "arm,mali-t604"
|
||||
+ "arm,mali-t624"
|
||||
+ "arm,mali-t628"
|
||||
+ "arm,mali-t720"
|
||||
+ "arm,mali-t760"
|
||||
+ "arm,mali-t820"
|
||||
+ "arm,mali-t830"
|
||||
+ "arm,mali-t860"
|
||||
+ "arm,mali-t880"
|
||||
* which must be preceded by one of the following vendor specifics:
|
||||
+ "amlogic,meson-gxm-mali"
|
||||
+ "rockchip,rk3288-mali"
|
||||
|
||||
- reg : Physical base address of the device and length of the register area.
|
||||
|
||||
- interrupts : Contains the three IRQ lines required by Mali Midgard devices.
|
||||
|
||||
- interrupt-names : Contains the names of IRQ resources in the order they were
|
||||
provided in the interrupts property. Must contain: "job", "mmu", "gpu".
|
||||
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clocks : Phandle to clock for the Mali Midgard device.
|
||||
|
||||
- mali-supply : Phandle to regulator for the Mali device. Refer to
|
||||
Documentation/devicetree/bindings/regulator/regulator.txt for details.
|
||||
|
||||
- operating-points-v2 : Refer to Documentation/devicetree/bindings/power/opp.txt
|
||||
for details.
|
||||
|
||||
|
||||
Example for a Mali-T760:
|
||||
|
||||
gpu@ffa30000 {
|
||||
compatible = "rockchip,rk3288-mali", "arm,mali-t760", "arm,mali-midgard";
|
||||
reg = <0xffa30000 0x10000>;
|
||||
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "job", "mmu", "gpu";
|
||||
clocks = <&cru ACLK_GPU>;
|
||||
mali-supply = <&vdd_gpu>;
|
||||
operating-points-v2 = <&gpu_opp_table>;
|
||||
power-domains = <&power RK3288_PD_GPU>;
|
||||
};
|
||||
|
||||
gpu_opp_table: opp_table0 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp@533000000 {
|
||||
opp-hz = /bits/ 64 <533000000>;
|
||||
opp-microvolt = <1250000>;
|
||||
};
|
||||
opp@450000000 {
|
||||
opp-hz = /bits/ 64 <450000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
};
|
||||
opp@400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1125000>;
|
||||
};
|
||||
opp@350000000 {
|
||||
opp-hz = /bits/ 64 <350000000>;
|
||||
opp-microvolt = <1075000>;
|
||||
};
|
||||
opp@266000000 {
|
||||
opp-hz = /bits/ 64 <266000000>;
|
||||
opp-microvolt = <1025000>;
|
||||
};
|
||||
opp@160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
opp-microvolt = <925000>;
|
||||
};
|
||||
opp@100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <912500>;
|
||||
};
|
||||
};
|
||||
@ -59,8 +59,22 @@ Required properties:
|
||||
- reg: should contain 2 register ranges. The first one is pointing to the PMECC
|
||||
block, and the second one to the PMECC_ERRLOC block.
|
||||
|
||||
* SAMA5 NFC I/O bindings:
|
||||
|
||||
SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page
|
||||
operations. This interface to this logic is placed in a separate I/O range and
|
||||
should thus have its own DT node.
|
||||
|
||||
- compatible: should be "atmel,sama5d3-nfc-io", "syscon".
|
||||
- reg: should contain the I/O range used to interact with the NFC logic.
|
||||
|
||||
Example:
|
||||
|
||||
nfc_io: nfc-io@70000000 {
|
||||
compatible = "atmel,sama5d3-nfc-io", "syscon";
|
||||
reg = <0x70000000 0x8000000>;
|
||||
};
|
||||
|
||||
pmecc: ecc-engine@ffffc070 {
|
||||
compatible = "atmel,at91sam9g45-pmecc";
|
||||
reg = <0xffffc070 0x490>,
|
||||
|
||||
@ -0,0 +1,20 @@
|
||||
Actions Semi Owl Timer
|
||||
|
||||
Required properties:
|
||||
- compatible : "actions,s500-timer" for S500
|
||||
"actions,s900-timer" for S900
|
||||
- reg : Offset and length of the register set for the device.
|
||||
- interrupts : Should contain the interrupts.
|
||||
- interrupt-names : Valid names are: "2hz0", "2hz1",
|
||||
"timer0", "timer1", "timer2", "timer3"
|
||||
See ../resource-names.txt
|
||||
|
||||
Example:
|
||||
|
||||
timer@b0168000 {
|
||||
compatible = "actions,s500-timer";
|
||||
reg = <0xb0168000 0x100>;
|
||||
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "timer0", "timer1";
|
||||
};
|
||||
@ -5,6 +5,7 @@ using them to avoid name-space collisions.
|
||||
|
||||
abcn Abracon Corporation
|
||||
abilis Abilis Systems
|
||||
actions Actions Semiconductor Co., Ltd.
|
||||
active-semi Active-Semi International Inc
|
||||
ad Avionic Design GmbH
|
||||
adapteva Adapteva, Inc.
|
||||
|
||||
@ -72,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
|
||||
bcm2835-rpi-b-plus.dtb \
|
||||
bcm2835-rpi-a-plus.dtb \
|
||||
bcm2836-rpi-2-b.dtb \
|
||||
bcm2837-rpi-3-b.dtb \
|
||||
bcm2835-rpi-zero.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_5301X) += \
|
||||
bcm4708-asus-rt-ac56u.dtb \
|
||||
@ -204,7 +205,8 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \
|
||||
keystone-k2hk-evm.dtb \
|
||||
keystone-k2l-evm.dtb \
|
||||
keystone-k2e-evm.dtb \
|
||||
keystone-k2g-evm.dtb
|
||||
keystone-k2g-evm.dtb \
|
||||
keystone-k2g-ice.dtb
|
||||
dtb-$(CONFIG_MACH_KIRKWOOD) += \
|
||||
kirkwood-b3.dtb \
|
||||
kirkwood-blackarmor-nas220.dtb \
|
||||
@ -363,6 +365,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-gw551x.dtb \
|
||||
imx6dl-gw552x.dtb \
|
||||
imx6dl-gw553x.dtb \
|
||||
imx6dl-gw560x.dtb \
|
||||
imx6dl-gw5903.dtb \
|
||||
imx6dl-gw5904.dtb \
|
||||
imx6dl-hummingboard.dtb \
|
||||
@ -408,6 +411,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-gw551x.dtb \
|
||||
imx6q-gw552x.dtb \
|
||||
imx6q-gw553x.dtb \
|
||||
imx6q-gw560x.dtb \
|
||||
imx6q-gw5903.dtb \
|
||||
imx6q-gw5904.dtb \
|
||||
imx6q-h100.dtb \
|
||||
@ -476,6 +480,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
|
||||
imx7d-cl-som-imx7.dtb \
|
||||
imx7d-colibri-eval-v3.dtb \
|
||||
imx7d-nitrogen7.dtb \
|
||||
imx7d-pico.dtb \
|
||||
imx7d-sbc-imx7.dtb \
|
||||
imx7d-sdb.dtb \
|
||||
imx7d-sdb-sht11.dtb \
|
||||
@ -603,6 +608,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
|
||||
am335x-bone.dtb \
|
||||
am335x-boneblack.dtb \
|
||||
am335x-boneblack-wireless.dtb \
|
||||
am335x-boneblue.dtb \
|
||||
am335x-bonegreen.dtb \
|
||||
am335x-bonegreen-wireless.dtb \
|
||||
am335x-chiliboard.dtb \
|
||||
@ -663,6 +669,8 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
|
||||
orion5x-maxtor-shared-storage-2.dtb \
|
||||
orion5x-netgear-wnr854t.dtb \
|
||||
orion5x-rd88f5182-nas.dtb
|
||||
dtb-$(CONFIG_ARCH_ACTIONS) += \
|
||||
owl-s500-guitar-bb-rev-b.dtb
|
||||
dtb-$(CONFIG_ARCH_PRIMA2) += \
|
||||
prima2-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_OXNAS) += \
|
||||
@ -701,9 +709,11 @@ dtb-$(CONFIG_ARCH_REALVIEW) += \
|
||||
dtb-$(CONFIG_ARCH_RENESAS) += \
|
||||
emev2-kzm9d.dtb \
|
||||
r7s72100-genmai.dtb \
|
||||
r7s72100-gr-peach.dtb \
|
||||
r7s72100-rskrza1.dtb \
|
||||
r8a73a4-ape6evm.dtb \
|
||||
r8a7740-armadillo800eva.dtb \
|
||||
r8a7743-iwg20d-q7.dtb \
|
||||
r8a7743-sk-rzg1m.dtb \
|
||||
r8a7745-sk-rzg1e.dtb \
|
||||
r8a7778-bockw.dtb \
|
||||
@ -718,7 +728,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
|
||||
r8a7794-silk.dtb \
|
||||
sh73a0-kzm9g.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rk1108-evb.dtb \
|
||||
rv1108-evb.dtb \
|
||||
rk3036-evb.dtb \
|
||||
rk3036-kylin.dtb \
|
||||
rk3066a-bqcurie2.dtb \
|
||||
@ -790,9 +800,12 @@ dtb-$(CONFIG_ARCH_STI) += \
|
||||
dtb-$(CONFIG_ARCH_STM32)+= \
|
||||
stm32f429-disco.dtb \
|
||||
stm32f469-disco.dtb \
|
||||
stm32f746-disco.dtb \
|
||||
stm32f769-disco.dtb \
|
||||
stm32429i-eval.dtb \
|
||||
stm32746g-eval.dtb \
|
||||
stm32h743i-eval.dtb
|
||||
stm32h743i-eval.dtb \
|
||||
stm32h743i-disco.dtb
|
||||
dtb-$(CONFIG_MACH_SUN4I) += \
|
||||
sun4i-a10-a1000.dtb \
|
||||
sun4i-a10-ba10-tvbox.dtb \
|
||||
@ -895,6 +908,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
|
||||
sun8i-h3-bananapi-m2-plus.dtb \
|
||||
sun8i-h3-beelink-x2.dtb \
|
||||
sun8i-h3-nanopi-m1.dtb \
|
||||
sun8i-h3-nanopi-m1-plus.dtb \
|
||||
sun8i-h3-nanopi-neo.dtb \
|
||||
sun8i-h3-nanopi-neo-air.dtb \
|
||||
sun8i-h3-orangepi-2.dtb \
|
||||
@ -905,7 +919,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
|
||||
sun8i-h3-orangepi-plus.dtb \
|
||||
sun8i-h3-orangepi-plus2e.dtb \
|
||||
sun8i-r16-parrot.dtb \
|
||||
sun8i-v3s-licheepi-zero.dtb
|
||||
sun8i-v3s-licheepi-zero.dtb \
|
||||
sun8i-v3s-licheepi-zero-dock.dtb
|
||||
dtb-$(CONFIG_MACH_SUN9I) += \
|
||||
sun9i-a80-optimus.dtb \
|
||||
sun9i-a80-cubieboard4.dtb
|
||||
@ -920,8 +935,7 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
|
||||
tegra20-seaboard.dtb \
|
||||
tegra20-tec.dtb \
|
||||
tegra20-trimslice.dtb \
|
||||
tegra20-ventana.dtb \
|
||||
tegra20-whistler.dtb
|
||||
tegra20-ventana.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \
|
||||
tegra30-apalis-eval.dtb \
|
||||
tegra30-beaver.dtb \
|
||||
@ -999,6 +1013,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
|
||||
armada-385-db-ap.dtb \
|
||||
armada-385-linksys-caiman.dtb \
|
||||
armada-385-linksys-cobra.dtb \
|
||||
armada-385-linksys-rango.dtb \
|
||||
armada-385-linksys-shelby.dtb \
|
||||
armada-385-synology-ds116.dtb \
|
||||
armada-385-turris-omnia.dtb \
|
||||
|
||||
@ -62,32 +62,36 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
ebi: ebi@10000000 {
|
||||
nand_controller: nand-controller {
|
||||
nand: nand@3 {
|
||||
partitions {
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
uboot@40000 {
|
||||
label = "uboot";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
uboot@40000 {
|
||||
label = "uboot";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
ubootenv@c0000 {
|
||||
label = "ubootenv";
|
||||
reg = <0xc0000 0x40000>;
|
||||
};
|
||||
kernel@100000 {
|
||||
label = "kernel";
|
||||
reg = <0x100000 0x400000>;
|
||||
};
|
||||
rootfs@500000 {
|
||||
label = "rootfs";
|
||||
reg = <0x500000 0x7b00000>;
|
||||
ubootenv@c0000 {
|
||||
label = "ubootenv";
|
||||
reg = <0xc0000 0x40000>;
|
||||
};
|
||||
|
||||
kernel@100000 {
|
||||
label = "kernel";
|
||||
reg = <0x100000 0x400000>;
|
||||
};
|
||||
|
||||
rootfs@500000 {
|
||||
label = "rootfs";
|
||||
reg = <0x500000 0x7b00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -255,7 +255,7 @@
|
||||
};
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c02";
|
||||
compatible = "atmel,24c02";
|
||||
pagesize = <8>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
@ -89,7 +89,7 @@
|
||||
|
||||
&i2c0 {
|
||||
eeprom: eeprom@50 {
|
||||
compatible = "at,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -232,7 +232,7 @@
|
||||
};
|
||||
|
||||
baseboard_eeprom: baseboard_eeprom@50 {
|
||||
compatible = "at,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x50>;
|
||||
|
||||
#address-cells = <1>;
|
||||
@ -251,7 +251,7 @@
|
||||
clock-frequency = <100000>;
|
||||
|
||||
cape_eeprom0: cape_eeprom0@54 {
|
||||
compatible = "at,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x54>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -261,7 +261,7 @@
|
||||
};
|
||||
|
||||
cape_eeprom1: cape_eeprom1@55 {
|
||||
compatible = "at,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x55>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -271,7 +271,7 @@
|
||||
};
|
||||
|
||||
cape_eeprom2: cape_eeprom2@56 {
|
||||
compatible = "at,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x56>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -281,7 +281,7 @@
|
||||
};
|
||||
|
||||
cape_eeprom3: cape_eeprom3@57 {
|
||||
compatible = "at,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x57>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
@ -97,6 +97,11 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins &bt_pins>;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "ti,wl1835-st";
|
||||
enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
* BeagleBone Blacks have PG 2.0 silicon which is guaranteed
|
||||
* to support 1GHz OPP so enable it for PG 2.0 on this board.
|
||||
*/
|
||||
oppnitro@1000000000 {
|
||||
oppnitro-1000000000 {
|
||||
opp-supported-hw = <0x06 0x0100>;
|
||||
};
|
||||
};
|
||||
|
||||
460
arch/arm/boot/dts/am335x-boneblue.dts
Normal file
460
arch/arm/boot/dts/am335x-boneblue.dts
Normal file
@ -0,0 +1,460 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "am33xx.dtsi"
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "TI AM335x BeagleBone Blue";
|
||||
compatible = "ti,am335x-bone-blue", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&dcdc2_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
leds {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds_s0>;
|
||||
|
||||
compatible = "gpio-leds";
|
||||
|
||||
usr_0_led {
|
||||
label = "beaglebone:green:usr0";
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
usr_1_led {
|
||||
label = "beaglebone:green:usr1";
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
usr_2_led {
|
||||
label = "beaglebone:green:usr2";
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "cpu0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
usr_3_led {
|
||||
label = "beaglebone:green:usr3";
|
||||
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc1";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
wifi_led {
|
||||
label = "wifi";
|
||||
gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
linux,default-trigger = "phy0assoc";
|
||||
};
|
||||
|
||||
red_led {
|
||||
label = "red";
|
||||
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
green_led {
|
||||
label = "green";
|
||||
gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
batt_1_led {
|
||||
label = "bat25";
|
||||
gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
batt_2_led {
|
||||
label = "bat50";
|
||||
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
batt_3_led {
|
||||
label = "bat75";
|
||||
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
batt_4_led {
|
||||
label = "bat100";
|
||||
gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
vmmcsd_fixed: fixedregulator0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
wlan_en_reg: fixedregulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wlan-en-regulator";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
startup-delay-us= <70000>;
|
||||
|
||||
/* WL_EN */
|
||||
gpio = <&gpio3 9 0>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
user_leds_s0: user_leds_s0 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
|
||||
AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
|
||||
AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
|
||||
AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
|
||||
AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] - WIFI_LED */
|
||||
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] - P8.7, LED_RED, GP1_PIN_5 */
|
||||
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] - P8.8, LED_GREEN, GP1_PIN_6 */
|
||||
AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, BATT_LED_1 */
|
||||
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
|
||||
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
|
||||
AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
|
||||
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
|
||||
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
|
||||
AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* (E15) uart0_rxd.uart0_rxd */
|
||||
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (E16) uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* (U9) gpmc_csn1.mmc1_clk */
|
||||
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* (V9) gpmc_csn2.mmc1_cmd */
|
||||
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* (U7) gpmc_ad0.mmc1_dat0 */
|
||||
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* (V7) gpmc_ad1.mmc1_dat1 */
|
||||
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* (R8) gpmc_ad2.mmc1_dat2 */
|
||||
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* (T8) gpmc_ad3.mmc1_dat3 */
|
||||
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* (U8) gpmc_ad4.mmc1_dat4 */
|
||||
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* (V8) gpmc_ad5.mmc1_dat5 */
|
||||
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* (R9) gpmc_ad6.mmc1_dat6 */
|
||||
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* (T9) gpmc_ad7.mmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins: pinmux_mmc3_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE6) /* (L15) gmii1_rxd1.mmc2_clk */
|
||||
AM33XX_IOPAD(0x914, PIN_INPUT_PULLUP | MUX_MODE6) /* (J16) gmii1_txen.mmc2_cmd */
|
||||
AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE5) /* (J17) gmii1_rxdv.mmc2_dat0 */
|
||||
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLUP | MUX_MODE5) /* (J18) gmii1_txd3.mmc2_dat1 */
|
||||
AM33XX_IOPAD(0x920, PIN_INPUT_PULLUP | MUX_MODE5) /* (K15) gmii1_txd2.mmc2_dat2 */
|
||||
AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE5) /* (H16) gmii1_col.mmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
bt_pins: pinmux_bt_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (K17) gmii1_txd0.gpio0[28] - BT_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
|
||||
AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
|
||||
AM33XX_IOPAD(0x948, PIN_INPUT | MUX_MODE3) /* (M17) mdio_data.uart3_ctsn */
|
||||
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* (M18) mdio_clk.uart3_rtsn */
|
||||
>;
|
||||
};
|
||||
|
||||
wl18xx_pins: pinmux_wl18xx_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] - WL_EN */
|
||||
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (H18) rmii1_refclk.gpio0[29] - WL_IRQ */
|
||||
AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (L18) gmii1_rxclk.gpio3[10] - LS_BUF_EN */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_ctrl_mod {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
interrupts-extended = <&intc 18 &tps 0>;
|
||||
interrupt-names = "mc", "vbus";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&cppi41dma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps: tps@24 {
|
||||
reg = <0x24>;
|
||||
};
|
||||
|
||||
baseboard_eeprom: baseboard_eeprom@50 {
|
||||
compatible = "at,24c256";
|
||||
reg = <0x50>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
baseboard_data: baseboard_data@0 {
|
||||
reg = <0 0x100>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
mpu9250@68 {
|
||||
compatible = "invensense,mpu9250";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <21 GPIO_ACTIVE_LOW>;
|
||||
i2c-gate {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ax8975@c {
|
||||
compatible = "ak,ak8975";
|
||||
reg = <0x0c>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pressure@76 {
|
||||
compatible = "bosch,bmp280";
|
||||
reg = <0x76>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
interrupts = <7>; /* NMI */
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
charger {
|
||||
interrupts = <0>, <1>;
|
||||
interrupt-names = "USB", "AC";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pwrbutton {
|
||||
interrupts = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
regulators {
|
||||
dcdc1_reg: regulator@0 {
|
||||
regulator-name = "vdds_dpr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <925000>;
|
||||
regulator-max-microvolt = <1351500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <925000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
regulator-name = "vio,vrtc,vdds";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
regulator-name = "vdd_3v3aux";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
regulator-name = "vdd_3v3a";
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <8>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
dmas = <&edma_xbar 12 0 1
|
||||
&edma_xbar 13 0 2>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "okay";
|
||||
vmmc-supply = <&wlan_en_reg>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
cap-power-off-card;
|
||||
ti,needs-special-hs-handling;
|
||||
keep-power-in-suspend;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1835";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <29 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
adc {
|
||||
ti,adc-channels = <0 1 2 3 4 5 6 7>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins &bt_pins>;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "ti,wl1835-st";
|
||||
enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
system-power-controller;
|
||||
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
|
||||
clock-names = "ext-clk", "int-clk";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
ls_buf_en {
|
||||
gpio-hog;
|
||||
gpios = <10 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
line-name = "LS_BUF_EN";
|
||||
};
|
||||
};
|
||||
@ -97,6 +97,11 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins &bt_pins>;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "ti,wl1835-st";
|
||||
enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
|
||||
@ -224,7 +224,7 @@
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "microchip,24c02";
|
||||
compatible = "microchip,24c02", "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <8>;
|
||||
};
|
||||
|
||||
@ -67,7 +67,7 @@
|
||||
};
|
||||
|
||||
eeprom: eeprom@50 {
|
||||
compatible = "at,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
|
||||
@ -138,7 +138,7 @@
|
||||
};
|
||||
|
||||
i2c_rtc: rtc@68 {
|
||||
compatible = "rv4162";
|
||||
compatible = "microcrystal,rv4162";
|
||||
reg = <0x68>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -188,7 +188,7 @@
|
||||
};
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c32";
|
||||
compatible = "atmel,24c32";
|
||||
pagesize = <32>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
@ -305,7 +305,7 @@
|
||||
};
|
||||
|
||||
eeprom: eeprom@50 {
|
||||
compatible = "at,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
|
||||
@ -64,64 +64,64 @@
|
||||
* because the can not be enabled simultaneously on a
|
||||
* single SoC.
|
||||
*/
|
||||
opp50@300000000 {
|
||||
opp50-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <950000 931000 969000>;
|
||||
opp-supported-hw = <0x06 0x0010>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp100@275000000 {
|
||||
opp100-275000000 {
|
||||
opp-hz = /bits/ 64 <275000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0x01 0x00FF>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp100@300000000 {
|
||||
opp100-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0x06 0x0020>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp100@500000000 {
|
||||
opp100-500000000 {
|
||||
opp-hz = /bits/ 64 <500000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0x01 0xFFFF>;
|
||||
};
|
||||
|
||||
opp100@600000000 {
|
||||
opp100-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0x06 0x0040>;
|
||||
};
|
||||
|
||||
opp120@600000000 {
|
||||
opp120-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <1200000 1176000 1224000>;
|
||||
opp-supported-hw = <0x01 0xFFFF>;
|
||||
};
|
||||
|
||||
opp120@720000000 {
|
||||
opp120-720000000 {
|
||||
opp-hz = /bits/ 64 <720000000>;
|
||||
opp-microvolt = <1200000 1176000 1224000>;
|
||||
opp-supported-hw = <0x06 0x0080>;
|
||||
};
|
||||
|
||||
oppturbo@720000000 {
|
||||
oppturbo-720000000 {
|
||||
opp-hz = /bits/ 64 <720000000>;
|
||||
opp-microvolt = <1260000 1234800 1285200>;
|
||||
opp-supported-hw = <0x01 0xFFFF>;
|
||||
};
|
||||
|
||||
oppturbo@800000000 {
|
||||
oppturbo-800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <1260000 1234800 1285200>;
|
||||
opp-supported-hw = <0x06 0x0100>;
|
||||
};
|
||||
|
||||
oppnitro@1000000000 {
|
||||
oppnitro-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <1325000 1298500 1351500>;
|
||||
opp-supported-hw = <0x04 0x0200>;
|
||||
@ -431,7 +431,6 @@
|
||||
&edma_xbar 25 0 0>;
|
||||
dma-names = "tx", "rx";
|
||||
interrupts = <64>;
|
||||
interrupt-parent = <&intc>;
|
||||
reg = <0x48060000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -444,7 +443,6 @@
|
||||
&edma 3 0>;
|
||||
dma-names = "tx", "rx";
|
||||
interrupts = <28>;
|
||||
interrupt-parent = <&intc>;
|
||||
reg = <0x481d8000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -454,7 +452,6 @@
|
||||
ti,hwmods = "mmc3";
|
||||
ti,needs-special-reset;
|
||||
interrupts = <29>;
|
||||
interrupt-parent = <&intc>;
|
||||
reg = <0x47810000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -853,7 +850,6 @@
|
||||
0x4a101200 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-parent = <&intc>;
|
||||
/*
|
||||
* c0_rx_thresh_pend
|
||||
* c0_rx_pend
|
||||
@ -908,7 +904,6 @@
|
||||
lcdc: lcdc@4830e000 {
|
||||
compatible = "ti,am33xx-tilcdc";
|
||||
reg = <0x4830e000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <36>;
|
||||
ti,hwmods = "lcdc";
|
||||
status = "disabled";
|
||||
@ -917,7 +912,6 @@
|
||||
tscadc: tscadc@44e0d000 {
|
||||
compatible = "ti,am3359-tscadc";
|
||||
reg = <0x44e0d000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <16>;
|
||||
ti,hwmods = "adc_tsc";
|
||||
status = "disabled";
|
||||
|
||||
@ -59,32 +59,32 @@
|
||||
compatible = "operating-points-v2-ti-cpu";
|
||||
syscon = <&scm_conf>;
|
||||
|
||||
opp50@300000000 {
|
||||
opp50-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <950000 931000 969000>;
|
||||
opp-supported-hw = <0xFF 0x01>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp100@600000000 {
|
||||
opp100-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <1100000 1078000 1122000>;
|
||||
opp-supported-hw = <0xFF 0x04>;
|
||||
};
|
||||
|
||||
opp120@720000000 {
|
||||
opp120-720000000 {
|
||||
opp-hz = /bits/ 64 <720000000>;
|
||||
opp-microvolt = <1200000 1176000 1224000>;
|
||||
opp-supported-hw = <0xFF 0x08>;
|
||||
};
|
||||
|
||||
oppturbo@800000000 {
|
||||
oppturbo-800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <1260000 1234800 1285200>;
|
||||
opp-supported-hw = <0xFF 0x10>;
|
||||
};
|
||||
|
||||
oppnitro@1000000000 {
|
||||
oppnitro-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <1325000 1298500 1351500>;
|
||||
opp-supported-hw = <0xFF 0x20>;
|
||||
|
||||
@ -549,8 +549,6 @@
|
||||
|
||||
dcdc3: regulator-dcdc3 {
|
||||
regulator-name = "vdcdc3";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
|
||||
@ -339,7 +339,7 @@
|
||||
clock-frequency = <400000>;
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
pagesize = <64>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
@ -451,8 +451,6 @@
|
||||
|
||||
dcdc3: regulator-dcdc3 {
|
||||
regulator-name = "vdds_ddr";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
@ -511,7 +509,7 @@
|
||||
};
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
pagesize = <64>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
@ -442,8 +442,6 @@
|
||||
|
||||
dcdc3: regulator-dcdc3 {
|
||||
regulator-name = "vdcdc3";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
@ -477,7 +475,7 @@
|
||||
};
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c256";
|
||||
compatible = "atmel,24c256";
|
||||
pagesize = <64>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
@ -833,4 +833,40 @@
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x4100>;
|
||||
};
|
||||
|
||||
clkout2_src_mux_ck: clkout2_src_mux_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>,
|
||||
<&dpll_per_m2_ck>, <&dpll_disp_m2_ck>,
|
||||
<&dpll_mpu_m2_ck>, <&dpll_extdev_ck>;
|
||||
reg = <0x4108>;
|
||||
};
|
||||
|
||||
clkout2_pre_div_ck: clkout2_pre_div_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,divider-clock";
|
||||
clocks = <&clkout2_src_mux_ck>;
|
||||
ti,bit-shift = <4>;
|
||||
ti,max-div = <8>;
|
||||
reg = <0x4108>;
|
||||
};
|
||||
|
||||
clkout2_post_div_ck: clkout2_post_div_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,divider-clock";
|
||||
clocks = <&clkout2_pre_div_ck>;
|
||||
ti,bit-shift = <8>;
|
||||
ti,max-div = <32>;
|
||||
ti,index-power-of-two;
|
||||
reg = <0x4108>;
|
||||
};
|
||||
|
||||
clkout2_ck: clkout2_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&clkout2_post_div_ck>;
|
||||
ti,bit-shift = <16>;
|
||||
reg = <0x4108>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -79,3 +79,20 @@
|
||||
id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
|
||||
vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&mailbox5 {
|
||||
status = "okay";
|
||||
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox6 {
|
||||
status = "okay";
|
||||
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
@ -91,3 +91,23 @@
|
||||
&pcie1 {
|
||||
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&mailbox5 {
|
||||
status = "okay";
|
||||
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox6 {
|
||||
status = "okay";
|
||||
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
@ -388,7 +388,7 @@
|
||||
};
|
||||
|
||||
eeprom: eeprom@50 {
|
||||
compatible = "at,24c32";
|
||||
compatible = "atmel,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -83,25 +83,44 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
ebi: ebi@10000000 {
|
||||
status = "okay";
|
||||
|
||||
barebox@0 {
|
||||
label = "barebox";
|
||||
reg = <0x0 0x58000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
u_boot_env@58000 {
|
||||
label = "u_boot_env";
|
||||
reg = <0x58000 0x8000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
ubi@60000 {
|
||||
label = "ubi";
|
||||
reg = <0x60000 0x1FA0000>;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
barebox@0 {
|
||||
label = "barebox";
|
||||
reg = <0x0 0x58000>;
|
||||
};
|
||||
|
||||
u_boot_env@58000 {
|
||||
label = "u_boot_env";
|
||||
reg = <0x58000 0x8000>;
|
||||
};
|
||||
|
||||
ubi@60000 {
|
||||
label = "ubi";
|
||||
reg = <0x60000 0x1FA0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -137,29 +137,38 @@
|
||||
};
|
||||
|
||||
gpio0: gpio@18100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>, <0x181c0 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
gpio1: gpio@18140 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>, <0x181c8 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <87>, <88>, <89>, <90>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
gpio2: gpio@18180 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18180 0x40>;
|
||||
ngpios = <2>;
|
||||
gpio-controller;
|
||||
|
||||
@ -44,71 +44,128 @@
|
||||
model = "Linksys WRT1200AC";
|
||||
compatible = "linksys,caiman", "linksys,armada385", "marvell,armada385",
|
||||
"marvell,armada380";
|
||||
};
|
||||
|
||||
soc {
|
||||
internal-regs{
|
||||
i2c@11000 {
|
||||
|
||||
pca9635@68 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wan_amber@0 {
|
||||
label = "caiman:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
wan_white@1 {
|
||||
label = "caiman:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
wlan_2g@2 {
|
||||
label = "caiman:white:wlan_2g";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
wlan_5g@3 {
|
||||
label = "caiman:white:wlan_5g";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "caiman:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "caiman:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "caiman:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "caiman:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "caiman:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
&expander0 {
|
||||
wan_amber@0 {
|
||||
label = "caiman:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
power {
|
||||
label = "caiman:white:power";
|
||||
};
|
||||
wan_white@1 {
|
||||
label = "caiman:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
sata {
|
||||
label = "caiman:white:sata";
|
||||
};
|
||||
wlan_2g@2 {
|
||||
label = "caiman:white:wlan_2g";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
wlan_5g@3 {
|
||||
label = "caiman:white:wlan_5g";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "caiman:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "caiman:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "caiman:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "caiman:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "caiman:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_leds {
|
||||
power {
|
||||
label = "caiman:white:power";
|
||||
};
|
||||
|
||||
sata {
|
||||
label = "caiman:white:sata";
|
||||
};
|
||||
};
|
||||
|
||||
&nand {
|
||||
/* 128MiB */
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0000000 0x200000>; /* 2MiB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u_env";
|
||||
reg = <0x200000 0x40000>; /* 256KiB */
|
||||
};
|
||||
|
||||
partition@140000 {
|
||||
label = "s_env";
|
||||
reg = <0x240000 0x40000>; /* 256KiB */
|
||||
};
|
||||
|
||||
partition@900000 {
|
||||
label = "devinfo";
|
||||
reg = <0x900000 0x100000>; /* 1MiB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
/* kernel1 overlaps with rootfs1 by design */
|
||||
partition@a00000 {
|
||||
label = "kernel1";
|
||||
reg = <0xa00000 0x2800000>; /* 40MiB */
|
||||
};
|
||||
|
||||
partition@1000000 {
|
||||
label = "rootfs1";
|
||||
reg = <0x1000000 0x2200000>; /* 34MiB */
|
||||
};
|
||||
|
||||
/* kernel2 overlaps with rootfs2 by design */
|
||||
partition@3200000 {
|
||||
label = "kernel2";
|
||||
reg = <0x3200000 0x2800000>; /* 40MiB */
|
||||
};
|
||||
|
||||
partition@3800000 {
|
||||
label = "rootfs2";
|
||||
reg = <0x3800000 0x2200000>; /* 34MiB */
|
||||
};
|
||||
|
||||
/*
|
||||
* 38MiB, last MiB is for the BBT, not writable
|
||||
*/
|
||||
partition@5a00000 {
|
||||
label = "syscfg";
|
||||
reg = <0x5a00000 0x2600000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Unused area between "s_env" and "devinfo".
|
||||
* Moved here because otherwise the renumbered
|
||||
* partitions would break the bootloader
|
||||
* supplied bootargs
|
||||
*/
|
||||
partition@180000 {
|
||||
label = "unused_area";
|
||||
reg = <0x280000 0x680000>; /* 6.5MiB */
|
||||
};
|
||||
};
|
||||
|
||||
@ -44,71 +44,128 @@
|
||||
model = "Linksys WRT1900ACv2";
|
||||
compatible = "linksys,cobra", "linksys,armada385", "marvell,armada385",
|
||||
"marvell,armada380";
|
||||
};
|
||||
|
||||
soc {
|
||||
internal-regs{
|
||||
i2c@11000 {
|
||||
|
||||
pca9635@68 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wan_amber@0 {
|
||||
label = "cobra:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
wan_white@1 {
|
||||
label = "cobra:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
wlan_2g@2 {
|
||||
label = "cobra:white:wlan_2g";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
wlan_5g@3 {
|
||||
label = "cobra:white:wlan_5g";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "cobra:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "cobra:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "cobra:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "cobra:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "cobra:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
&expander0 {
|
||||
wan_amber@0 {
|
||||
label = "cobra:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
power {
|
||||
label = "cobra:white:power";
|
||||
};
|
||||
wan_white@1 {
|
||||
label = "cobra:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
sata {
|
||||
label = "cobra:white:sata";
|
||||
};
|
||||
wlan_2g@2 {
|
||||
label = "cobra:white:wlan_2g";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
wlan_5g@3 {
|
||||
label = "cobra:white:wlan_5g";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "cobra:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "cobra:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "cobra:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "cobra:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "cobra:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_leds {
|
||||
power {
|
||||
label = "cobra:white:power";
|
||||
};
|
||||
|
||||
sata {
|
||||
label = "cobra:white:sata";
|
||||
};
|
||||
};
|
||||
|
||||
&nand {
|
||||
/* 128MiB */
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0000000 0x200000>; /* 2MiB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u_env";
|
||||
reg = <0x200000 0x40000>; /* 256KiB */
|
||||
};
|
||||
|
||||
partition@140000 {
|
||||
label = "s_env";
|
||||
reg = <0x240000 0x40000>; /* 256KiB */
|
||||
};
|
||||
|
||||
partition@900000 {
|
||||
label = "devinfo";
|
||||
reg = <0x900000 0x100000>; /* 1MiB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
/* kernel1 overlaps with rootfs1 by design */
|
||||
partition@a00000 {
|
||||
label = "kernel1";
|
||||
reg = <0xa00000 0x2800000>; /* 40MiB */
|
||||
};
|
||||
|
||||
partition@1000000 {
|
||||
label = "rootfs1";
|
||||
reg = <0x1000000 0x2200000>; /* 34MiB */
|
||||
};
|
||||
|
||||
/* kernel2 overlaps with rootfs2 by design */
|
||||
partition@3200000 {
|
||||
label = "kernel2";
|
||||
reg = <0x3200000 0x2800000>; /* 40MiB */
|
||||
};
|
||||
|
||||
partition@3800000 {
|
||||
label = "rootfs2";
|
||||
reg = <0x3800000 0x2200000>; /* 34MiB */
|
||||
};
|
||||
|
||||
/*
|
||||
* 38MiB, last MiB is for the BBT, not writable
|
||||
*/
|
||||
partition@5a00000 {
|
||||
label = "syscfg";
|
||||
reg = <0x5a00000 0x2600000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Unused area between "s_env" and "devinfo".
|
||||
* Moved here because otherwise the renumbered
|
||||
* partitions would break the bootloader
|
||||
* supplied bootargs
|
||||
*/
|
||||
partition@180000 {
|
||||
label = "unused_area";
|
||||
reg = <0x280000 0x680000>; /* 6.5MiB */
|
||||
};
|
||||
};
|
||||
|
||||
203
arch/arm/boot/dts/armada-385-linksys-rango.dts
Normal file
203
arch/arm/boot/dts/armada-385-linksys-rango.dts
Normal file
@ -0,0 +1,203 @@
|
||||
/*
|
||||
* Device Tree file for the Linksys WRT3200ACM (Rango)
|
||||
*
|
||||
* Copyright (C) 2016 Imre Kaloz <kaloz@openwrt.org>
|
||||
*
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "armada-385-linksys.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Linksys WRT3200ACM";
|
||||
compatible = "linksys,rango", "linksys,armada385", "marvell,armada385",
|
||||
"marvell,armada380";
|
||||
};
|
||||
|
||||
&expander0 {
|
||||
wan_amber@0 {
|
||||
label = "rango:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
wan_white@1 {
|
||||
label = "rango:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "rango:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "rango:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "rango:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "rango:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "rango:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_leds {
|
||||
power {
|
||||
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
|
||||
label = "rango:white:power";
|
||||
};
|
||||
|
||||
sata {
|
||||
gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
|
||||
label = "rango:white:sata";
|
||||
};
|
||||
|
||||
wlan_2g {
|
||||
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
|
||||
label = "rango:white:wlan_2g";
|
||||
};
|
||||
|
||||
wlan_5g {
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
||||
label = "rango:white:wlan_5g";
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_leds_pins {
|
||||
marvell,pins = "mpp21", "mpp45", "mpp46", "mpp56";
|
||||
};
|
||||
|
||||
&nand {
|
||||
/* AMD/Spansion S34ML02G2 256MiB, OEM Layout */
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0000000 0x200000>; /* 2MiB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
label = "u_env";
|
||||
reg = <0x200000 0x20000>; /* 128KiB */
|
||||
};
|
||||
|
||||
partition@220000 {
|
||||
label = "s_env";
|
||||
reg = <0x220000 0x40000>; /* 256KiB */
|
||||
};
|
||||
|
||||
partition@7e0000 {
|
||||
label = "devinfo";
|
||||
reg = <0x7e0000 0x40000>; /* 256KiB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@820000 {
|
||||
label = "sysdiag";
|
||||
reg = <0x820000 0x1e0000>; /* 1920KiB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
/* kernel1 overlaps with rootfs1 by design */
|
||||
partition@a00000 {
|
||||
label = "kernel1";
|
||||
reg = <0xa00000 0x5000000>; /* 80MiB */
|
||||
};
|
||||
|
||||
partition@1000000 {
|
||||
label = "rootfs1";
|
||||
reg = <0x1000000 0x4a00000>; /* 74MiB */
|
||||
};
|
||||
|
||||
/* kernel2 overlaps with rootfs2 by design */
|
||||
partition@5a00000 {
|
||||
label = "kernel2";
|
||||
reg = <0x5a00000 0x5000000>; /* 80MiB */
|
||||
};
|
||||
|
||||
partition@6000000 {
|
||||
label = "rootfs2";
|
||||
reg = <0x6000000 0x4a00000>; /* 74MiB */
|
||||
};
|
||||
|
||||
/*
|
||||
* 86MiB, last MiB is for the BBT, not writable
|
||||
*/
|
||||
partition@aa00000 {
|
||||
label = "syscfg";
|
||||
reg = <0xaa00000 0x5600000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Unused area between "s_env" and "devinfo".
|
||||
* Moved here because otherwise the renumbered
|
||||
* partitions would break the bootloader
|
||||
* supplied bootargs
|
||||
*/
|
||||
partition@180000 {
|
||||
label = "unused_area";
|
||||
reg = <0x260000 0x5c0000>; /* 5.75MiB */
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdhci_pins>;
|
||||
no-1-8-v;
|
||||
non-removable;
|
||||
wp-inverted;
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_1_vbus {
|
||||
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&usb3_1_vbus_pins {
|
||||
marvell,pins = "mpp44";
|
||||
};
|
||||
@ -44,71 +44,128 @@
|
||||
model = "Linksys WRT1900ACS";
|
||||
compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385",
|
||||
"marvell,armada380";
|
||||
};
|
||||
|
||||
soc {
|
||||
internal-regs{
|
||||
i2c@11000 {
|
||||
|
||||
pca9635@68 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wan_amber@0 {
|
||||
label = "shelby:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
wan_white@1 {
|
||||
label = "shelby:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
wlan_2g@2 {
|
||||
label = "shelby:white:wlan_2g";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
wlan_5g@3 {
|
||||
label = "shelby:white:wlan_5g";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "shelby:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "shelby:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "shelby:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "shelby:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "shelby:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
&expander0 {
|
||||
wan_amber@0 {
|
||||
label = "shelby:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
power {
|
||||
label = "shelby:white:power";
|
||||
};
|
||||
wan_white@1 {
|
||||
label = "shelby:white:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
sata {
|
||||
label = "shelby:white:sata";
|
||||
};
|
||||
wlan_2g@2 {
|
||||
label = "shelby:white:wlan_2g";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
wlan_5g@3 {
|
||||
label = "shelby:white:wlan_5g";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "shelby:white:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "shelby:white:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "shelby:white:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_white@8 {
|
||||
label = "shelby:white:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "shelby:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_leds {
|
||||
power {
|
||||
label = "shelby:white:power";
|
||||
};
|
||||
|
||||
sata {
|
||||
label = "shelby:white:sata";
|
||||
};
|
||||
};
|
||||
|
||||
&nand {
|
||||
/* 128MiB */
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0000000 0x200000>; /* 2MiB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u_env";
|
||||
reg = <0x200000 0x40000>; /* 256KiB */
|
||||
};
|
||||
|
||||
partition@140000 {
|
||||
label = "s_env";
|
||||
reg = <0x240000 0x40000>; /* 256KiB */
|
||||
};
|
||||
|
||||
partition@900000 {
|
||||
label = "devinfo";
|
||||
reg = <0x900000 0x100000>; /* 1MiB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
/* kernel1 overlaps with rootfs1 by design */
|
||||
partition@a00000 {
|
||||
label = "kernel1";
|
||||
reg = <0xa00000 0x2800000>; /* 40MiB */
|
||||
};
|
||||
|
||||
partition@1000000 {
|
||||
label = "rootfs1";
|
||||
reg = <0x1000000 0x2200000>; /* 34MiB */
|
||||
};
|
||||
|
||||
/* kernel2 overlaps with rootfs2 by design */
|
||||
partition@3200000 {
|
||||
label = "kernel2";
|
||||
reg = <0x3200000 0x2800000>; /* 40MiB */
|
||||
};
|
||||
|
||||
partition@3800000 {
|
||||
label = "rootfs2";
|
||||
reg = <0x3800000 0x2200000>; /* 34MiB */
|
||||
};
|
||||
|
||||
/*
|
||||
* 38MiB, last MiB is for the BBT, not writable
|
||||
*/
|
||||
partition@5a00000 {
|
||||
label = "syscfg";
|
||||
reg = <0x5a00000 0x2600000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Unused area between "s_env" and "devinfo".
|
||||
* Moved here because otherwise the renumbered
|
||||
* partitions would break the bootloader
|
||||
* supplied bootargs
|
||||
*/
|
||||
partition@180000 {
|
||||
label = "unused_area";
|
||||
reg = <0x280000 0x680000>; /* 6.5MiB */
|
||||
};
|
||||
};
|
||||
|
||||
@ -52,7 +52,7 @@
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
reg = <0x00000000 0x20000000>; /* 512 MiB */
|
||||
};
|
||||
|
||||
soc {
|
||||
@ -61,255 +61,45 @@
|
||||
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
|
||||
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
i2c@11000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
tmp421@4c {
|
||||
compatible = "ti,tmp421";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
|
||||
pca9635@68 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "nxp,pca9635";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
/* J10: VCC, NC, RX, NC, TX, GND */
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-id";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <2>;
|
||||
bm,pool-short = <3>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@34000 {
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <0>;
|
||||
bm,pool-short = <1>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@72004 {
|
||||
status = "okay";
|
||||
|
||||
switch@0 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "wan";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
ethernet = <ð2>;
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sata@a8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
bm@c8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB part of the eSATA/USB 2.0 port */
|
||||
usb@58000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb3@f8000 {
|
||||
status = "okay";
|
||||
usb-phy = <&usb3_phy>;
|
||||
};
|
||||
|
||||
flash@d0000 {
|
||||
status = "okay";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0000000 0x200000>; /* 2MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u_env";
|
||||
reg = <0x200000 0x40000>; /* 256KB */
|
||||
};
|
||||
|
||||
partition@140000 {
|
||||
label = "s_env";
|
||||
reg = <0x240000 0x40000>; /* 256KB */
|
||||
};
|
||||
|
||||
partition@900000 {
|
||||
label = "devinfo";
|
||||
reg = <0x900000 0x100000>; /* 1MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
/* kernel1 overlaps with rootfs1 by design */
|
||||
partition@a00000 {
|
||||
label = "kernel1";
|
||||
reg = <0xa00000 0x2800000>; /* 40MB */
|
||||
};
|
||||
|
||||
partition@1000000 {
|
||||
label = "rootfs1";
|
||||
reg = <0x1000000 0x2200000>; /* 34MB */
|
||||
};
|
||||
|
||||
/* kernel2 overlaps with rootfs2 by design */
|
||||
partition@3200000 {
|
||||
label = "kernel2";
|
||||
reg = <0x3200000 0x2800000>; /* 40MB */
|
||||
};
|
||||
|
||||
partition@3800000 {
|
||||
label = "rootfs2";
|
||||
reg = <0x3800000 0x2200000>; /* 34MB */
|
||||
};
|
||||
|
||||
/*
|
||||
* 38MB, last MB is for the BBT, not writable
|
||||
*/
|
||||
partition@5a00000 {
|
||||
label = "syscfg";
|
||||
reg = <0x5a00000 0x2600000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* Unused area between "s_env" and "devinfo".
|
||||
* Moved here because otherwise the renumbered
|
||||
* partitions would break the bootloader
|
||||
* supplied bootargs
|
||||
*/
|
||||
partition@180000 {
|
||||
label = "unused_area";
|
||||
reg = <0x280000 0x680000>; /* 6.5MB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bm-bppi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
/* Marvell 88W8864, 5GHz-only */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@2,0 {
|
||||
/* Marvell 88W8864, 2GHz-only */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb3_phy: usb3_phy {
|
||||
usb3_1_phy: usb3_1-phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <®_xhci0_vbus>;
|
||||
vcc-supply = <&usb3_1_vbus>;
|
||||
};
|
||||
|
||||
reg_xhci0_vbus: xhci0-vbus {
|
||||
usb3_1_vbus: usb3_1-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&xhci0_vbus_pins>;
|
||||
regulator-name = "xhci0-vbus";
|
||||
pinctrl-0 = <&usb3_1_vbus_pins>;
|
||||
regulator-name = "usb3_1-vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
gpio_keys: gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&keys_pin>;
|
||||
pinctrl-0 = <&gpio_keys_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button@1 {
|
||||
wps {
|
||||
label = "WPS";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
reset {
|
||||
label = "Factory Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
gpio_leds: gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&power_led_pin &sata_led_pin>;
|
||||
pinctrl-0 = <&gpio_leds_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
power {
|
||||
@ -323,21 +113,83 @@
|
||||
linux,default-trigger = "disk-activity";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dsa@0 {
|
||||
status = "disabled";
|
||||
&ahci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
compatible = "marvell,dsa";
|
||||
#address-cells = <2>;
|
||||
&bm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bm_bppi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-id";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <0>;
|
||||
bm,pool-short = <1>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
ð2 {
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <2>;
|
||||
bm,pool-short = <3>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
tmp421@4c {
|
||||
compatible = "ti,tmp421";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
|
||||
expander0: pca9635@68 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "nxp,pca9635";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
dsa,ethernet = <ð2>;
|
||||
dsa,mii-bus = <&mdio>;
|
||||
&nand {
|
||||
/* 128MiB or 256MiB */
|
||||
status = "okay";
|
||||
num-cs = <1>;
|
||||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
|
||||
switch@0 {
|
||||
&mdio {
|
||||
status = "okay";
|
||||
|
||||
switch@0 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
@ -367,28 +219,45 @@
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
ethernet = <ð2>;
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
/* Marvell 88W8864, 5GHz-only */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2 {
|
||||
/* Marvell 88W8864, 2GHz-only */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
keys_pin: keys-pin {
|
||||
gpio_keys_pins: gpio-keys-pins {
|
||||
/* mpp24: wps, mpp29: reset */
|
||||
marvell,pins = "mpp24", "mpp29";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
power_led_pin: power-led-pin {
|
||||
marvell,pins = "mpp55";
|
||||
gpio_leds_pins: gpio-leds-pins {
|
||||
/* mpp54: sata, mpp55: power */
|
||||
marvell,pins = "mpp54", "mpp55";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata_led_pin: sata-led-pin {
|
||||
marvell,pins = "mpp54";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
xhci0_vbus_pins: xhci0-vbus-pins {
|
||||
usb3_1_vbus_pins: usb3_1-vbus-pins {
|
||||
marvell,pins = "mpp50";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
@ -397,3 +266,18 @@
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
/* J10: VCC, NC, RX, NC, TX, GND */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
/* USB part of the eSATA/USB 2.0 port */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_1 {
|
||||
status = "okay";
|
||||
usb-phy = <&usb3_1_phy>;
|
||||
};
|
||||
|
||||
@ -171,7 +171,7 @@
|
||||
/* leds device (in STM32F0) at address 0x2b */
|
||||
|
||||
eeprom@54 {
|
||||
compatible = "at,24c64";
|
||||
compatible = "atmel,24c64";
|
||||
reg = <0x54>;
|
||||
|
||||
/* The EEPROM contains data for bootloader.
|
||||
|
||||
@ -312,31 +312,39 @@
|
||||
};
|
||||
|
||||
gpio0: gpio@18100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>, <0x181c0 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
gpio1: gpio@18140 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>, <0x181c8 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <28>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
systemc: system-controller@18200 {
|
||||
|
||||
@ -311,6 +311,10 @@
|
||||
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&timer {
|
||||
compatible = "marvell,armada-xp-timer";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
|
||||
@ -87,4 +87,5 @@
|
||||
|
||||
&pp0 {
|
||||
compatible = "marvell,prestera-98dx4251";
|
||||
interrupts = <33>, <34>, <35>, <36>;
|
||||
};
|
||||
|
||||
@ -308,13 +308,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
gpio_fan {
|
||||
pwm_fan {
|
||||
/* SUNON HA4010V4-0000-C99 */
|
||||
compatible = "gpio-fan";
|
||||
gpios = <&gpio0 24 0>;
|
||||
|
||||
gpio-fan,speed-map = <0 0
|
||||
4500 1>;
|
||||
compatible = "pwm-fan";
|
||||
pwms = <&gpio0 24 4000>;
|
||||
};
|
||||
|
||||
dsa {
|
||||
|
||||
@ -202,25 +202,33 @@
|
||||
|
||||
internal-regs {
|
||||
gpio0: gpio@18100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>, <0x181c0 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
gpio1: gpio@18140 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>, <0x181c8 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <17>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <87>, <88>, <89>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -285,29 +285,38 @@
|
||||
|
||||
internal-regs {
|
||||
gpio0: gpio@18100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>, <0x181c0 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
gpio1: gpio@18140 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>, <0x181c8 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <87>, <88>, <89>, <90>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
gpio2: gpio@18180 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18180 0x40>;
|
||||
ngpios = <3>;
|
||||
gpio-controller;
|
||||
|
||||
@ -323,29 +323,38 @@
|
||||
|
||||
internal-regs {
|
||||
gpio0: gpio@18100 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18100 0x40>, <0x181c0 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
gpio1: gpio@18140 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>;
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18140 0x40>, <0x181c8 0x08>;
|
||||
reg-names = "gpio", "pwm";
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#pwm-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <87>, <88>, <89>, <90>;
|
||||
clocks = <&coreclk 0>;
|
||||
};
|
||||
|
||||
gpio2: gpio@18180 {
|
||||
compatible = "marvell,orion-gpio";
|
||||
compatible = "marvell,armada-370-gpio",
|
||||
"marvell,orion-gpio";
|
||||
reg = <0x18180 0x40>;
|
||||
ngpios = <3>;
|
||||
gpio-controller;
|
||||
|
||||
@ -886,12 +886,10 @@
|
||||
};
|
||||
|
||||
timer: timer@1e782000 {
|
||||
/* This timer is a Faraday FTTMR010 derivative */
|
||||
compatible = "aspeed,ast2400-timer";
|
||||
reg = <0x1e782000 0x90>;
|
||||
// The moxart_timer driver registers only one
|
||||
// interrupt and assumes it's for timer 1
|
||||
//interrupts = <16 17 18 35 36 37 38 39>;
|
||||
interrupts = <16>;
|
||||
interrupts = <16 17 18 35 36 37 38 39>;
|
||||
clocks = <&clk_apb>;
|
||||
clock-names = "PCLK";
|
||||
};
|
||||
|
||||
@ -993,12 +993,10 @@
|
||||
};
|
||||
|
||||
timer: timer@1e782000 {
|
||||
/* This timer is a Faraday FTTMR010 derivative */
|
||||
compatible = "aspeed,ast2400-timer";
|
||||
reg = <0x1e782000 0x90>;
|
||||
// The moxart_timer driver registers only one
|
||||
// interrupt and assumes it's for timer 1
|
||||
//interrupts = <16 17 18 35 36 37 38 39>;
|
||||
interrupts = <16>;
|
||||
interrupts = <16 17 18 35 36 37 38 39>;
|
||||
clocks = <&clk_apb>;
|
||||
clock-names = "PCLK";
|
||||
};
|
||||
|
||||
@ -82,38 +82,61 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc; /* Enable PMECC */
|
||||
atmel,pmecc-cap = <4>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
ebi: ebi@10000000 {
|
||||
pinctrl-0 = <&pinctrl_ebi_addr_nand
|
||||
&pinctrl_ebi_data_0_7>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_oe_we
|
||||
&pinctrl_nand_cs
|
||||
&pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
uboot@40000 {
|
||||
label = "u-boot";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
ubootenv@c0000 {
|
||||
label = "U-Boot Env";
|
||||
reg = <0xc0000 0x140000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
uboot@40000 {
|
||||
label = "u-boot";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
ubootenv@c0000 {
|
||||
label = "U-Boot Env";
|
||||
reg = <0xc0000 0x140000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -59,19 +59,39 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
ebi: ebi@10000000 {
|
||||
status = "okay";
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x7fe0000>;
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x7fe0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -141,23 +141,40 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@60000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc;
|
||||
atmel,pmecc-cap = <4>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
ebi: ebi@10000000 {
|
||||
pinctrl-0 = <&pinctrl_ebi_nand_addr>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x7fe0000>;
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x2>;
|
||||
atmel,rb = <0>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x7fe0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -68,6 +68,49 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ebi: ebi@10000000 {
|
||||
pinctrl-0 = <&pinctrl_ebi_addr_nand
|
||||
&pinctrl_ebi_data_0_7>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_oe_we
|
||||
&pinctrl_nand_cs
|
||||
&pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x7fe0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
@ -77,15 +120,6 @@
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
bootstrap@0 {
|
||||
label = "bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
ubi@20000 {
|
||||
label = "ubi";
|
||||
reg = <0x20000 0x7fe0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -31,19 +31,30 @@
|
||||
status = "okay";
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "st,24c64";
|
||||
compatible = "st,24c64", "atmel,24c64";
|
||||
reg = <0x51>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
&nand0 {
|
||||
&ebi {
|
||||
pinctrl-0 = <&pinctrl_ebi_nand_addr>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
&nand_controller {
|
||||
status = "okay";
|
||||
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc;
|
||||
atmel,pmecc-cap = <4>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
nand: nand@3 {
|
||||
reg = <0x3 0x0 0x2>;
|
||||
atmel,rb = <0>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
};
|
||||
};
|
||||
|
||||
@ -107,50 +107,69 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
ebi: ebi@10000000 {
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x20000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bareboxenv2@80000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
oftree@a0000 {
|
||||
label = "oftree";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
|
||||
kernel@c0000 {
|
||||
label = "kernel";
|
||||
reg = <0xc0000 0x400000>;
|
||||
};
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x20000>;
|
||||
};
|
||||
|
||||
rootfs@4c0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4c0000 0x7800000>;
|
||||
};
|
||||
bareboxenv2@80000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
|
||||
data@7cc0000 {
|
||||
label = "data";
|
||||
reg = <0x7cc0000 0x8340000>;
|
||||
oftree@a0000 {
|
||||
label = "oftree";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
|
||||
kernel@c0000 {
|
||||
label = "kernel";
|
||||
reg = <0xc0000 0x400000>;
|
||||
};
|
||||
|
||||
rootfs@4c0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4c0000 0x7800000>;
|
||||
};
|
||||
|
||||
data@7cc0000 {
|
||||
label = "data";
|
||||
reg = <0x7cc0000 0x8340000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -56,10 +56,6 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x80000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
@ -227,6 +223,10 @@
|
||||
};
|
||||
};
|
||||
|
||||
pwm0: pwm@f802c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
flx0: flexcom@f8034000 {
|
||||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
|
||||
status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
|
||||
@ -258,6 +258,12 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
can0: can@f8054000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_can0_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart3: serial@fc008000 {
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
@ -322,6 +328,18 @@
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_can0_default: can0_default {
|
||||
pinmux = <PIN_PC10__CANTX0>,
|
||||
<PIN_PC11__CANRX0>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_can1_default: can1_default {
|
||||
pinmux = <PIN_PC26__CANTX1>,
|
||||
<PIN_PC27__CANRX1>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_charger_chglev: charger_chglev {
|
||||
pinmux = <PIN_PA12__GPIO>;
|
||||
bias-disable;
|
||||
@ -469,6 +487,12 @@
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
can1: can@fc050000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_can1_default>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -235,46 +235,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@60000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc;
|
||||
atmel,pmecc-cap = <4>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: gadget@00500000 {
|
||||
atmel,vbus-gpio = <&pioE 9 GPIO_ACTIVE_HIGH>; /* PE9, conflicts with A9 */
|
||||
pinctrl-names = "default";
|
||||
@ -294,6 +254,63 @@
|
||||
usb2: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ebi: ebi@10000000 {
|
||||
pinctrl-0 = <&pinctrl_ebi_nand_addr>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x2>;
|
||||
atmel,rb = <0>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vcc_mmc0_reg: fixedregulator_mmc0 {
|
||||
|
||||
@ -75,7 +75,7 @@
|
||||
reg = <0>;
|
||||
clocks = <&clk20m>;
|
||||
interrupt-parent = <&pioE>;
|
||||
interrupts = <6 GPIO_ACTIVE_LOW>;
|
||||
interrupts = <6 IRQ_TYPE_EDGE_RISING>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
|
||||
@ -84,7 +84,7 @@
|
||||
reg = <1>;
|
||||
clocks = <&clk20m>;
|
||||
interrupt-parent = <&pioE>;
|
||||
interrupts = <7 GPIO_ACTIVE_LOW>;
|
||||
interrupts = <7 IRQ_TYPE_EDGE_RISING>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -190,41 +190,60 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@80000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-on-flash-bbt;
|
||||
atmel,has-pmecc;
|
||||
ebi: ebi@10000000 {
|
||||
pinctrl-0 = <&pinctrl_ebi_cs3 &pinctrl_ebi_nrd_nandoe
|
||||
&pinctrl_ebi_nwe_nandwe &pinctrl_ebi_nandrdy
|
||||
&pinctrl_ebi_data_0_7 &pinctrl_ebi_nand_addr>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x2>;
|
||||
atmel,rb = <0>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -236,41 +236,60 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@80000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-on-flash-bbt;
|
||||
atmel,has-pmecc;
|
||||
ebi: ebi@10000000 {
|
||||
pinctrl-0 = <&pinctrl_ebi_cs3 &pinctrl_ebi_nrd_nandoe
|
||||
&pinctrl_ebi_nwe_nandwe &pinctrl_ebi_nandrdy
|
||||
&pinctrl_ebi_data_0_7 &pinctrl_ebi_nand_addr>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x2>;
|
||||
atmel,rb = <0>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -161,45 +161,51 @@
|
||||
};
|
||||
};
|
||||
|
||||
&nand0 {
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
&nand {
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
barebox@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x60000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
bareboxenv@c0000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0xc0000 0x40000>;
|
||||
};
|
||||
barebox@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x60000>;
|
||||
};
|
||||
|
||||
bareboxenv2@100000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x100000 0x40000>;
|
||||
};
|
||||
bareboxenv@c0000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0xc0000 0x40000>;
|
||||
};
|
||||
|
||||
oftree@180000 {
|
||||
label = "oftree";
|
||||
reg = <0x180000 0x20000>;
|
||||
};
|
||||
bareboxenv2@100000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x100000 0x40000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x500000>;
|
||||
};
|
||||
oftree@180000 {
|
||||
label = "oftree";
|
||||
reg = <0x180000 0x20000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x500000>;
|
||||
};
|
||||
|
||||
ovlfs@10000000 {
|
||||
label = "ovlfs";
|
||||
reg = <0x10000000 0x10000000>;
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
|
||||
ovlfs@10000000 {
|
||||
label = "ovlfs";
|
||||
reg = <0x10000000 0x10000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -239,7 +245,7 @@
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "nxp,24c02";
|
||||
compatible = "nxp,24c02", "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
@ -99,6 +99,16 @@
|
||||
reg = <0xffffea00 0x200>;
|
||||
};
|
||||
|
||||
smc: smc@ffffec00 {
|
||||
compatible = "atmel,at91sam9260-smc", "syscon";
|
||||
reg = <0xffffec00 0x200>;
|
||||
};
|
||||
|
||||
matrix: matrix@ffffee00 {
|
||||
compatible = "atmel,at91sam9260-matrix", "syscon";
|
||||
reg = <0xffffee00 0x200>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91sam9260-pmc", "syscon";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
@ -522,10 +532,14 @@
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
pinctrl_nand_rb: nand-rb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
|
||||
AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
|
||||
<AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand_cs: nand-cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -985,24 +999,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000
|
||||
0xffffe800 0x200
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioC 13 GPIO_ACTIVE_HIGH
|
||||
&pioC 14 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@500000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x100000>;
|
||||
@ -1011,6 +1007,33 @@
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ebi: ebi@10000000 {
|
||||
compatible = "atmel,at91sam9260-ebi";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
atmel,smc = <&smc>;
|
||||
atmel,matrix = <&matrix>;
|
||||
reg = <0x10000000 0x80000000>;
|
||||
ranges = <0x0 0x0 0x10000000 0x10000000
|
||||
0x1 0x0 0x20000000 0x10000000
|
||||
0x2 0x0 0x30000000 0x10000000
|
||||
0x3 0x0 0x40000000 0x10000000
|
||||
0x4 0x0 0x50000000 0x10000000
|
||||
0x5 0x0 0x60000000 0x10000000
|
||||
0x6 0x0 0x70000000 0x10000000
|
||||
0x7 0x0 0x80000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
compatible = "atmel,at91sam9260-nand-controller";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c-gpio-0 {
|
||||
|
||||
@ -91,20 +91,31 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
ebi: ebi@10000000 {
|
||||
compatible = "atmel,at91sam9261-ebi";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000>;
|
||||
atmel,nand-addr-offset = <22>;
|
||||
atmel,nand-cmd-offset = <21>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
|
||||
gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
|
||||
<&pioC 14 GPIO_ACTIVE_HIGH>,
|
||||
<0>;
|
||||
atmel,smc = <&smc>;
|
||||
atmel,matrix = <&matrix>;
|
||||
reg = <0x10000000 0x80000000>;
|
||||
ranges = <0x0 0x0 0x10000000 0x10000000
|
||||
0x1 0x0 0x20000000 0x10000000
|
||||
0x2 0x0 0x30000000 0x10000000
|
||||
0x3 0x0 0x40000000 0x10000000
|
||||
0x4 0x0 0x50000000 0x10000000
|
||||
0x5 0x0 0x60000000 0x10000000
|
||||
0x6 0x0 0x70000000 0x10000000
|
||||
0x7 0x0 0x80000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
compatible = "atmel,at91sam9261-nand-controller";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
apb {
|
||||
@ -262,6 +273,11 @@
|
||||
reg = <0xffffea00 0x200>;
|
||||
};
|
||||
|
||||
smc: smc@ffffec00 {
|
||||
compatible = "atmel,at91sam9260-smc", "syscon";
|
||||
reg = <0xffffec00 0x200>;
|
||||
};
|
||||
|
||||
matrix: matrix@ffffee00 {
|
||||
compatible = "atmel,at91sam9261-matrix", "syscon";
|
||||
reg = <0xffffee00 0x200>;
|
||||
@ -362,9 +378,13 @@
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
pinctrl_nand_rb: nand-rb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand_cs: nand-cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -68,40 +68,59 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
ebi: ebi@10000000 {
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioC 15 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -361,11 +361,26 @@
|
||||
reg = <0xffffe200 0x200>;
|
||||
};
|
||||
|
||||
smc0: smc@ffffe400 {
|
||||
compatible = "atmel,at91sam9260-smc", "syscon";
|
||||
reg = <0xffffe400 0x200>;
|
||||
};
|
||||
|
||||
ramc1: ramc@ffffe800 {
|
||||
compatible = "atmel,at91sam9260-sdramc";
|
||||
reg = <0xffffe800 0x200>;
|
||||
};
|
||||
|
||||
smc1: smc@ffffea00 {
|
||||
compatible = "atmel,at91sam9260-smc", "syscon";
|
||||
reg = <0xffffea00 0x200>;
|
||||
};
|
||||
|
||||
matrix: matrix@ffffec00 {
|
||||
compatible = "atmel,at91sam9263-matrix", "syscon";
|
||||
reg = <0xffffec00 0x200>;
|
||||
};
|
||||
|
||||
pit: timer@fffffd30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffd30 0xf>;
|
||||
@ -472,10 +487,14 @@
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
pinctrl_nand_rb: nand-rb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
|
||||
AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
|
||||
<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand_cs: nand-cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -991,24 +1010,6 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000
|
||||
0xffffe000 0x200
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioA 22 GPIO_ACTIVE_HIGH
|
||||
&pioD 15 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00a00000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00a00000 0x100000>;
|
||||
@ -1017,6 +1018,52 @@
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ebi0: ebi@10000000 {
|
||||
compatible = "atmel,at91sam9263-ebi0";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
atmel,smc = <&smc0>;
|
||||
atmel,matrix = <&matrix>;
|
||||
reg = <0x10000000 0x80000000>;
|
||||
ranges = <0x0 0x0 0x10000000 0x10000000
|
||||
0x1 0x0 0x20000000 0x10000000
|
||||
0x2 0x0 0x30000000 0x10000000
|
||||
0x3 0x0 0x40000000 0x10000000
|
||||
0x4 0x0 0x50000000 0x10000000
|
||||
0x5 0x0 0x60000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller0: nand-controller {
|
||||
compatible = "atmel,at91sam9260-nand-controller";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
ebi1: ebi@70000000 {
|
||||
compatible = "atmel,at91sam9263-ebi1";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
atmel,smc = <&smc1>;
|
||||
atmel,matrix = <&matrix>;
|
||||
reg = <0x80000000 0x20000000>;
|
||||
ranges = <0x0 0x0 0x80000000 0x10000000
|
||||
0x1 0x0 0x90000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller1: nand-controller {
|
||||
compatible = "atmel,at91sam9260-nand-controller";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c-gpio-0 {
|
||||
|
||||
@ -125,50 +125,69 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt = <1>;
|
||||
ebi0: ebi@10000000 {
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x20000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bareboxenv2@80000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
oftree@80000 {
|
||||
label = "oftree";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
|
||||
kernel@a0000 {
|
||||
label = "kernel";
|
||||
reg = <0xc0000 0x400000>;
|
||||
};
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x20000>;
|
||||
};
|
||||
|
||||
rootfs@4a0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4c0000 0x7800000>;
|
||||
};
|
||||
bareboxenv2@80000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
|
||||
data@7ca0000 {
|
||||
label = "data";
|
||||
reg = <0x7cc0000 0x8340000>;
|
||||
oftree@80000 {
|
||||
label = "oftree";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
|
||||
kernel@a0000 {
|
||||
label = "kernel";
|
||||
reg = <0xc0000 0x400000>;
|
||||
};
|
||||
|
||||
rootfs@4a0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4c0000 0x7800000>;
|
||||
};
|
||||
|
||||
data@7ca0000 {
|
||||
label = "data";
|
||||
reg = <0x7cc0000 0x8340000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -123,50 +123,69 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
ebi: ebi@10000000 {
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x20000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bareboxenv2@80000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
oftree@80000 {
|
||||
label = "oftree";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
|
||||
kernel@a0000 {
|
||||
label = "kernel";
|
||||
reg = <0xc0000 0x400000>;
|
||||
};
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x20000>;
|
||||
};
|
||||
|
||||
rootfs@4a0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4c0000 0x7800000>;
|
||||
};
|
||||
bareboxenv2@80000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
|
||||
data@7ca0000 {
|
||||
label = "data";
|
||||
reg = <0x7cc0000 0x8340000>;
|
||||
oftree@80000 {
|
||||
label = "oftree";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
|
||||
kernel@a0000 {
|
||||
label = "kernel";
|
||||
reg = <0xc0000 0x400000>;
|
||||
};
|
||||
|
||||
rootfs@4a0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4c0000 0x7800000>;
|
||||
};
|
||||
|
||||
data@7ca0000 {
|
||||
label = "data";
|
||||
reg = <0x7cc0000 0x8340000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -113,6 +113,16 @@
|
||||
clock-names = "ddrck";
|
||||
};
|
||||
|
||||
smc: smc@ffffe800 {
|
||||
compatible = "atmel,at91sam9260-smc", "syscon";
|
||||
reg = <0xffffe800 0x200>;
|
||||
};
|
||||
|
||||
matrix: matrix@ffffea00 {
|
||||
compatible = "atmel,at91sam9g45-matrix", "syscon";
|
||||
reg = <0xffffea00 0x200>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91sam9g45-pmc", "syscon";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
@ -601,10 +611,14 @@
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
pinctrl_nand_rb: nand-rb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
|
||||
AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
|
||||
<AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand_cs: nand-cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -1278,25 +1292,6 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000
|
||||
0xffffe200 0x200
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
atmel,nand-has-dma;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioC 8 GPIO_ACTIVE_HIGH
|
||||
&pioC 14 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00700000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00700000 0x100000>;
|
||||
@ -1314,6 +1309,31 @@
|
||||
clock-names = "usb_clk", "ehci_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ebi: ebi@10000000 {
|
||||
compatible = "atmel,at91sam9g45-ebi";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
atmel,smc = <&smc>;
|
||||
atmel,matrix = <&matrix>;
|
||||
reg = <0x10000000 0x80000000>;
|
||||
ranges = <0x0 0x0 0x10000000 0x10000000
|
||||
0x1 0x0 0x20000000 0x10000000
|
||||
0x2 0x0 0x30000000 0x10000000
|
||||
0x3 0x0 0x40000000 0x10000000
|
||||
0x4 0x0 0x50000000 0x10000000
|
||||
0x5 0x0 0x60000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
compatible = "atmel,at91sam9g45-nand-controller";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c-gpio-0 {
|
||||
|
||||
@ -245,25 +245,44 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
ebi: ebi@10000000 {
|
||||
status = "okay";
|
||||
|
||||
boot@0 {
|
||||
label = "bootstrap/uboot/kernel";
|
||||
reg = <0x0 0x400000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
rootfs@400000 {
|
||||
label = "rootfs";
|
||||
reg = <0x400000 0x3C00000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioC 8 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
data@4000000 {
|
||||
label = "data";
|
||||
reg = <0x4000000 0xC000000>;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
boot@0 {
|
||||
label = "bootstrap/uboot/kernel";
|
||||
reg = <0x0 0x400000>;
|
||||
};
|
||||
|
||||
rootfs@400000 {
|
||||
label = "rootfs";
|
||||
reg = <0x400000 0x3C00000>;
|
||||
};
|
||||
|
||||
data@4000000 {
|
||||
label = "data";
|
||||
reg = <0x4000000 0xC000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -89,6 +89,17 @@
|
||||
atmel,external-irqs = <31>;
|
||||
};
|
||||
|
||||
matrix: matrix@ffffde00 {
|
||||
compatible = "atmel,at91sam9n12-matrix", "syscon";
|
||||
reg = <0xffffde00 0x100>;
|
||||
};
|
||||
|
||||
pmecc: ecc-engine@ffffe000 {
|
||||
compatible = "atmel,at91sam9g45-pmecc";
|
||||
reg = <0xffffe000 0x600>,
|
||||
<0xffffe600 0x200>;
|
||||
};
|
||||
|
||||
ramc0: ramc@ffffe800 {
|
||||
compatible = "atmel,at91sam9g45-ddramc";
|
||||
reg = <0xffffe800 0x200>;
|
||||
@ -96,6 +107,11 @@
|
||||
clock-names = "ddrck";
|
||||
};
|
||||
|
||||
smc: smc@ffffea00 {
|
||||
compatible = "atmel,at91sam9260-smc", "syscon";
|
||||
reg = <0xffffea00 0x200>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91sam9n12-pmc", "syscon";
|
||||
reg = <0xfffffc00 0x200>;
|
||||
@ -627,10 +643,14 @@
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
pinctrl_nand_rb: nand-rb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/
|
||||
AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */
|
||||
<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand_cs: nand-cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -998,28 +1018,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = < 0x40000000 0x10000000
|
||||
0xffffe000 0x00000600
|
||||
0xffffe600 0x00000200
|
||||
0x00108000 0x00018000
|
||||
>;
|
||||
atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
atmel,nand-has-dma;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioD 5 GPIO_ACTIVE_HIGH
|
||||
&pioD 4 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x00100000>;
|
||||
@ -1028,6 +1026,32 @@
|
||||
clock-names = "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ebi: ebi@10000000 {
|
||||
compatible = "atmel,at91sam9x5-ebi";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
atmel,smc = <&smc>;
|
||||
atmel,matrix = <&matrix>;
|
||||
reg = <0x10000000 0x60000000>;
|
||||
ranges = <0x0 0x0 0x10000000 0x10000000
|
||||
0x1 0x0 0x20000000 0x10000000
|
||||
0x2 0x0 0x30000000 0x10000000
|
||||
0x3 0x0 0x40000000 0x10000000
|
||||
0x4 0x0 0x50000000 0x10000000
|
||||
0x5 0x0 0x60000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
compatible = "atmel,at91sam9g45-nand-controller";
|
||||
ecc-engine = <&pmecc>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c-gpio-0 {
|
||||
|
||||
@ -147,14 +147,26 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc;
|
||||
atmel,pmecc-cap = <2>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
ebi: ebi@10000000 {
|
||||
status = "okay";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-ecc-strength = <2>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
|
||||
@ -92,21 +92,29 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
ebi: ebi@10000000 {
|
||||
compatible = "atmel,at91sam9rl-ebi";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000>,
|
||||
<0xffffe800 0x200>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
atmel,nand-has-dma;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
|
||||
<&pioB 6 GPIO_ACTIVE_HIGH>,
|
||||
<0>;
|
||||
atmel,smc = <&smc>;
|
||||
atmel,matrix = <&matrix>;
|
||||
reg = <0x10000000 0x80000000>;
|
||||
ranges = <0x0 0x0 0x10000000 0x10000000
|
||||
0x1 0x0 0x20000000 0x10000000
|
||||
0x2 0x0 0x30000000 0x10000000
|
||||
0x3 0x0 0x40000000 0x10000000
|
||||
0x4 0x0 0x50000000 0x10000000
|
||||
0x5 0x0 0x60000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
compatible = "atmel,at91sam9g45-nand-controller";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
apb {
|
||||
@ -364,6 +372,16 @@
|
||||
reg = <0xffffea00 0x200>;
|
||||
};
|
||||
|
||||
smc: smc@ffffec00 {
|
||||
compatible = "atmel,at91sam9260-smc", "syscon";
|
||||
reg = <0xffffec00 0x200>;
|
||||
};
|
||||
|
||||
matrix: matrix@ffffee00 {
|
||||
compatible = "atmel,at91sam9rl-matrix", "syscon";
|
||||
reg = <0xffffee00 0x200>;
|
||||
};
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <3>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
@ -443,6 +461,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
ebi {
|
||||
pinctrl_ebi_addr_nand: ebi-addr-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
fb {
|
||||
pinctrl_fb: fb-0 {
|
||||
atmel,pins =
|
||||
@ -507,28 +533,21 @@
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
pinctrl_nand_rb: nand-rb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand_cs: nand-cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand0_ale_cle: nand_ale_cle-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_nand0_oe_we: nand_oe_we-0 {
|
||||
pinctrl_nand_oe_we: nand-oe-we-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_nand0_cs: nand_cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm0 {
|
||||
|
||||
@ -63,40 +63,63 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt = <1>;
|
||||
ebi: ebi@10000000 {
|
||||
pinctrl-0 = <&pinctrl_ebi_addr_nand>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_oe_we
|
||||
&pinctrl_nand_cs
|
||||
&pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioB 6 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -97,6 +97,17 @@
|
||||
atmel,external-irqs = <31>;
|
||||
};
|
||||
|
||||
matrix: matrix@ffffde00 {
|
||||
compatible = "atmel,at91sam9x5-matrix", "syscon";
|
||||
reg = <0xffffde00 0x100>;
|
||||
};
|
||||
|
||||
pmecc: ecc-engine@ffffe000 {
|
||||
compatible = "atmel,at91sam9g45-pmecc";
|
||||
reg = <0xffffe000 0x600>,
|
||||
<0xffffe600 0x200>;
|
||||
};
|
||||
|
||||
ramc0: ramc@ffffe800 {
|
||||
compatible = "atmel,at91sam9g45-ddramc";
|
||||
reg = <0xffffe800 0x200>;
|
||||
@ -104,6 +115,11 @@
|
||||
clock-names = "ddrck";
|
||||
};
|
||||
|
||||
smc: smc@ffffea00 {
|
||||
compatible = "atmel,at91sam9260-smc", "syscon";
|
||||
reg = <0xffffea00 0x200>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91sam9x5-pmc", "syscon";
|
||||
reg = <0xfffffc00 0x200>;
|
||||
@ -465,6 +481,38 @@
|
||||
};
|
||||
};
|
||||
|
||||
ebi {
|
||||
pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_ebi_data_8_15: ebi-data-msb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_ebi_addr_nand: ebi-addr-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
@ -551,34 +599,20 @@
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
pinctrl_nand_oe_we: nand-oe-we-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
|
||||
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
|
||||
AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
|
||||
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
|
||||
AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
|
||||
AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
|
||||
AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
|
||||
AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
|
||||
AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
|
||||
AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
|
||||
AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
|
||||
AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
|
||||
AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
|
||||
AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
|
||||
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_nand_16bits: nand_16bits-0 {
|
||||
pinctrl_nand_rb: nand-rb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
|
||||
AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
|
||||
AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
|
||||
AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
|
||||
AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
|
||||
AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
|
||||
AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
|
||||
AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
|
||||
<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand_cs: nand-cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -1197,28 +1231,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000
|
||||
0xffffe000 0x600 /* PMECC Registers */
|
||||
0xffffe600 0x200 /* PMECC Error Location Registers */
|
||||
0x00108000 0x18000 /* PMECC looup table in ROM code */
|
||||
>;
|
||||
atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
atmel,nand-has-dma;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioD 5 GPIO_ACTIVE_HIGH
|
||||
&pioD 4 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00600000 0x100000>;
|
||||
@ -1236,6 +1248,32 @@
|
||||
clock-names = "usb_clk", "ehci_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ebi: ebi@10000000 {
|
||||
compatible = "atmel,at91sam9x5-ebi";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
atmel,smc = <&smc>;
|
||||
atmel,matrix = <&matrix>;
|
||||
reg = <0x10000000 0x60000000>;
|
||||
ranges = <0x0 0x0 0x10000000 0x10000000
|
||||
0x1 0x0 0x20000000 0x10000000
|
||||
0x2 0x0 0x30000000 0x10000000
|
||||
0x3 0x0 0x40000000 0x10000000
|
||||
0x4 0x0 0x50000000 0x10000000
|
||||
0x5 0x0 0x60000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
compatible = "atmel,at91sam9g45-nand-controller";
|
||||
ecc-engine = <&pmecc>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c-gpio-0 {
|
||||
|
||||
@ -37,38 +37,61 @@
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc; /* Enable PMECC */
|
||||
atmel,pmecc-cap = <2>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
ebi: ebi@10000000 {
|
||||
pinctrl-0 = <&pinctrl_ebi_addr_nand
|
||||
&pinctrl_ebi_data_0_7>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
nand_controller: nand-controller {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_nand_oe_we
|
||||
&pinctrl_nand_cs
|
||||
&pinctrl_nand_rb>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
uboot@40000 {
|
||||
label = "u-boot";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <2>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
ubootenv@c0000 {
|
||||
label = "U-Boot Env";
|
||||
reg = <0xc0000 0x140000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x1f800000>;
|
||||
uboot@40000 {
|
||||
label = "u-boot";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
ubootenv@c0000 {
|
||||
label = "U-Boot Env";
|
||||
reg = <0xc0000 0x140000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x1f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -64,6 +64,11 @@
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
battery_power_supply: battery-power-supply {
|
||||
compatible = "x-powers,axp209-battery-power-supply";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
regulators {
|
||||
/* Default work frequency for buck regulators */
|
||||
x-powers,dcdc-freq = <1500>;
|
||||
|
||||
@ -57,6 +57,11 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
battery_power_supply: battery-power-supply {
|
||||
compatible = "x-powers,axp221-battery-power-supply";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
regulators {
|
||||
/* Default work frequency for buck regulators */
|
||||
x-powers,dcdc-freq = <3000>;
|
||||
|
||||
@ -142,6 +142,55 @@
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
mdio: mdio@18002000 {
|
||||
compatible = "brcm,iproc-mdio";
|
||||
reg = <0x18002000 0x8>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
gphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
gphy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
switch: switch@18007000 {
|
||||
compatible = "brcm,bcm11360-srab", "brcm,cygnus-srab";
|
||||
reg = <0x18007000 0x1000>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
phy-handle = <&gphy0>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
phy-handle = <&gphy1>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
port@8 {
|
||||
reg = <8>;
|
||||
label = "cpu";
|
||||
ethernet = <ð0>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c0: i2c@18008000 {
|
||||
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
|
||||
reg = <0x18008000 0x100>;
|
||||
@ -295,6 +344,15 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
eth0: ethernet@18042000 {
|
||||
compatible = "brcm,amac";
|
||||
reg = <0x18042000 0x1000>,
|
||||
<0x18110000 0x1000>;
|
||||
reg-names = "amac_base", "idm_base";
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand: nand@18046000 {
|
||||
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
|
||||
reg = <0x18046000 0x600>, <0xf8105408 0x600>,
|
||||
@ -386,6 +444,19 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
v3d: v3d@180a2000 {
|
||||
compatible = "brcm,cygnus-v3d";
|
||||
reg = <0x180a2000 0x1000>;
|
||||
clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>;
|
||||
clock-names = "v3d_clk";
|
||||
interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
vc4: gpu {
|
||||
compatible = "brcm,cygnus-vc4";
|
||||
};
|
||||
|
||||
adc: adc@180a6000 {
|
||||
compatible = "brcm,iproc-static-adc";
|
||||
#io-channel-cells = <1>;
|
||||
|
||||
@ -413,6 +413,12 @@
|
||||
<0x3f408 0x04>;
|
||||
};
|
||||
|
||||
thermal: thermal@3f2c0 {
|
||||
compatible = "brcm,ns-thermal";
|
||||
reg = <0x3f2c0 0x10>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
sata_phy: sata_phy@40100 {
|
||||
compatible = "brcm,iproc-nsp-sata-phy";
|
||||
reg = <0x40100 0x340>;
|
||||
@ -563,4 +569,24 @@
|
||||
brcm,pcie-msi-inten;
|
||||
};
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu-thermal {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <1000>;
|
||||
coefficients = <(-556) 418000>;
|
||||
thermal-sensors = <&thermal>;
|
||||
|
||||
trips {
|
||||
cpu-crit {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -12,7 +12,7 @@
|
||||
/dts-v1/;
|
||||
#include "bcm2835.dtsi"
|
||||
#include "bcm2835-rpi.dtsi"
|
||||
#include "bcm283x-rpi-usb-host.dtsi"
|
||||
#include "bcm283x-rpi-usb-otg.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "raspberrypi,model-zero", "brcm,bcm2835";
|
||||
|
||||
@ -65,13 +65,13 @@
|
||||
&sdhci {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_gpio48>;
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
||||
&sdhost {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdhost_gpio48>;
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
||||
|
||||
@ -24,6 +24,10 @@
|
||||
};
|
||||
};
|
||||
|
||||
&cpu_thermal {
|
||||
coefficients = <(-538) 407000>;
|
||||
};
|
||||
|
||||
/* enable thermal sensor with the correct compatible property set */
|
||||
&thermal {
|
||||
compatible = "brcm,bcm2835-thermal";
|
||||
|
||||
@ -77,6 +77,10 @@
|
||||
interrupts = <8>;
|
||||
};
|
||||
|
||||
&cpu_thermal {
|
||||
coefficients = <(-538) 407000>;
|
||||
};
|
||||
|
||||
/* enable thermal sensor with the correct compatible property set */
|
||||
&thermal {
|
||||
compatible = "brcm,bcm2836-thermal";
|
||||
|
||||
1
arch/arm/boot/dts/bcm2837-rpi-3-b.dts
Normal file
1
arch/arm/boot/dts/bcm2837-rpi-3-b.dts
Normal file
@ -0,0 +1 @@
|
||||
#include "arm64/broadcom/bcm2837-rpi-3-b.dts"
|
||||
10
arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi
Normal file
10
arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi
Normal file
@ -0,0 +1,10 @@
|
||||
&usb {
|
||||
dr_mode = "otg";
|
||||
g-rx-fifo-size = <256>;
|
||||
g-np-tx-fifo-size = <32>;
|
||||
/*
|
||||
* According to dwc2 the sum of all device EP
|
||||
* fifo sizes shouldn't exceed 3776 bytes.
|
||||
*/
|
||||
g-tx-fifo-size = <256 256 512 512 512 768 768>;
|
||||
};
|
||||
@ -24,6 +24,26 @@
|
||||
bootargs = "earlyprintk console=ttyAMA0";
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <1000>;
|
||||
|
||||
thermal-sensors = <&thermal>;
|
||||
|
||||
trips {
|
||||
cpu-crit {
|
||||
temperature = <80000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
@ -435,6 +455,7 @@
|
||||
compatible = "brcm,bcm2835-thermal";
|
||||
reg = <0x7e212000 0x8>;
|
||||
clocks = <&clocks BCM2835_CLOCK_TSENS>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -573,6 +594,8 @@
|
||||
#size-cells = <0>;
|
||||
clocks = <&clk_usb>;
|
||||
clock-names = "otg";
|
||||
phys = <&usbphy>;
|
||||
phy-names = "usb2-phy";
|
||||
};
|
||||
|
||||
v3d: v3d@7ec00000 {
|
||||
@ -608,4 +631,8 @@
|
||||
clock-frequency = <480000000>;
|
||||
};
|
||||
};
|
||||
|
||||
usbphy: phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
};
|
||||
};
|
||||
|
||||
@ -320,6 +320,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
mdio: mdio@18003000 {
|
||||
compatible = "brcm,iproc-mdio";
|
||||
reg = <0x18003000 0x8>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@18009000 {
|
||||
compatible = "brcm,iproc-i2c";
|
||||
reg = <0x18009000 0x50>;
|
||||
@ -349,6 +357,12 @@
|
||||
"sata2";
|
||||
};
|
||||
|
||||
thermal: thermal@1800c2c0 {
|
||||
compatible = "brcm,ns-thermal";
|
||||
reg = <0x1800c2c0 0x10>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
srab: srab@18007000 {
|
||||
compatible = "brcm,bcm5301x-srab";
|
||||
reg = <0x18007000 0x1000>;
|
||||
@ -412,4 +426,24 @@
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <1000>;
|
||||
coefficients = <(-556) 418000>;
|
||||
thermal-sensors = <&thermal>;
|
||||
|
||||
trips {
|
||||
cpu-crit {
|
||||
temperature = <125000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -57,6 +57,26 @@
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&switch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&v3d {
|
||||
assigned-clocks =
|
||||
<&mipipll BCM_CYGNUS_MIPIPLL>,
|
||||
<&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>;
|
||||
assigned-clock-rates = <525000000>, <300000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -82,6 +82,8 @@
|
||||
tca6416: gpio@20 {
|
||||
compatible = "ti,tca6416";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
wdt: wdt@21000 {
|
||||
|
||||
@ -172,6 +172,18 @@
|
||||
gpio = <&gpio 111 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
/*
|
||||
* The EV3 can use 6-AA batteries or a rechargeable Li-ion battery pack.
|
||||
*/
|
||||
battery {
|
||||
pinctrl-names = "default";
|
||||
pintctrl-0 = <&battery_pins>;
|
||||
compatible = "lego,ev3-battery";
|
||||
io-channels = <&adc 4>, <&adc 3>;
|
||||
io-channel-names = "voltage", "current";
|
||||
rechargeable-gpios = <&gpio 136 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&pmx_core {
|
||||
@ -228,6 +240,15 @@
|
||||
0x34 0x00000008 0x0000000f
|
||||
>;
|
||||
};
|
||||
|
||||
battery_pins: pinmux_battery_pins {
|
||||
pinctrl-single,bits = <
|
||||
/* GP0[6] */
|
||||
0x04 0x00000080 0x000000f0
|
||||
/* GP8[8] */
|
||||
0x4c 0x00000080 0x000000f0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinconf {
|
||||
@ -342,6 +363,13 @@
|
||||
|
||||
&gpio {
|
||||
status = "okay";
|
||||
|
||||
/* Don't pull down battery voltage adc io channel */
|
||||
batt_volt_en {
|
||||
gpio-hog;
|
||||
gpios = <6 GPIO_ACTIVE_HIGH>;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
|
||||
@ -446,13 +446,38 @@
|
||||
};
|
||||
usb0: usb@200000 {
|
||||
compatible = "ti,da830-musb";
|
||||
reg = <0x200000 0x10000>;
|
||||
reg = <0x200000 0x1000>;
|
||||
ranges;
|
||||
interrupts = <58>;
|
||||
interrupt-names = "mc";
|
||||
dr_mode = "otg";
|
||||
phys = <&usb_phy 0>;
|
||||
phy-names = "usb-phy";
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
dmas = <&cppi41dma 0 0 &cppi41dma 1 0
|
||||
&cppi41dma 2 0 &cppi41dma 3 0
|
||||
&cppi41dma 0 1 &cppi41dma 1 1
|
||||
&cppi41dma 2 1 &cppi41dma 3 1>;
|
||||
dma-names =
|
||||
"rx1", "rx2", "rx3", "rx4",
|
||||
"tx1", "tx2", "tx3", "tx4";
|
||||
|
||||
cppi41dma: dma-controller@201000 {
|
||||
compatible = "ti,da830-cppi41";
|
||||
reg = <0x201000 0x1000
|
||||
0x202000 0x1000
|
||||
0x204000 0x4000>;
|
||||
reg-names = "controller",
|
||||
"scheduler", "queuemgr";
|
||||
interrupts = <58>;
|
||||
#dma-cells = <2>;
|
||||
#dma-channels = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
sata: sata@218000 {
|
||||
compatible = "ti,da850-ahci";
|
||||
@ -503,6 +528,8 @@
|
||||
ti,ngpio = <144>;
|
||||
ti,davinci-gpio-unbanked = <0>;
|
||||
status = "disabled";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
pinconf: pin-controller@22c00c {
|
||||
compatible = "ti,da850-pupd";
|
||||
|
||||
@ -529,7 +529,8 @@
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "peripheral";
|
||||
dr_mode = "otg";
|
||||
extcon = <&extcon_usb1>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
|
||||
@ -99,14 +99,14 @@
|
||||
compatible = "operating-points-v2-ti-cpu";
|
||||
syscon = <&scm_wkup>;
|
||||
|
||||
opp_nom@1000000000 {
|
||||
opp_nom-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <1060000 850000 1150000>;
|
||||
opp-supported-hw = <0xFF 0x01>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp_od@1176000000 {
|
||||
opp_od-1176000000 {
|
||||
opp-hz = /bits/ 64 <1176000000>;
|
||||
opp-microvolt = <1160000 885000 1160000>;
|
||||
opp-supported-hw = <0xFF 0x02>;
|
||||
|
||||
@ -392,7 +392,8 @@
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "peripheral";
|
||||
dr_mode = "otg";
|
||||
extcon = <&extcon_usb1>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
|
||||
@ -338,6 +338,8 @@
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
|
||||
reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;
|
||||
assigned-clocks = <&dpll_dsp_ck>;
|
||||
assigned-clock-rates = <600000000>;
|
||||
};
|
||||
|
||||
dpll_dsp_m2_ck: dpll_dsp_m2_ck@244 {
|
||||
@ -349,6 +351,8 @@
|
||||
reg = <0x0244>;
|
||||
ti,index-starts-at-one;
|
||||
ti,invert-autoidle-bit;
|
||||
assigned-clocks = <&dpll_dsp_m2_ck>;
|
||||
assigned-clock-rates = <600000000>;
|
||||
};
|
||||
|
||||
iva_dpll_hs_clk_div: iva_dpll_hs_clk_div {
|
||||
@ -372,6 +376,8 @@
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_iva_byp_mux>;
|
||||
reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
|
||||
assigned-clocks = <&dpll_iva_ck>;
|
||||
assigned-clock-rates = <1165000000>;
|
||||
};
|
||||
|
||||
dpll_iva_m2_ck: dpll_iva_m2_ck@1b0 {
|
||||
@ -383,6 +389,8 @@
|
||||
reg = <0x01b0>;
|
||||
ti,index-starts-at-one;
|
||||
ti,invert-autoidle-bit;
|
||||
assigned-clocks = <&dpll_iva_m2_ck>;
|
||||
assigned-clock-rates = <388333334>;
|
||||
};
|
||||
|
||||
iva_dclk: iva_dclk {
|
||||
@ -406,6 +414,8 @@
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>;
|
||||
reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>;
|
||||
assigned-clocks = <&dpll_gpu_ck>;
|
||||
assigned-clock-rates = <1277000000>;
|
||||
};
|
||||
|
||||
dpll_gpu_m2_ck: dpll_gpu_m2_ck@2e8 {
|
||||
@ -417,6 +427,8 @@
|
||||
reg = <0x02e8>;
|
||||
ti,index-starts-at-one;
|
||||
ti,invert-autoidle-bit;
|
||||
assigned-clocks = <&dpll_gpu_m2_ck>;
|
||||
assigned-clock-rates = <425666667>;
|
||||
};
|
||||
|
||||
dpll_core_m2_ck: dpll_core_m2_ck@130 {
|
||||
@ -659,6 +671,8 @@
|
||||
reg = <0x0248>;
|
||||
ti,index-starts-at-one;
|
||||
ti,invert-autoidle-bit;
|
||||
assigned-clocks = <&dpll_dsp_m3x2_ck>;
|
||||
assigned-clock-rates = <400000000>;
|
||||
};
|
||||
|
||||
dpll_gmac_x2_ck: dpll_gmac_x2_ck {
|
||||
@ -791,6 +805,8 @@
|
||||
clocks = <&dpll_abe_m2x2_ck>, <&dpll_core_h22x2_ck>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x0520>;
|
||||
assigned-clocks = <&ipu1_gfclk_mux>;
|
||||
assigned-clock-parents = <&dpll_core_h22x2_ck>;
|
||||
};
|
||||
|
||||
mcasp1_ahclkr_mux: mcasp1_ahclkr_mux@550 {
|
||||
@ -1748,6 +1764,8 @@
|
||||
clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x1220>;
|
||||
assigned-clocks = <&gpu_core_gclk_mux>;
|
||||
assigned-clock-parents = <&dpll_gpu_m2_ck>;
|
||||
};
|
||||
|
||||
gpu_hyd_gclk_mux: gpu_hyd_gclk_mux@1220 {
|
||||
@ -1756,6 +1774,8 @@
|
||||
clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>;
|
||||
ti,bit-shift = <26>;
|
||||
reg = <0x1220>;
|
||||
assigned-clocks = <&gpu_hyd_gclk_mux>;
|
||||
assigned-clock-parents = <&dpll_gpu_m2_ck>;
|
||||
};
|
||||
|
||||
l3instr_ts_gclk_div: l3instr_ts_gclk_div@e50 {
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user