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davinci: DA850/OMAP-L138 EVM: simplify configuration of emac in MII/RMII mode

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There are multiple steps in configuring the EMAC to MII or RMII mode.
Current code implements them using multiple checks.

Consolidate the multiple checks into a single if construct.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Sekhar Nori 2009-10-21 21:18:24 +05:30 committed by Kevin Hilman
parent 797d799ed0
commit 17fadd9a5e
1 changed files with 16 additions and 21 deletions
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37
arch/arm/mach-davinci/board-da850-evm.c
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@ -535,23 +535,27 @@ static int __init da850_evm_config_emac(void)
cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG); cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
/* configure the CFGCHIP3 register for RMII or MII */
val = __raw_readl(cfg_chip3_base); val = __raw_readl(cfg_chip3_base);
if (rmii_en)
if (rmii_en) {
val |= BIT(8); val |= BIT(8);
else
val &= ~BIT(8);
__raw_writel(val, cfg_chip3_base);
if (!rmii_en)
ret = da8xx_pinmux_setup(da850_cpgmac_pins);
else
ret = da8xx_pinmux_setup(da850_rmii_pins); ret = da8xx_pinmux_setup(da850_rmii_pins);
pr_info("EMAC: RMII PHY configured, MII PHY will not be"
" functional\n");
} else {
val &= ~BIT(8);
ret = da8xx_pinmux_setup(da850_cpgmac_pins);
pr_info("EMAC: MII PHY configured, RMII PHY will not be"
" functional\n");
}
if (ret) if (ret)
pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n", pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
ret); ret);
/* configure the CFGCHIP3 register for RMII or MII */
__raw_writel(val, cfg_chip3_base);
ret = davinci_cfg_reg(DA850_GPIO2_6); ret = davinci_cfg_reg(DA850_GPIO2_6);
if (ret) if (ret)
pr_warning("da850_evm_init:GPIO(2,6) mux setup " pr_warning("da850_evm_init:GPIO(2,6) mux setup "
@ -564,17 +568,8 @@ static int __init da850_evm_config_emac(void)
return ret; return ret;
} }
if (rmii_en) { /* Enable/Disable MII MDIO clock */
/* Disable MII MDIO clock */ gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 1);
pr_info("EMAC: RMII PHY configured, MII PHY will not be"
" functional\n");
} else {
/* Enable MII MDIO clock */
gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, 0);
pr_info("EMAC: MII PHY configured, RMII PHY will not be"
" functional\n");
}
soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK; soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY; soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;