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[PATCH] doc: gpio.txt describes open-drain emulation
Update the GPIO docs to describe the idiom whereby open drain signals are emulated by toggling the GPIO direction. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -27,7 +27,7 @@ The exact capabilities of GPIOs vary between systems. Common options:
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- Output values are writable (high=1, low=0). Some chips also have
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- Output values are writable (high=1, low=0). Some chips also have
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options about how that value is driven, so that for example only one
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options about how that value is driven, so that for example only one
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value might be driven ... supporting "wire-OR" and similar schemes
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value might be driven ... supporting "wire-OR" and similar schemes
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for the other value.
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for the other value (notably, "open drain" signaling).
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- Input values are likewise readable (1, 0). Some chips support readback
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- Input values are likewise readable (1, 0). Some chips support readback
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of pins configured as "output", which is very useful in such "wire-OR"
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of pins configured as "output", which is very useful in such "wire-OR"
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@ -247,6 +247,35 @@ with gpio_get_value(), for example to initialize or update driver state
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when the IRQ is edge-triggered.
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when the IRQ is edge-triggered.
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Emulating Open Drain Signals
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----------------------------
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Sometimes shared signals need to use "open drain" signaling, where only the
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low signal level is actually driven. (That term applies to CMOS transistors;
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"open collector" is used for TTL.) A pullup resistor causes the high signal
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level. This is sometimes called a "wire-AND"; or more practically, from the
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negative logic (low=true) perspective this is a "wire-OR".
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One common example of an open drain signal is a shared active-low IRQ line.
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Also, bidirectional data bus signals sometimes use open drain signals.
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Some GPIO controllers directly support open drain outputs; many don't. When
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you need open drain signaling but your hardware doesn't directly support it,
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there's a common idiom you can use to emulate it with any GPIO pin that can
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be used as either an input or an output:
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LOW: gpio_direction_output(gpio, 0) ... this drives the signal
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and overrides the pullup.
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HIGH: gpio_direction_input(gpio) ... this turns off the output,
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so the pullup (or some other device) controls the signal.
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If you are "driving" the signal high but gpio_get_value(gpio) reports a low
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value (after the appropriate rise time passes), you know some other component
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is driving the shared signal low. That's not necessarily an error. As one
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common example, that's how I2C clocks are stretched: a slave that needs a
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slower clock delays the rising edge of SCK, and the I2C master adjusts its
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signaling rate accordingly.
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What do these conventions omit?
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What do these conventions omit?
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===============================
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===============================
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