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perf: Remove the sysfs bits
Neither the overcommit nor the reservation sysfs parameter were actually working, remove them as they'll only get in the way. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: paulus <paulus@samba.org> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Peter Zijlstra
Ingo Molnar
parent
a4eaf7f146
commit
15ac9a395a
@ -808,7 +808,7 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,
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wrperfmon(PERFMON_CMD_DISABLE, cpuc->idx_mask);
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/* la_ptr is the counter that overflowed. */
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if (unlikely(la_ptr >= perf_max_events)) {
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if (unlikely(la_ptr >= alpha_pmu->num_pmcs)) {
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/* This should never occur! */
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irq_err_count++;
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pr_warning("PMI: silly index %ld\n", la_ptr);
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@ -879,7 +879,6 @@ void __init init_hw_perf_events(void)
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/* And set up PMU specification */
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alpha_pmu = &ev67_pmu;
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perf_max_events = alpha_pmu->num_pmcs;
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perf_pmu_register(&pmu);
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}
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@ -534,7 +534,7 @@ static int armpmu_event_init(struct perf_event *event)
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event->destroy = hw_perf_event_destroy;
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if (!atomic_inc_not_zero(&active_events)) {
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if (atomic_read(&active_events) > perf_max_events) {
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if (atomic_read(&active_events) > armpmu.num_events) {
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atomic_dec(&active_events);
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return -ENOSPC;
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}
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@ -2974,14 +2974,12 @@ init_hw_perf_events(void)
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armpmu = &armv6pmu;
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memcpy(armpmu_perf_cache_map, armv6_perf_cache_map,
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sizeof(armv6_perf_cache_map));
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perf_max_events = armv6pmu.num_events;
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break;
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case 0xB020: /* ARM11mpcore */
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armpmu = &armv6mpcore_pmu;
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memcpy(armpmu_perf_cache_map,
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armv6mpcore_perf_cache_map,
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sizeof(armv6mpcore_perf_cache_map));
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perf_max_events = armv6mpcore_pmu.num_events;
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break;
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case 0xC080: /* Cortex-A8 */
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armv7pmu.id = ARM_PERF_PMU_ID_CA8;
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@ -2993,7 +2991,6 @@ init_hw_perf_events(void)
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/* Reset PMNC and read the nb of CNTx counters
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supported */
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armv7pmu.num_events = armv7_reset_read_pmnc();
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perf_max_events = armv7pmu.num_events;
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break;
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case 0xC090: /* Cortex-A9 */
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armv7pmu.id = ARM_PERF_PMU_ID_CA9;
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@ -3005,7 +3002,6 @@ init_hw_perf_events(void)
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/* Reset PMNC and read the nb of CNTx counters
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supported */
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armv7pmu.num_events = armv7_reset_read_pmnc();
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perf_max_events = armv7pmu.num_events;
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break;
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}
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/* Intel CPUs [xscale]. */
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@ -3016,13 +3012,11 @@ init_hw_perf_events(void)
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armpmu = &xscale1pmu;
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memcpy(armpmu_perf_cache_map, xscale_perf_cache_map,
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sizeof(xscale_perf_cache_map));
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perf_max_events = xscale1pmu.num_events;
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break;
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case 2:
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armpmu = &xscale2pmu;
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memcpy(armpmu_perf_cache_map, xscale_perf_cache_map,
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sizeof(xscale_perf_cache_map));
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perf_max_events = xscale2pmu.num_events;
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break;
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}
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}
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@ -3032,7 +3026,6 @@ init_hw_perf_events(void)
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arm_pmu_names[armpmu->id], armpmu->num_events);
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} else {
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pr_info("no hardware support available\n");
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perf_max_events = -1;
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}
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perf_pmu_register(&pmu);
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@ -897,7 +897,7 @@ static int sparc_check_constraints(struct perf_event **evts,
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if (!n_ev)
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return 0;
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if (n_ev > perf_max_events)
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if (n_ev > MAX_HWEVENTS)
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return -1;
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msk0 = perf_event_get_msk(events[0]);
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@ -1014,7 +1014,7 @@ static int sparc_pmu_add(struct perf_event *event, int ef_flags)
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perf_pmu_disable(event->pmu);
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n0 = cpuc->n_events;
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if (n0 >= perf_max_events)
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if (n0 >= MAX_HWEVENTS)
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goto out;
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cpuc->event[n0] = event;
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@ -1097,7 +1097,7 @@ static int sparc_pmu_event_init(struct perf_event *event)
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n = 0;
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if (event->group_leader != event) {
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n = collect_events(event->group_leader,
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perf_max_events - 1,
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MAX_HWEVENTS - 1,
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evts, events, current_idx_dmy);
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if (n < 0)
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return -EINVAL;
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@ -1309,9 +1309,6 @@ void __init init_hw_perf_events(void)
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pr_cont("Supported PMU type is '%s'\n", sparc_pmu_type);
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/* All sparc64 PMUs currently have 2 events. */
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perf_max_events = 2;
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perf_pmu_register(&pmu);
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register_die_notifier(&perf_event_nmi_notifier);
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}
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@ -1396,7 +1396,6 @@ void __init init_hw_perf_events(void)
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x86_pmu.num_counters = X86_PMC_MAX_GENERIC;
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}
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x86_pmu.intel_ctrl = (1 << x86_pmu.num_counters) - 1;
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perf_max_events = x86_pmu.num_counters;
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if (x86_pmu.num_counters_fixed > X86_PMC_MAX_FIXED) {
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WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!",
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@ -860,7 +860,6 @@ struct perf_cpu_context {
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struct perf_event_context ctx;
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struct perf_event_context *task_ctx;
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int active_oncpu;
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int max_pertask;
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int exclusive;
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struct swevent_hlist *swevent_hlist;
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struct mutex hlist_mutex;
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@ -883,11 +882,6 @@ struct perf_output_handle {
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#ifdef CONFIG_PERF_EVENTS
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/*
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* Set by architecture code:
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*/
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extern int perf_max_events;
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extern int perf_pmu_register(struct pmu *pmu);
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extern void perf_pmu_unregister(struct pmu *pmu);
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@ -39,10 +39,6 @@
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*/
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static DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context);
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int perf_max_events __read_mostly = 1;
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static int perf_reserved_percpu __read_mostly;
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static int perf_overcommit __read_mostly = 1;
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static atomic_t nr_events __read_mostly;
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static atomic_t nr_mmap_events __read_mostly;
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static atomic_t nr_comm_events __read_mostly;
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@ -66,11 +62,6 @@ int sysctl_perf_event_sample_rate __read_mostly = 100000;
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static atomic64_t perf_event_id;
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/*
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* Lock for (sysadmin-configurable) event reservations:
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*/
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static DEFINE_SPINLOCK(perf_resource_lock);
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void __weak perf_event_print_debug(void) { }
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void perf_pmu_disable(struct pmu *pmu)
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@ -480,16 +471,6 @@ static void __perf_event_remove_from_context(void *info)
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list_del_event(event, ctx);
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if (!ctx->task) {
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/*
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* Allow more per task events with respect to the
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* reservation:
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*/
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cpuctx->max_pertask =
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min(perf_max_events - ctx->nr_events,
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perf_max_events - perf_reserved_percpu);
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}
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raw_spin_unlock(&ctx->lock);
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}
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@ -823,9 +804,6 @@ static void __perf_install_in_context(void *info)
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}
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}
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if (!err && !ctx->task && cpuctx->max_pertask)
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cpuctx->max_pertask--;
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unlock:
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raw_spin_unlock(&ctx->lock);
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}
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@ -5930,10 +5908,6 @@ static void __cpuinit perf_event_init_cpu(int cpu)
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cpuctx = &per_cpu(perf_cpu_context, cpu);
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spin_lock(&perf_resource_lock);
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cpuctx->max_pertask = perf_max_events - perf_reserved_percpu;
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spin_unlock(&perf_resource_lock);
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mutex_lock(&cpuctx->hlist_mutex);
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if (cpuctx->hlist_refcount > 0) {
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struct swevent_hlist *hlist;
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@ -6008,101 +5982,3 @@ void __init perf_event_init(void)
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perf_tp_register();
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perf_cpu_notifier(perf_cpu_notify);
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}
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static ssize_t perf_show_reserve_percpu(struct sysdev_class *class,
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struct sysdev_class_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%d\n", perf_reserved_percpu);
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}
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static ssize_t
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perf_set_reserve_percpu(struct sysdev_class *class,
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struct sysdev_class_attribute *attr,
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const char *buf,
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size_t count)
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{
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struct perf_cpu_context *cpuctx;
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unsigned long val;
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int err, cpu, mpt;
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err = strict_strtoul(buf, 10, &val);
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if (err)
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return err;
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if (val > perf_max_events)
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return -EINVAL;
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spin_lock(&perf_resource_lock);
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perf_reserved_percpu = val;
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for_each_online_cpu(cpu) {
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cpuctx = &per_cpu(perf_cpu_context, cpu);
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raw_spin_lock_irq(&cpuctx->ctx.lock);
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mpt = min(perf_max_events - cpuctx->ctx.nr_events,
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perf_max_events - perf_reserved_percpu);
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cpuctx->max_pertask = mpt;
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raw_spin_unlock_irq(&cpuctx->ctx.lock);
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}
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spin_unlock(&perf_resource_lock);
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return count;
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}
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static ssize_t perf_show_overcommit(struct sysdev_class *class,
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struct sysdev_class_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%d\n", perf_overcommit);
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}
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static ssize_t
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perf_set_overcommit(struct sysdev_class *class,
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struct sysdev_class_attribute *attr,
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const char *buf, size_t count)
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{
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unsigned long val;
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int err;
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err = strict_strtoul(buf, 10, &val);
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if (err)
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return err;
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if (val > 1)
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return -EINVAL;
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spin_lock(&perf_resource_lock);
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perf_overcommit = val;
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spin_unlock(&perf_resource_lock);
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return count;
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}
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static SYSDEV_CLASS_ATTR(
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reserve_percpu,
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0644,
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perf_show_reserve_percpu,
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perf_set_reserve_percpu
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);
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static SYSDEV_CLASS_ATTR(
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overcommit,
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0644,
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perf_show_overcommit,
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perf_set_overcommit
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);
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static struct attribute *perfclass_attrs[] = {
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&attr_reserve_percpu.attr,
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&attr_overcommit.attr,
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NULL
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};
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static struct attribute_group perfclass_attr_group = {
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.attrs = perfclass_attrs,
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.name = "perf_events",
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};
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static int __init perf_event_sysfs_init(void)
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{
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return sysfs_create_group(&cpu_sysdev_class.kset.kobj,
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&perfclass_attr_group);
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}
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device_initcall(perf_event_sysfs_init);
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