mirror of
https://github.com/edk2-porting/linux-next.git
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ARM: sti: Add STiH416 SOC support
The STiH416 is advanced HD AVC processor with 3D graphics acceleration and 1.2-GHz ARM Cortex-A9 SMP CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Srinivas Kandagatla
Olof Johansson
parent
65ebcc1158
commit
15969b4577
12
Documentation/arm/sti/stih416-overview.txt
Normal file
12
Documentation/arm/sti/stih416-overview.txt
Normal file
@ -0,0 +1,12 @@
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STiH416 Overview
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================
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Introduction
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------------
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The STiH416 is the next generation of HD, AVC set-top box processors
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for satellite, cable, terrestrial and IP-STB markets.
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Features
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- ARM Cortex-A9 1.2 GHz dual core CPU
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- SATA2x2,USB 2.0x3, PCIe, Gbit Ethernet MACx2
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41
arch/arm/boot/dts/stih416-clock.dtsi
Normal file
41
arch/arm/boot/dts/stih416-clock.dtsi
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@ -0,0 +1,41 @@
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/*
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* Copyright (C) 2013 STMicroelectronics R&D Limited
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* <stlinux-devel@stlinux.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/ {
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clocks {
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/*
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* Fixed 30MHz oscillator inputs to SoC
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*/
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CLK_SYSIN: CLK_SYSIN {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <30000000>;
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clock-output-names = "CLK_SYSIN";
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};
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/*
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* ARM Peripheral clock for timers
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*/
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arm_periph_clk: arm_periph_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <600000000>;
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};
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/*
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* Bootloader initialized system infrastructure clock for
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* serial devices.
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*/
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CLK_S_ICN_REG_0: clockgenA0@4 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "CLK_S_ICN_REG_0";
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};
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};
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};
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295
arch/arm/boot/dts/stih416-pinctrl.dtsi
Normal file
295
arch/arm/boot/dts/stih416-pinctrl.dtsi
Normal file
@ -0,0 +1,295 @@
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/*
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* Copyright (C) 2013 STMicroelectronics Limited.
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* Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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#include "st-pincfg.h"
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/ {
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aliases {
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gpio0 = &PIO0;
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gpio1 = &PIO1;
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gpio2 = &PIO2;
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gpio3 = &PIO3;
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gpio4 = &PIO4;
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gpio5 = &PIO40;
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gpio6 = &PIO5;
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gpio7 = &PIO6;
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gpio8 = &PIO7;
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gpio9 = &PIO8;
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gpio10 = &PIO9;
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gpio11 = &PIO10;
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gpio12 = &PIO11;
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gpio13 = &PIO12;
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gpio14 = &PIO30;
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gpio15 = &PIO31;
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gpio16 = &PIO13;
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gpio17 = &PIO14;
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gpio18 = &PIO15;
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gpio19 = &PIO16;
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gpio20 = &PIO17;
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gpio21 = &PIO18;
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gpio22 = &PIO100;
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gpio23 = &PIO101;
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gpio24 = &PIO102;
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gpio25 = &PIO103;
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gpio26 = &PIO104;
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gpio27 = &PIO105;
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gpio28 = &PIO106;
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gpio29 = &PIO107;
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};
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soc {
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pin-controller-sbc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih416-sbc-pinctrl";
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st,syscfg = <&syscfg_sbc>;
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ranges = <0 0xfe610000 0x6000>;
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PIO0: gpio@fe610000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO0";
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};
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PIO1: gpio@fe611000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO1";
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};
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PIO2: gpio@fe612000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO2";
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};
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PIO3: gpio@fe613000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x3000 0x100>;
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st,bank-name = "PIO3";
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};
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PIO4: gpio@fe614000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x4000 0x100>;
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st,bank-name = "PIO4";
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};
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PIO40: gpio@fe615000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x5000 0x100>;
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st,bank-name = "PIO40";
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st,retime-pin-mask = <0x7f>;
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};
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sbc_serial1 {
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pinctrl_sbc_serial1: sbc_serial1 {
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st,pins {
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tx = <&PIO2 6 ALT3 OUT>;
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rx = <&PIO2 7 ALT3 IN>;
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};
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};
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};
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};
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pin-controller-front {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih416-front-pinctrl";
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st,syscfg = <&syscfg_front>;
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ranges = <0 0xfee00000 0x10000>;
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PIO5: gpio@fee00000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO5";
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};
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PIO6: gpio@fee01000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO6";
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};
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PIO7: gpio@fee02000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO7";
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};
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PIO8: gpio@fee03000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x3000 0x100>;
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st,bank-name = "PIO8";
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};
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PIO9: gpio@fee04000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x4000 0x100>;
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st,bank-name = "PIO9";
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};
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PIO10: gpio@fee05000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x5000 0x100>;
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st,bank-name = "PIO10";
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};
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PIO11: gpio@fee06000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x6000 0x100>;
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st,bank-name = "PIO11";
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};
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PIO12: gpio@fee07000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x7000 0x100>;
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st,bank-name = "PIO12";
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};
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PIO30: gpio@fee08000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x8000 0x100>;
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st,bank-name = "PIO30";
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};
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PIO31: gpio@fee09000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x9000 0x100>;
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st,bank-name = "PIO31";
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};
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};
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pin-controller-rear {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih416-rear-pinctrl";
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st,syscfg = <&syscfg_rear>;
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ranges = <0 0xfe820000 0x6000>;
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PIO13: gpio@fe820000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO13";
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};
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PIO14: gpio@fe821000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO14";
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};
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PIO15: gpio@fe822000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO15";
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};
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PIO16: gpio@fe823000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x3000 0x100>;
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st,bank-name = "PIO16";
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};
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PIO17: gpio@fe824000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x4000 0x100>;
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st,bank-name = "PIO17";
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};
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PIO18: gpio@fe825000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x5000 0x100>;
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st,bank-name = "PIO18";
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st,retime-pin-mask = <0xf>;
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};
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serial2 {
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pinctrl_serial2: serial2-0 {
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st,pins {
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tx = <&PIO17 4 ALT2 OUT>;
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rx = <&PIO17 5 ALT2 IN>;
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output-enable = <&PIO11 3 ALT2 OUT>;
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};
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};
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};
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};
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pin-controller-fvdp-fe {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih416-fvdp-fe-pinctrl";
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st,syscfg = <&syscfg_fvdp_fe>;
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ranges = <0 0xfd6b0000 0x3000>;
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PIO100: gpio@fd6b0000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO100";
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};
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PIO101: gpio@fd6b1000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO101";
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};
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PIO102: gpio@fd6b2000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO102";
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};
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};
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pin-controller-fvdp-lite {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih416-fvdp-lite-pinctrl";
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st,syscfg = <&syscfg_fvdp_lite>;
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ranges = <0 0xfd330000 0x5000>;
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PIO103: gpio@fd330000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO103";
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};
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PIO104: gpio@fd331000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO104";
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};
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PIO105: gpio@fd332000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO105";
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};
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PIO106: gpio@fd333000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x3000 0x100>;
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st,bank-name = "PIO106";
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};
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PIO107: gpio@fd334000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x4000 0x100>;
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st,bank-name = "PIO107";
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st,retime-pin-mask = <0xf>;
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};
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};
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};
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};
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96
arch/arm/boot/dts/stih416.dtsi
Normal file
96
arch/arm/boot/dts/stih416.dtsi
Normal file
@ -0,0 +1,96 @@
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/*
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* Copyright (C) 2012 STMicroelectronics Limited.
|
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* Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* publishhed by the Free Software Foundation.
|
||||
*/
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#include "stih41x.dtsi"
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#include "stih416-clock.dtsi"
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#include "stih416-pinctrl.dtsi"
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/ {
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L2: cache-controller {
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compatible = "arm,pl310-cache";
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reg = <0xfffe2000 0x1000>;
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arm,data-latency = <3 3 3>;
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arm,tag-latency = <2 2 2>;
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cache-unified;
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cache-level = <2>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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ranges;
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compatible = "simple-bus";
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syscfg_sbc:sbc-syscfg@fe600000{
|
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compatible = "st,stih416-sbc-syscfg", "syscon";
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reg = <0xfe600000 0x1000>;
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};
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syscfg_front:front-syscfg@fee10000{
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compatible = "st,stih416-front-syscfg", "syscon";
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reg = <0xfee10000 0x1000>;
|
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};
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syscfg_rear:rear-syscfg@fe830000{
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compatible = "st,stih416-rear-syscfg", "syscon";
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reg = <0xfe830000 0x1000>;
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};
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/* MPE */
|
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syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
|
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compatible = "st,stih416-fvdp-fe-syscfg", "syscon";
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reg = <0xfddf0000 0x1000>;
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};
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syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
|
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compatible = "st,stih416-fvdp-lite-syscfg", "syscon";
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reg = <0xfd6a0000 0x1000>;
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};
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syscfg_cpu:cpu-syscfg@fdde0000{
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compatible = "st,stih416-cpu-syscfg", "syscon";
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reg = <0xfdde0000 0x1000>;
|
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};
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syscfg_compo:compo-syscfg@fd320000{
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compatible = "st,stih416-compo-syscfg", "syscon";
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reg = <0xfd320000 0x1000>;
|
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};
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syscfg_transport:transport-syscfg@fd690000{
|
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compatible = "st,stih416-transport-syscfg", "syscon";
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reg = <0xfd690000 0x1000>;
|
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};
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syscfg_lpm:lpm-syscfg@fe4b5100{
|
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compatible = "st,stih416-lpm-syscfg", "syscon";
|
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reg = <0xfe4b5100 0x8>;
|
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};
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serial2: serial@fed32000{
|
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compatible = "st,asc";
|
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status = "disabled";
|
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reg = <0xfed32000 0x2c>;
|
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interrupts = <0 197 0>;
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clocks = <&CLK_S_ICN_REG_0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_serial2>;
|
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};
|
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|
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/* SBC_UART1 */
|
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sbc_serial1: serial@fe531000 {
|
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compatible = "st,asc";
|
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status = "disabled";
|
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reg = <0xfe531000 0x2c>;
|
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interrupts = <0 210 0>;
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&pinctrl_sbc_serial1>;
|
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clocks = <&CLK_SYSIN>;
|
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};
|
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};
|
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};
|
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@ -33,4 +33,13 @@ config SOC_STIH415
|
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and other digital audio/video applications using Flattned Device
|
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Trees.
|
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|
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config SOC_STIH416
|
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bool "STiH416 STMicroelectronics Consumer Electronics family"
|
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default y
|
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help
|
||||
This enables support for STMicroelectronics Digital Consumer
|
||||
Electronics family StiH416 parts, primarily targetted at set-top-box
|
||||
and other digital audio/video applications using Flattened Device
|
||||
Trees.
|
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|
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endif
|
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|
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@ -37,10 +37,11 @@ static void __init stih41x_timer_init(void)
|
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|
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static const char *stih41x_dt_match[] __initdata = {
|
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"st,stih415",
|
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"st,stih416",
|
||||
NULL
|
||||
};
|
||||
|
||||
DT_MACHINE_START(STM, "STiH415 SoC with Flattened Device Tree")
|
||||
DT_MACHINE_START(STM, "STiH415/416 SoC with Flattened Device Tree")
|
||||
.init_time = stih41x_timer_init,
|
||||
.smp = smp_ops(sti_smp_ops),
|
||||
.dt_compat = stih41x_dt_match,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user