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drm/amdkfd: Change the control stack MTYPE from UC to NC on GFX9
CWSR fails on Raven if the control stack is MTYPE_UC, which is used for regular GART mappings. As a workaround we map it using MTYPE_NC. The MEC firmware expects the control stack at one page offset from the start of the MQD so it is part of the MQD allocation on GFXv9. AMDGPU added a memory allocation flag just for this purpose. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Yong Zhao <yong.zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -272,7 +272,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd)
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int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
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void **mem_obj, uint64_t *gpu_addr,
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void **cpu_ptr)
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void **cpu_ptr, bool mqd_gfx9)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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struct amdgpu_bo *bo = NULL;
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@ -287,6 +287,10 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
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bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC;
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bp.type = ttm_bo_type_kernel;
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bp.resv = NULL;
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if (mqd_gfx9)
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bp.flags |= AMDGPU_GEM_CREATE_MQD_GFX9;
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r = amdgpu_bo_create(adev, &bp, &bo);
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if (r) {
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dev_err(adev->dev,
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@ -136,7 +136,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);
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/* Shared API */
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int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
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void **mem_obj, uint64_t *gpu_addr,
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void **cpu_ptr);
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void **cpu_ptr, bool mqd_gfx9);
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void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
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void get_local_mem_info(struct kgd_dev *kgd,
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struct kfd_local_mem_info *mem_info);
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@ -457,7 +457,8 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
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if (kfd->kfd2kgd->init_gtt_mem_allocation(
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kfd->kgd, size, &kfd->gtt_mem,
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&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){
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&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr,
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false)) {
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dev_err(kfd_device, "Could not allocate %d bytes\n", size);
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goto out;
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}
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@ -88,7 +88,7 @@ static int init_mqd(struct mqd_manager *mm, void **mqd,
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ALIGN(sizeof(struct v9_mqd), PAGE_SIZE),
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&((*mqd_mem_obj)->gtt_mem),
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&((*mqd_mem_obj)->gpu_addr),
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(void *)&((*mqd_mem_obj)->cpu_ptr));
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(void *)&((*mqd_mem_obj)->cpu_ptr), true);
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} else
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retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct v9_mqd),
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mqd_mem_obj);
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@ -292,7 +292,7 @@ struct tile_config {
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struct kfd2kgd_calls {
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int (*init_gtt_mem_allocation)(struct kgd_dev *kgd, size_t size,
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void **mem_obj, uint64_t *gpu_addr,
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void **cpu_ptr);
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void **cpu_ptr, bool mqd_gfx9);
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void (*free_gtt_mem)(struct kgd_dev *kgd, void *mem_obj);
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