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drm/i915: Store the active forcewake range table pointer
If we store this in the uncore structure we are on a good way to show more commonality between the per-platform implementations. v2: Constify table pointer and correct coding style. (Chris Wilson) v3: Rebase. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -582,9 +582,19 @@ struct intel_uncore_funcs {
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uint32_t val, bool trace);
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uint32_t val, bool trace);
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};
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};
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struct intel_forcewake_range {
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u32 start;
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u32 end;
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enum forcewake_domains domains;
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};
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struct intel_uncore {
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struct intel_uncore {
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spinlock_t lock; /** lock is also taken in irq contexts. */
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spinlock_t lock; /** lock is also taken in irq contexts. */
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const struct intel_forcewake_range *fw_domains_table;
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unsigned int fw_domains_table_entries;
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struct intel_uncore_funcs funcs;
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struct intel_uncore_funcs funcs;
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unsigned fifo_count;
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unsigned fifo_count;
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@ -582,14 +582,6 @@ void assert_forcewakes_inactive(struct drm_i915_private *dev_priv)
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__fwd; \
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__fwd; \
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})
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})
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struct intel_forcewake_range
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{
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u32 start;
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u32 end;
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enum forcewake_domains domains;
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};
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static int fw_range_cmp(const void *key, const void *elt)
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static int fw_range_cmp(const void *key, const void *elt)
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{
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{
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const struct intel_forcewake_range *entry = elt;
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const struct intel_forcewake_range *entry = elt;
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@ -604,28 +596,38 @@ static int fw_range_cmp(const void *key, const void *elt)
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}
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}
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static enum forcewake_domains
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static enum forcewake_domains
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find_fw_domain(u32 offset, const struct intel_forcewake_range *ranges,
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find_fw_domain(struct drm_i915_private *dev_priv, u32 offset)
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unsigned int num_ranges)
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{
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{
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struct intel_forcewake_range *entry;
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const struct intel_forcewake_range *table, *entry;
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unsigned int num_entries;
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entry = bsearch((void *)(unsigned long)offset, (const void *)ranges,
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table = dev_priv->uncore.fw_domains_table;
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num_ranges, sizeof(struct intel_forcewake_range),
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num_entries = dev_priv->uncore.fw_domains_table_entries;
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entry = bsearch((void *)(unsigned long)offset, (const void *)table,
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num_entries, sizeof(struct intel_forcewake_range),
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fw_range_cmp);
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fw_range_cmp);
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return entry ? entry->domains : 0;
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return entry ? entry->domains : 0;
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}
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}
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static void
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static void
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intel_fw_table_check(const struct intel_forcewake_range *ranges,
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intel_fw_table_check(struct drm_i915_private *dev_priv)
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unsigned int num_ranges)
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{
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{
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const struct intel_forcewake_range *ranges;
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unsigned int num_ranges;
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s32 prev;
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s32 prev;
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unsigned int i;
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unsigned int i;
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if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG))
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if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG))
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return;
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return;
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ranges = dev_priv->uncore.fw_domains_table;
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if (!ranges)
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return;
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num_ranges = dev_priv->uncore.fw_domains_table_entries;
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for (i = 0, prev = -1; i < num_ranges; i++, ranges++) {
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for (i = 0, prev = -1; i < num_ranges; i++, ranges++) {
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WARN_ON_ONCE(prev >= (s32)ranges->start);
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WARN_ON_ONCE(prev >= (s32)ranges->start);
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prev = ranges->start;
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prev = ranges->start;
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@ -652,8 +654,7 @@ static const struct intel_forcewake_range __vlv_fw_ranges[] = {
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({ \
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({ \
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enum forcewake_domains __fwd = 0; \
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enum forcewake_domains __fwd = 0; \
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if (NEEDS_FORCE_WAKE((offset))) \
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if (NEEDS_FORCE_WAKE((offset))) \
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__fwd = find_fw_domain(offset, __vlv_fw_ranges, \
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__fwd = find_fw_domain(dev_priv, offset); \
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ARRAY_SIZE(__vlv_fw_ranges)); \
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__fwd; \
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__fwd; \
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})
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})
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@ -711,8 +712,7 @@ static const struct intel_forcewake_range __chv_fw_ranges[] = {
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({ \
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({ \
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enum forcewake_domains __fwd = 0; \
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enum forcewake_domains __fwd = 0; \
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if (NEEDS_FORCE_WAKE((offset))) \
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if (NEEDS_FORCE_WAKE((offset))) \
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__fwd = find_fw_domain(offset, __chv_fw_ranges, \
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__fwd = find_fw_domain(dev_priv, offset); \
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ARRAY_SIZE(__chv_fw_ranges)); \
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__fwd; \
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__fwd; \
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})
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})
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@ -720,8 +720,7 @@ static const struct intel_forcewake_range __chv_fw_ranges[] = {
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({ \
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({ \
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enum forcewake_domains __fwd = 0; \
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enum forcewake_domains __fwd = 0; \
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if (NEEDS_FORCE_WAKE((offset)) && !is_gen8_shadowed(offset)) \
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if (NEEDS_FORCE_WAKE((offset)) && !is_gen8_shadowed(offset)) \
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__fwd = find_fw_domain(offset, __chv_fw_ranges, \
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__fwd = find_fw_domain(dev_priv, offset); \
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ARRAY_SIZE(__chv_fw_ranges)); \
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__fwd; \
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__fwd; \
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})
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})
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@ -765,8 +764,7 @@ static const struct intel_forcewake_range __gen9_fw_ranges[] = {
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({ \
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({ \
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enum forcewake_domains __fwd = 0; \
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enum forcewake_domains __fwd = 0; \
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if (NEEDS_FORCE_WAKE((offset))) \
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if (NEEDS_FORCE_WAKE((offset))) \
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__fwd = find_fw_domain(offset, __gen9_fw_ranges, \
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__fwd = find_fw_domain(dev_priv, offset); \
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ARRAY_SIZE(__gen9_fw_ranges)); \
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__fwd; \
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__fwd; \
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})
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})
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@ -794,8 +792,7 @@ static bool is_gen9_shadowed(u32 offset)
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({ \
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({ \
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enum forcewake_domains __fwd = 0; \
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enum forcewake_domains __fwd = 0; \
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if (NEEDS_FORCE_WAKE((offset)) && !is_gen9_shadowed(offset)) \
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if (NEEDS_FORCE_WAKE((offset)) && !is_gen9_shadowed(offset)) \
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__fwd = find_fw_domain(offset, __gen9_fw_ranges, \
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__fwd = find_fw_domain(dev_priv, offset); \
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ARRAY_SIZE(__gen9_fw_ranges)); \
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__fwd; \
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__fwd; \
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})
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})
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@ -1317,6 +1314,13 @@ static void intel_uncore_fw_domains_init(struct drm_i915_private *dev_priv)
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WARN_ON(dev_priv->uncore.fw_domains == 0);
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WARN_ON(dev_priv->uncore.fw_domains == 0);
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}
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}
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#define ASSIGN_FW_DOMAINS_TABLE(d) \
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{ \
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dev_priv->uncore.fw_domains_table = \
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(struct intel_forcewake_range *)(d); \
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dev_priv->uncore.fw_domains_table_entries = ARRAY_SIZE((d)); \
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}
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void intel_uncore_init(struct drm_i915_private *dev_priv)
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void intel_uncore_init(struct drm_i915_private *dev_priv)
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{
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{
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i915_check_vgpu(dev_priv);
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i915_check_vgpu(dev_priv);
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@ -1330,17 +1334,13 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
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switch (INTEL_INFO(dev_priv)->gen) {
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switch (INTEL_INFO(dev_priv)->gen) {
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default:
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default:
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case 9:
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case 9:
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intel_fw_table_check(__gen9_fw_ranges,
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ASSIGN_FW_DOMAINS_TABLE(__gen9_fw_ranges);
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ARRAY_SIZE(__gen9_fw_ranges));
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ASSIGN_WRITE_MMIO_VFUNCS(gen9);
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ASSIGN_WRITE_MMIO_VFUNCS(gen9);
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ASSIGN_READ_MMIO_VFUNCS(gen9);
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ASSIGN_READ_MMIO_VFUNCS(gen9);
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break;
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break;
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case 8:
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case 8:
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if (IS_CHERRYVIEW(dev_priv)) {
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if (IS_CHERRYVIEW(dev_priv)) {
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intel_fw_table_check(__chv_fw_ranges,
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ASSIGN_FW_DOMAINS_TABLE(__chv_fw_ranges);
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ARRAY_SIZE(__chv_fw_ranges));
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ASSIGN_WRITE_MMIO_VFUNCS(chv);
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ASSIGN_WRITE_MMIO_VFUNCS(chv);
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ASSIGN_READ_MMIO_VFUNCS(chv);
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ASSIGN_READ_MMIO_VFUNCS(chv);
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@ -1354,9 +1354,7 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
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ASSIGN_WRITE_MMIO_VFUNCS(gen6);
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ASSIGN_WRITE_MMIO_VFUNCS(gen6);
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if (IS_VALLEYVIEW(dev_priv)) {
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if (IS_VALLEYVIEW(dev_priv)) {
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intel_fw_table_check(__vlv_fw_ranges,
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ASSIGN_FW_DOMAINS_TABLE(__vlv_fw_ranges);
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ARRAY_SIZE(__vlv_fw_ranges));
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ASSIGN_READ_MMIO_VFUNCS(vlv);
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ASSIGN_READ_MMIO_VFUNCS(vlv);
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} else {
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} else {
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ASSIGN_READ_MMIO_VFUNCS(gen6);
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ASSIGN_READ_MMIO_VFUNCS(gen6);
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@ -1374,6 +1372,8 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
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break;
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break;
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}
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}
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intel_fw_table_check(dev_priv);
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if (intel_vgpu_active(dev_priv)) {
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if (intel_vgpu_active(dev_priv)) {
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ASSIGN_WRITE_MMIO_VFUNCS(vgpu);
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ASSIGN_WRITE_MMIO_VFUNCS(vgpu);
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ASSIGN_READ_MMIO_VFUNCS(vgpu);
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ASSIGN_READ_MMIO_VFUNCS(vgpu);
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