mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-29 15:43:59 +08:00
Merge tag 'for-linville-20131203' of git://github.com/kvalo/ath
Conflicts: drivers/net/wireless/ath/ath10k/htc.c drivers/net/wireless/ath/ath10k/mac.c
This commit is contained in:
commit
145babc68e
@ -243,6 +243,16 @@ static inline void ath10k_ce_error_intr_enable(struct ath10k *ar,
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misc_ie_addr | CE_ERROR_MASK);
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}
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static inline void ath10k_ce_error_intr_disable(struct ath10k *ar,
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u32 ce_ctrl_addr)
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{
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u32 misc_ie_addr = ath10k_pci_read32(ar,
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ce_ctrl_addr + MISC_IE_ADDRESS);
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ath10k_pci_write32(ar, ce_ctrl_addr + MISC_IE_ADDRESS,
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misc_ie_addr & ~CE_ERROR_MASK);
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}
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static inline void ath10k_ce_engine_int_status_clear(struct ath10k *ar,
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u32 ce_ctrl_addr,
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unsigned int mask)
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@ -731,7 +741,6 @@ void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id)
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void ath10k_ce_per_engine_service_any(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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int ce_id, ret;
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u32 intr_summary;
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@ -741,7 +750,7 @@ void ath10k_ce_per_engine_service_any(struct ath10k *ar)
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intr_summary = CE_INTERRUPT_SUMMARY(ar);
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for (ce_id = 0; intr_summary && (ce_id < ar_pci->ce_count); ce_id++) {
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for (ce_id = 0; intr_summary && (ce_id < CE_COUNT); ce_id++) {
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if (intr_summary & (1 << ce_id))
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intr_summary &= ~(1 << ce_id);
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else
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@ -783,22 +792,25 @@ static void ath10k_ce_per_engine_handler_adjust(struct ath10k_ce_pipe *ce_state,
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ath10k_pci_sleep(ar);
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}
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void ath10k_ce_disable_interrupts(struct ath10k *ar)
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int ath10k_ce_disable_interrupts(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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int ce_id, ret;
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ret = ath10k_pci_wake(ar);
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if (ret)
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return;
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return ret;
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for (ce_id = 0; ce_id < ar_pci->ce_count; ce_id++) {
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struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id];
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u32 ctrl_addr = ce_state->ctrl_addr;
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for (ce_id = 0; ce_id < CE_COUNT; ce_id++) {
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u32 ctrl_addr = ath10k_ce_base_address(ce_id);
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ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr);
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ath10k_ce_error_intr_disable(ar, ctrl_addr);
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ath10k_ce_watermark_intr_disable(ar, ctrl_addr);
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}
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ath10k_pci_sleep(ar);
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return 0;
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}
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void ath10k_ce_send_cb_register(struct ath10k_ce_pipe *ce_state,
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@ -1047,9 +1059,19 @@ struct ath10k_ce_pipe *ath10k_ce_init(struct ath10k *ar,
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const struct ce_attr *attr)
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{
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struct ath10k_ce_pipe *ce_state;
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u32 ctrl_addr = ath10k_ce_base_address(ce_id);
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int ret;
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/*
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* Make sure there's enough CE ringbuffer entries for HTT TX to avoid
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* additional TX locking checks.
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*
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* For the lack of a better place do the check here.
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*/
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BUILD_BUG_ON(TARGET_NUM_MSDU_DESC >
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(CE_HTT_H2T_MSG_SRC_NENTRIES - 1));
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BUILD_BUG_ON(TARGET_10X_NUM_MSDU_DESC >
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(CE_HTT_H2T_MSG_SRC_NENTRIES - 1));
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ret = ath10k_pci_wake(ar);
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if (ret)
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return NULL;
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@ -1057,7 +1079,7 @@ struct ath10k_ce_pipe *ath10k_ce_init(struct ath10k *ar,
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ce_state = ath10k_ce_init_state(ar, ce_id, attr);
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if (!ce_state) {
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ath10k_err("Failed to initialize CE state for ID: %d\n", ce_id);
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return NULL;
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goto out;
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}
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if (attr->src_nentries) {
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@ -1066,7 +1088,8 @@ struct ath10k_ce_pipe *ath10k_ce_init(struct ath10k *ar,
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ath10k_err("Failed to initialize CE src ring for ID: %d (%d)\n",
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ce_id, ret);
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ath10k_ce_deinit(ce_state);
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return NULL;
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ce_state = NULL;
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goto out;
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}
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}
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@ -1076,15 +1099,13 @@ struct ath10k_ce_pipe *ath10k_ce_init(struct ath10k *ar,
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ath10k_err("Failed to initialize CE dest ring for ID: %d (%d)\n",
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ce_id, ret);
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ath10k_ce_deinit(ce_state);
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return NULL;
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ce_state = NULL;
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goto out;
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}
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}
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/* Enable CE error interrupts */
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ath10k_ce_error_intr_enable(ar, ctrl_addr);
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out:
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ath10k_pci_sleep(ar);
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return ce_state;
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}
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@ -234,7 +234,7 @@ void ath10k_ce_deinit(struct ath10k_ce_pipe *ce_state);
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/*==================CE Interrupt Handlers====================*/
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void ath10k_ce_per_engine_service_any(struct ath10k *ar);
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void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id);
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void ath10k_ce_disable_interrupts(struct ath10k *ar);
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int ath10k_ce_disable_interrupts(struct ath10k *ar);
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/* ce_attr.flags values */
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/* Use NonSnooping PCIe accesses? */
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@ -597,10 +597,8 @@ static int ath10k_init_uart(struct ath10k *ar)
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return ret;
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}
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if (!uart_print) {
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ath10k_info("UART prints disabled\n");
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if (!uart_print)
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return 0;
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}
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ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
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if (ret) {
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@ -645,8 +643,8 @@ static int ath10k_init_hw_params(struct ath10k *ar)
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ar->hw_params = *hw_params;
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ath10k_info("Hardware name %s version 0x%x\n",
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ar->hw_params.name, ar->target_version);
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ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
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ar->hw_params.name, ar->target_version);
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return 0;
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}
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@ -664,7 +662,8 @@ static void ath10k_core_restart(struct work_struct *work)
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ieee80211_restart_hw(ar->hw);
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break;
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case ATH10K_STATE_OFF:
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/* this can happen if driver is being unloaded */
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/* this can happen if driver is being unloaded
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* or if the crash happens during FW probing */
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ath10k_warn("cannot restart a device that hasn't been started\n");
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break;
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case ATH10K_STATE_RESTARTING:
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@ -737,8 +736,6 @@ EXPORT_SYMBOL(ath10k_core_create);
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void ath10k_core_destroy(struct ath10k *ar)
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{
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ath10k_debug_destroy(ar);
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flush_workqueue(ar->workqueue);
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destroy_workqueue(ar->workqueue);
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@ -786,21 +783,30 @@ int ath10k_core_start(struct ath10k *ar)
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goto err;
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}
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status = ath10k_htc_wait_target(&ar->htc);
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if (status)
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status = ath10k_hif_start(ar);
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if (status) {
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ath10k_err("could not start HIF: %d\n", status);
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goto err_wmi_detach;
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}
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status = ath10k_htc_wait_target(&ar->htc);
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if (status) {
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ath10k_err("failed to connect to HTC: %d\n", status);
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goto err_hif_stop;
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}
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status = ath10k_htt_attach(ar);
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if (status) {
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ath10k_err("could not attach htt (%d)\n", status);
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goto err_wmi_detach;
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goto err_hif_stop;
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}
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status = ath10k_init_connect_htc(ar);
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if (status)
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goto err_htt_detach;
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ath10k_info("firmware %s booted\n", ar->hw->wiphy->fw_version);
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ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n",
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ar->hw->wiphy->fw_version);
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status = ath10k_wmi_cmd_init(ar);
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if (status) {
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@ -826,12 +832,23 @@ int ath10k_core_start(struct ath10k *ar)
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ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
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INIT_LIST_HEAD(&ar->arvifs);
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if (!test_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags))
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ath10k_info("%s (0x%x) fw %s api %d htt %d.%d\n",
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ar->hw_params.name, ar->target_version,
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ar->hw->wiphy->fw_version, ar->fw_api,
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ar->htt.target_version_major,
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ar->htt.target_version_minor);
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__set_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags);
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return 0;
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err_disconnect_htc:
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ath10k_htc_stop(&ar->htc);
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err_htt_detach:
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ath10k_htt_detach(&ar->htt);
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err_hif_stop:
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ath10k_hif_stop(ar);
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err_wmi_detach:
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ath10k_wmi_detach(ar);
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err:
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@ -985,6 +1002,8 @@ void ath10k_core_unregister(struct ath10k *ar)
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ath10k_mac_unregister(ar);
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ath10k_core_free_firmware_files(ar);
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ath10k_debug_destroy(ar);
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}
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EXPORT_SYMBOL(ath10k_core_unregister);
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|
@ -30,6 +30,7 @@
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#include "wmi.h"
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#include "../ath.h"
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#include "../regd.h"
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#include "../dfs_pattern_detector.h"
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|
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#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
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#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
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@ -43,7 +44,7 @@
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/* Antenna noise floor */
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#define ATH10K_DEFAULT_NOISE_FLOOR -95
|
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#define ATH10K_MAX_NUM_MGMT_PENDING 16
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#define ATH10K_MAX_NUM_MGMT_PENDING 128
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struct ath10k;
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@ -192,6 +193,14 @@ struct ath10k_target_stats {
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};
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struct ath10k_dfs_stats {
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u32 phy_errors;
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u32 pulses_total;
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u32 pulses_detected;
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u32 pulses_discarded;
|
||||
u32 radar_detected;
|
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};
|
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|
||||
#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
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|
||||
struct ath10k_peer {
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||||
@ -261,6 +270,8 @@ struct ath10k_debug {
|
||||
|
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unsigned long htt_stats_mask;
|
||||
struct delayed_work htt_stats_dwork;
|
||||
struct ath10k_dfs_stats dfs_stats;
|
||||
struct ath_dfs_pool_stats dfs_pool_stats;
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||||
};
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||||
|
||||
enum ath10k_state {
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@ -299,6 +310,12 @@ enum ath10k_fw_features {
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ATH10K_FW_FEATURE_COUNT,
|
||||
};
|
||||
|
||||
enum ath10k_dev_flags {
|
||||
/* Indicates that ath10k device is during CAC phase of DFS */
|
||||
ATH10K_CAC_RUNNING,
|
||||
ATH10K_FLAG_FIRST_BOOT_DONE,
|
||||
};
|
||||
|
||||
struct ath10k {
|
||||
struct ath_common ath_common;
|
||||
struct ieee80211_hw *hw;
|
||||
@ -392,6 +409,8 @@ struct ath10k {
|
||||
bool monitor_enabled;
|
||||
bool monitor_present;
|
||||
unsigned int filter_flags;
|
||||
unsigned long dev_flags;
|
||||
u32 dfs_block_radar_events;
|
||||
|
||||
struct wmi_pdev_set_wmm_params_arg wmm_params;
|
||||
struct completion install_key_done;
|
||||
@ -428,6 +447,8 @@ struct ath10k {
|
||||
u32 survey_last_cycle_count;
|
||||
struct survey_info survey[ATH10K_NUM_CHANS];
|
||||
|
||||
struct dfs_pattern_detector *dfs_detector;
|
||||
|
||||
#ifdef CONFIG_ATH10K_DEBUGFS
|
||||
struct ath10k_debug debug;
|
||||
#endif
|
||||
|
@ -639,6 +639,86 @@ void ath10k_debug_stop(struct ath10k *ar)
|
||||
cancel_delayed_work(&ar->debug.htt_stats_dwork);
|
||||
}
|
||||
|
||||
static ssize_t ath10k_write_simulate_radar(struct file *file,
|
||||
const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath10k *ar = file->private_data;
|
||||
|
||||
ieee80211_radar_detected(ar->hw);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static const struct file_operations fops_simulate_radar = {
|
||||
.write = ath10k_write_simulate_radar,
|
||||
.open = simple_open,
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
#define ATH10K_DFS_STAT(s, p) (\
|
||||
len += scnprintf(buf + len, size - len, "%-28s : %10u\n", s, \
|
||||
ar->debug.dfs_stats.p))
|
||||
|
||||
#define ATH10K_DFS_POOL_STAT(s, p) (\
|
||||
len += scnprintf(buf + len, size - len, "%-28s : %10u\n", s, \
|
||||
ar->debug.dfs_pool_stats.p))
|
||||
|
||||
static ssize_t ath10k_read_dfs_stats(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
int retval = 0, len = 0;
|
||||
const int size = 8000;
|
||||
struct ath10k *ar = file->private_data;
|
||||
char *buf;
|
||||
|
||||
buf = kzalloc(size, GFP_KERNEL);
|
||||
if (buf == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
if (!ar->dfs_detector) {
|
||||
len += scnprintf(buf + len, size - len, "DFS not enabled\n");
|
||||
goto exit;
|
||||
}
|
||||
|
||||
ar->debug.dfs_pool_stats =
|
||||
ar->dfs_detector->get_stats(ar->dfs_detector);
|
||||
|
||||
len += scnprintf(buf + len, size - len, "Pulse detector statistics:\n");
|
||||
|
||||
ATH10K_DFS_STAT("reported phy errors", phy_errors);
|
||||
ATH10K_DFS_STAT("pulse events reported", pulses_total);
|
||||
ATH10K_DFS_STAT("DFS pulses detected", pulses_detected);
|
||||
ATH10K_DFS_STAT("DFS pulses discarded", pulses_discarded);
|
||||
ATH10K_DFS_STAT("Radars detected", radar_detected);
|
||||
|
||||
len += scnprintf(buf + len, size - len, "Global Pool statistics:\n");
|
||||
ATH10K_DFS_POOL_STAT("Pool references", pool_reference);
|
||||
ATH10K_DFS_POOL_STAT("Pulses allocated", pulse_allocated);
|
||||
ATH10K_DFS_POOL_STAT("Pulses alloc error", pulse_alloc_error);
|
||||
ATH10K_DFS_POOL_STAT("Pulses in use", pulse_used);
|
||||
ATH10K_DFS_POOL_STAT("Seqs. allocated", pseq_allocated);
|
||||
ATH10K_DFS_POOL_STAT("Seqs. alloc error", pseq_alloc_error);
|
||||
ATH10K_DFS_POOL_STAT("Seqs. in use", pseq_used);
|
||||
|
||||
exit:
|
||||
if (len > size)
|
||||
len = size;
|
||||
|
||||
retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
kfree(buf);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static const struct file_operations fops_dfs_stats = {
|
||||
.read = ath10k_read_dfs_stats,
|
||||
.open = simple_open,
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
int ath10k_debug_create(struct ath10k *ar)
|
||||
{
|
||||
ar->debug.debugfs_phy = debugfs_create_dir("ath10k",
|
||||
@ -667,6 +747,20 @@ int ath10k_debug_create(struct ath10k *ar)
|
||||
debugfs_create_file("htt_stats_mask", S_IRUSR, ar->debug.debugfs_phy,
|
||||
ar, &fops_htt_stats_mask);
|
||||
|
||||
if (config_enabled(CONFIG_ATH10K_DFS_CERTIFIED)) {
|
||||
debugfs_create_file("dfs_simulate_radar", S_IWUSR,
|
||||
ar->debug.debugfs_phy, ar,
|
||||
&fops_simulate_radar);
|
||||
|
||||
debugfs_create_bool("dfs_block_radar_events", S_IWUSR,
|
||||
ar->debug.debugfs_phy,
|
||||
&ar->dfs_block_radar_events);
|
||||
|
||||
debugfs_create_file("dfs_stats", S_IRUSR,
|
||||
ar->debug.debugfs_phy, ar,
|
||||
&fops_dfs_stats);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -33,6 +33,7 @@ enum ath10k_debug_mask {
|
||||
ATH10K_DBG_MGMT = 0x00000100,
|
||||
ATH10K_DBG_DATA = 0x00000200,
|
||||
ATH10K_DBG_BMI = 0x00000400,
|
||||
ATH10K_DBG_REGULATORY = 0x00000800,
|
||||
ATH10K_DBG_ANY = 0xffffffff,
|
||||
};
|
||||
|
||||
@ -53,6 +54,8 @@ void ath10k_debug_read_service_map(struct ath10k *ar,
|
||||
void ath10k_debug_read_target_stats(struct ath10k *ar,
|
||||
struct wmi_stats_event *ev);
|
||||
|
||||
#define ATH10K_DFS_STAT_INC(ar, c) (ar->debug.dfs_stats.c++)
|
||||
|
||||
#else
|
||||
static inline int ath10k_debug_start(struct ath10k *ar)
|
||||
{
|
||||
@ -82,6 +85,9 @@ static inline void ath10k_debug_read_target_stats(struct ath10k *ar,
|
||||
struct wmi_stats_event *ev)
|
||||
{
|
||||
}
|
||||
|
||||
#define ATH10K_DFS_STAT_INC(ar, c) do { } while (0)
|
||||
|
||||
#endif /* CONFIG_ATH10K_DEBUGFS */
|
||||
|
||||
#ifdef CONFIG_ATH10K_DEBUG
|
||||
|
@ -191,6 +191,11 @@ static int ath10k_htc_tx_completion_handler(struct ath10k *ar,
|
||||
struct ath10k_htc *htc = &ar->htc;
|
||||
struct ath10k_htc_ep *ep = &htc->endpoint[eid];
|
||||
|
||||
if (!skb) {
|
||||
ath10k_warn("invalid sk_buff completion - NULL pointer. firmware crashed?\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
ath10k_htc_notify_tx_completion(ep, skb);
|
||||
/* the skb now belongs to the completion handler */
|
||||
|
||||
@ -534,14 +539,6 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
u16 credit_count;
|
||||
u16 credit_size;
|
||||
|
||||
reinit_completion(&htc->ctl_resp);
|
||||
|
||||
status = ath10k_hif_start(htc->ar);
|
||||
if (status) {
|
||||
ath10k_err("could not start HIF (%d)\n", status);
|
||||
goto err_start;
|
||||
}
|
||||
|
||||
status = wait_for_completion_timeout(&htc->ctl_resp,
|
||||
ATH10K_HTC_WAIT_TIMEOUT_HZ);
|
||||
if (status <= 0) {
|
||||
@ -549,15 +546,13 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
status = -ETIMEDOUT;
|
||||
|
||||
ath10k_err("ctl_resp never came in (%d)\n", status);
|
||||
goto err_target;
|
||||
return status;
|
||||
}
|
||||
|
||||
if (htc->control_resp_len < sizeof(msg->hdr) + sizeof(msg->ready)) {
|
||||
ath10k_err("Invalid HTC ready msg len:%d\n",
|
||||
htc->control_resp_len);
|
||||
|
||||
status = -ECOMM;
|
||||
goto err_target;
|
||||
return -ECOMM;
|
||||
}
|
||||
|
||||
msg = (struct ath10k_htc_msg *)htc->control_resp_buffer;
|
||||
@ -567,8 +562,7 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
|
||||
if (message_id != ATH10K_HTC_MSG_READY_ID) {
|
||||
ath10k_err("Invalid HTC ready msg: 0x%x\n", message_id);
|
||||
status = -ECOMM;
|
||||
goto err_target;
|
||||
return -ECOMM;
|
||||
}
|
||||
|
||||
htc->total_transmit_credits = credit_count;
|
||||
@ -581,9 +575,8 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
|
||||
if ((htc->total_transmit_credits == 0) ||
|
||||
(htc->target_credit_size == 0)) {
|
||||
status = -ECOMM;
|
||||
ath10k_err("Invalid credit size received\n");
|
||||
goto err_target;
|
||||
return -ECOMM;
|
||||
}
|
||||
|
||||
ath10k_htc_setup_target_buffer_assignments(htc);
|
||||
@ -600,14 +593,10 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
status = ath10k_htc_connect_service(htc, &conn_req, &conn_resp);
|
||||
if (status) {
|
||||
ath10k_err("could not connect to htc service (%d)\n", status);
|
||||
goto err_target;
|
||||
return status;
|
||||
}
|
||||
|
||||
return 0;
|
||||
err_target:
|
||||
ath10k_hif_stop(htc->ar);
|
||||
err_start:
|
||||
return status;
|
||||
}
|
||||
|
||||
int ath10k_htc_connect_service(struct ath10k_htc *htc,
|
||||
|
@ -104,8 +104,8 @@ err_htc_attach:
|
||||
|
||||
static int ath10k_htt_verify_version(struct ath10k_htt *htt)
|
||||
{
|
||||
ath10k_info("htt target version %d.%d\n",
|
||||
htt->target_version_major, htt->target_version_minor);
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "htt target version %d.%d\n",
|
||||
htt->target_version_major, htt->target_version_minor);
|
||||
|
||||
if (htt->target_version_major != 2 &&
|
||||
htt->target_version_major != 3) {
|
||||
|
@ -1182,6 +1182,7 @@ struct htt_rx_info {
|
||||
u32 info2;
|
||||
} rate;
|
||||
bool fcs_err;
|
||||
bool amsdu_more;
|
||||
};
|
||||
|
||||
struct ath10k_htt {
|
||||
|
@ -659,23 +659,6 @@ static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
|
||||
memcpy(hdr_buf, hdr, hdr_len);
|
||||
hdr = (struct ieee80211_hdr *)hdr_buf;
|
||||
|
||||
/* FIXME: Hopefully this is a temporary measure.
|
||||
*
|
||||
* Reporting individual A-MSDU subframes means each reported frame
|
||||
* shares the same sequence number.
|
||||
*
|
||||
* mac80211 drops frames it recognizes as duplicates, i.e.
|
||||
* retransmission flag is set and sequence number matches sequence
|
||||
* number from a previous frame (as per IEEE 802.11-2012: 9.3.2.10
|
||||
* "Duplicate detection and recovery")
|
||||
*
|
||||
* To avoid frames being dropped clear retransmission flag for all
|
||||
* received A-MSDUs.
|
||||
*
|
||||
* Worst case: actual duplicate frames will be reported but this should
|
||||
* still be handled gracefully by other OSI/ISO layers. */
|
||||
hdr->frame_control &= cpu_to_le16(~IEEE80211_FCTL_RETRY);
|
||||
|
||||
first = skb;
|
||||
while (skb) {
|
||||
void *decap_hdr;
|
||||
@ -746,6 +729,9 @@ static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
|
||||
skb = skb->next;
|
||||
info->skb->next = NULL;
|
||||
|
||||
if (skb)
|
||||
info->amsdu_more = true;
|
||||
|
||||
ath10k_process_rx(htt->ar, info);
|
||||
}
|
||||
|
||||
@ -959,6 +945,11 @@ static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
|
||||
continue;
|
||||
}
|
||||
|
||||
if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
|
||||
ath10k_htt_rx_free_msdu_chain(msdu_head);
|
||||
continue;
|
||||
}
|
||||
|
||||
/* FIXME: we do not support chaining yet.
|
||||
* this needs investigation */
|
||||
if (msdu_chaining) {
|
||||
|
@ -85,16 +85,13 @@ void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
|
||||
|
||||
int ath10k_htt_tx_attach(struct ath10k_htt *htt)
|
||||
{
|
||||
u8 pipe;
|
||||
|
||||
spin_lock_init(&htt->tx_lock);
|
||||
init_waitqueue_head(&htt->empty_tx_wq);
|
||||
|
||||
/* At the beginning free queue number should hint us the maximum
|
||||
* queue length */
|
||||
pipe = htt->ar->htc.endpoint[htt->eid].ul_pipe_id;
|
||||
htt->max_num_pending_tx = ath10k_hif_get_free_queue_number(htt->ar,
|
||||
pipe);
|
||||
if (test_bit(ATH10K_FW_FEATURE_WMI_10X, htt->ar->fw_features))
|
||||
htt->max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
|
||||
else
|
||||
htt->max_num_pending_tx = TARGET_NUM_MSDU_DESC;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
|
||||
htt->max_num_pending_tx);
|
||||
|
@ -269,6 +269,7 @@ enum ath10k_mcast2ucast_mode {
|
||||
#define CORE_CTRL_CPU_INTR_MASK 0x00002000
|
||||
#define CORE_CTRL_ADDRESS 0x0000
|
||||
#define PCIE_INTR_ENABLE_ADDRESS 0x0008
|
||||
#define PCIE_INTR_CAUSE_ADDRESS 0x000c
|
||||
#define PCIE_INTR_CLR_ADDRESS 0x0014
|
||||
#define SCRATCH_3_ADDRESS 0x0030
|
||||
|
||||
|
@ -322,12 +322,16 @@ static int ath10k_peer_create(struct ath10k *ar, u32 vdev_id, const u8 *addr)
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
ret = ath10k_wmi_peer_create(ar, vdev_id, addr);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
ath10k_warn("Failed to create wmi peer: %i\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath10k_wait_for_peer_created(ar, vdev_id, addr);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
ath10k_warn("Failed to wait for created wmi peer: %i\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -450,15 +454,19 @@ static int ath10k_vdev_start(struct ath10k_vif *arvif)
|
||||
|
||||
arg.channel.mode = chan_to_phymode(&conf->chandef);
|
||||
|
||||
arg.channel.min_power = channel->max_power * 3;
|
||||
arg.channel.max_power = channel->max_power * 4;
|
||||
arg.channel.max_reg_power = channel->max_reg_power * 4;
|
||||
arg.channel.max_antenna_gain = channel->max_antenna_gain;
|
||||
arg.channel.min_power = 0;
|
||||
arg.channel.max_power = channel->max_power * 2;
|
||||
arg.channel.max_reg_power = channel->max_reg_power * 2;
|
||||
arg.channel.max_antenna_gain = channel->max_antenna_gain * 2;
|
||||
|
||||
if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
|
||||
arg.ssid = arvif->u.ap.ssid;
|
||||
arg.ssid_len = arvif->u.ap.ssid_len;
|
||||
arg.hidden_ssid = arvif->u.ap.hidden_ssid;
|
||||
|
||||
/* For now allow DFS for AP mode */
|
||||
arg.channel.chan_radar =
|
||||
!!(channel->flags & IEEE80211_CHAN_RADAR);
|
||||
} else if (arvif->vdev_type == WMI_VDEV_TYPE_IBSS) {
|
||||
arg.ssid = arvif->vif->bss_conf.ssid;
|
||||
arg.ssid_len = arvif->vif->bss_conf.ssid_len;
|
||||
@ -516,6 +524,11 @@ static int ath10k_monitor_start(struct ath10k *ar, int vdev_id)
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
if (!ar->monitor_present) {
|
||||
ath10k_warn("mac montor stop -- monitor is not present\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
arg.vdev_id = vdev_id;
|
||||
arg.channel.freq = channel->center_freq;
|
||||
arg.channel.band_center_freq1 = ar->hw->conf.chandef.center_freq1;
|
||||
@ -523,11 +536,13 @@ static int ath10k_monitor_start(struct ath10k *ar, int vdev_id)
|
||||
/* TODO setup this dynamically, what in case we
|
||||
don't have any vifs? */
|
||||
arg.channel.mode = chan_to_phymode(&ar->hw->conf.chandef);
|
||||
arg.channel.chan_radar =
|
||||
!!(channel->flags & IEEE80211_CHAN_RADAR);
|
||||
|
||||
arg.channel.min_power = channel->max_power * 3;
|
||||
arg.channel.max_power = channel->max_power * 4;
|
||||
arg.channel.max_reg_power = channel->max_reg_power * 4;
|
||||
arg.channel.max_antenna_gain = channel->max_antenna_gain;
|
||||
arg.channel.min_power = 0;
|
||||
arg.channel.max_power = channel->max_power * 2;
|
||||
arg.channel.max_reg_power = channel->max_reg_power * 2;
|
||||
arg.channel.max_antenna_gain = channel->max_antenna_gain * 2;
|
||||
|
||||
ret = ath10k_wmi_vdev_start(ar, &arg);
|
||||
if (ret) {
|
||||
@ -566,6 +581,16 @@ static int ath10k_monitor_stop(struct ath10k *ar)
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
if (!ar->monitor_present) {
|
||||
ath10k_warn("mac montor stop -- monitor is not present\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!ar->monitor_enabled) {
|
||||
ath10k_warn("mac montor stop -- monitor is not enabled\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = ath10k_wmi_vdev_down(ar, ar->monitor_vdev_id);
|
||||
if (ret)
|
||||
ath10k_warn("Monitor vdev down failed: %d\n", ret);
|
||||
@ -647,6 +672,107 @@ static int ath10k_monitor_destroy(struct ath10k *ar)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath10k_start_cac(struct ath10k *ar)
|
||||
{
|
||||
int ret;
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
set_bit(ATH10K_CAC_RUNNING, &ar->dev_flags);
|
||||
|
||||
ret = ath10k_monitor_create(ar);
|
||||
if (ret) {
|
||||
clear_bit(ATH10K_CAC_RUNNING, &ar->dev_flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath10k_monitor_start(ar, ar->monitor_vdev_id);
|
||||
if (ret) {
|
||||
clear_bit(ATH10K_CAC_RUNNING, &ar->dev_flags);
|
||||
ath10k_monitor_destroy(ar);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_MAC, "mac cac start monitor vdev %d\n",
|
||||
ar->monitor_vdev_id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath10k_stop_cac(struct ath10k *ar)
|
||||
{
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
/* CAC is not running - do nothing */
|
||||
if (!test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags))
|
||||
return 0;
|
||||
|
||||
ath10k_monitor_stop(ar);
|
||||
ath10k_monitor_destroy(ar);
|
||||
clear_bit(ATH10K_CAC_RUNNING, &ar->dev_flags);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_MAC, "mac cac finished\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const char *ath10k_dfs_state(enum nl80211_dfs_state dfs_state)
|
||||
{
|
||||
switch (dfs_state) {
|
||||
case NL80211_DFS_USABLE:
|
||||
return "USABLE";
|
||||
case NL80211_DFS_UNAVAILABLE:
|
||||
return "UNAVAILABLE";
|
||||
case NL80211_DFS_AVAILABLE:
|
||||
return "AVAILABLE";
|
||||
default:
|
||||
WARN_ON(1);
|
||||
return "bug";
|
||||
}
|
||||
}
|
||||
|
||||
static void ath10k_config_radar_detection(struct ath10k *ar)
|
||||
{
|
||||
struct ieee80211_channel *chan = ar->hw->conf.chandef.chan;
|
||||
bool radar = ar->hw->conf.radar_enabled;
|
||||
bool chan_radar = !!(chan->flags & IEEE80211_CHAN_RADAR);
|
||||
enum nl80211_dfs_state dfs_state = chan->dfs_state;
|
||||
int ret;
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_MAC,
|
||||
"mac radar config update: chan %dMHz radar %d chan radar %d chan state %s\n",
|
||||
chan->center_freq, radar, chan_radar,
|
||||
ath10k_dfs_state(dfs_state));
|
||||
|
||||
/*
|
||||
* It's safe to call it even if CAC is not started.
|
||||
* This call here guarantees changing channel, etc. will stop CAC.
|
||||
*/
|
||||
ath10k_stop_cac(ar);
|
||||
|
||||
if (!radar)
|
||||
return;
|
||||
|
||||
if (!chan_radar)
|
||||
return;
|
||||
|
||||
if (dfs_state != NL80211_DFS_USABLE)
|
||||
return;
|
||||
|
||||
ret = ath10k_start_cac(ar);
|
||||
if (ret) {
|
||||
/*
|
||||
* Not possible to start CAC on current channel so starting
|
||||
* radiation is not allowed, make this channel DFS_UNAVAILABLE
|
||||
* by indicating that radar was detected.
|
||||
*/
|
||||
ath10k_warn("failed to start CAC (%d)\n", ret);
|
||||
ieee80211_radar_detected(ar->hw);
|
||||
}
|
||||
}
|
||||
|
||||
static void ath10k_control_beaconing(struct ath10k_vif *arvif,
|
||||
struct ieee80211_bss_conf *info)
|
||||
{
|
||||
@ -1356,14 +1482,17 @@ static int ath10k_update_channel_list(struct ath10k *ar)
|
||||
ch->ht40plus =
|
||||
!(channel->flags & IEEE80211_CHAN_NO_HT40PLUS);
|
||||
|
||||
ch->chan_radar =
|
||||
!!(channel->flags & IEEE80211_CHAN_RADAR);
|
||||
|
||||
passive = channel->flags & IEEE80211_CHAN_NO_IR;
|
||||
ch->passive = passive;
|
||||
|
||||
ch->freq = channel->center_freq;
|
||||
ch->min_power = channel->max_power * 3;
|
||||
ch->max_power = channel->max_power * 4;
|
||||
ch->max_reg_power = channel->max_reg_power * 4;
|
||||
ch->max_antenna_gain = channel->max_antenna_gain;
|
||||
ch->min_power = 0;
|
||||
ch->max_power = channel->max_power * 2;
|
||||
ch->max_reg_power = channel->max_reg_power * 2;
|
||||
ch->max_antenna_gain = channel->max_antenna_gain * 2;
|
||||
ch->reg_class_id = 0; /* FIXME */
|
||||
|
||||
/* FIXME: why use only legacy modes, why not any
|
||||
@ -1423,9 +1552,20 @@ static void ath10k_reg_notifier(struct wiphy *wiphy,
|
||||
{
|
||||
struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
|
||||
struct ath10k *ar = hw->priv;
|
||||
bool result;
|
||||
|
||||
ath_reg_notifier_apply(wiphy, request, &ar->ath_common.regulatory);
|
||||
|
||||
if (config_enabled(CONFIG_ATH10K_DFS_CERTIFIED) && ar->dfs_detector) {
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs region 0x%x\n",
|
||||
request->dfs_region);
|
||||
result = ar->dfs_detector->set_dfs_domain(ar->dfs_detector,
|
||||
request->dfs_region);
|
||||
if (!result)
|
||||
ath10k_warn("dfs region 0x%X not supported, will trigger radar for every pulse\n",
|
||||
request->dfs_region);
|
||||
}
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
if (ar->state == ATH10K_STATE_ON)
|
||||
ath10k_regd_update(ar);
|
||||
@ -1714,8 +1854,10 @@ void ath10k_mgmt_over_wmi_tx_work(struct work_struct *work)
|
||||
break;
|
||||
|
||||
ret = ath10k_wmi_mgmt_tx(ar, skb);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
ath10k_warn("wmi mgmt_tx failed (%d)\n", ret);
|
||||
ieee80211_free_txskb(ar->hw, skb);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1889,6 +2031,7 @@ void ath10k_halt(struct ath10k *ar)
|
||||
{
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
ath10k_stop_cac(ar);
|
||||
del_timer_sync(&ar->scan.timeout);
|
||||
ath10k_offchan_tx_purge(ar);
|
||||
ath10k_mgmt_over_wmi_tx_purge(ar);
|
||||
@ -1943,7 +2086,7 @@ static int ath10k_start(struct ieee80211_hw *hw)
|
||||
ath10k_warn("could not enable WMI_PDEV_PARAM_PMF_QOS (%d)\n",
|
||||
ret);
|
||||
|
||||
ret = ath10k_wmi_pdev_set_param(ar, ar->wmi.pdev_param->dynamic_bw, 0);
|
||||
ret = ath10k_wmi_pdev_set_param(ar, ar->wmi.pdev_param->dynamic_bw, 1);
|
||||
if (ret)
|
||||
ath10k_warn("could not init WMI_PDEV_PARAM_DYNAMIC_BW (%d)\n",
|
||||
ret);
|
||||
@ -1998,15 +2141,40 @@ static int ath10k_config(struct ieee80211_hw *hw, u32 changed)
|
||||
struct ath10k *ar = hw->priv;
|
||||
struct ieee80211_conf *conf = &hw->conf;
|
||||
int ret = 0;
|
||||
u32 param;
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
|
||||
if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
|
||||
ath10k_dbg(ATH10K_DBG_MAC, "mac config channel %d mhz\n",
|
||||
conf->chandef.chan->center_freq);
|
||||
ath10k_dbg(ATH10K_DBG_MAC,
|
||||
"mac config channel %d mhz flags 0x%x\n",
|
||||
conf->chandef.chan->center_freq,
|
||||
conf->chandef.chan->flags);
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
ar->rx_channel = conf->chandef.chan;
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
ath10k_config_radar_detection(ar);
|
||||
}
|
||||
|
||||
if (changed & IEEE80211_CONF_CHANGE_POWER) {
|
||||
ath10k_dbg(ATH10K_DBG_MAC, "mac config power %d\n",
|
||||
hw->conf.power_level);
|
||||
|
||||
param = ar->wmi.pdev_param->txpower_limit2g;
|
||||
ret = ath10k_wmi_pdev_set_param(ar, param,
|
||||
hw->conf.power_level * 2);
|
||||
if (ret)
|
||||
ath10k_warn("mac failed to set 2g txpower %d (%d)\n",
|
||||
hw->conf.power_level, ret);
|
||||
|
||||
param = ar->wmi.pdev_param->txpower_limit5g;
|
||||
ret = ath10k_wmi_pdev_set_param(ar, param,
|
||||
hw->conf.power_level * 2);
|
||||
if (ret)
|
||||
ath10k_warn("mac failed to set 5g txpower %d (%d)\n",
|
||||
hw->conf.power_level, ret);
|
||||
}
|
||||
|
||||
if (changed & IEEE80211_CONF_CHANGE_PS)
|
||||
@ -2049,6 +2217,7 @@ static int ath10k_add_interface(struct ieee80211_hw *hw,
|
||||
arvif->vif = vif;
|
||||
|
||||
INIT_WORK(&arvif->wep_key_work, ath10k_tx_wep_key_work);
|
||||
INIT_LIST_HEAD(&arvif->list);
|
||||
|
||||
if ((vif->type == NL80211_IFTYPE_MONITOR) && ar->monitor_present) {
|
||||
ath10k_warn("Only one monitor interface allowed\n");
|
||||
@ -2265,8 +2434,14 @@ static void ath10k_configure_filter(struct ieee80211_hw *hw,
|
||||
*total_flags &= SUPPORTED_FILTERS;
|
||||
ar->filter_flags = *total_flags;
|
||||
|
||||
/* Monitor must not be started if it wasn't created first.
|
||||
* Promiscuous mode may be started on a non-monitor interface - in
|
||||
* such case the monitor vdev is not created so starting the
|
||||
* monitor makes no sense. Since ath10k uses no special RX filters
|
||||
* (only BSS filter in STA mode) there's no need for any special
|
||||
* action here. */
|
||||
if ((ar->filter_flags & FIF_PROMISC_IN_BSS) &&
|
||||
!ar->monitor_enabled) {
|
||||
!ar->monitor_enabled && ar->monitor_present) {
|
||||
ath10k_dbg(ATH10K_DBG_MAC, "mac monitor %d start\n",
|
||||
ar->monitor_vdev_id);
|
||||
|
||||
@ -2274,7 +2449,7 @@ static void ath10k_configure_filter(struct ieee80211_hw *hw,
|
||||
if (ret)
|
||||
ath10k_warn("Unable to start monitor mode\n");
|
||||
} else if (!(ar->filter_flags & FIF_PROMISC_IN_BSS) &&
|
||||
ar->monitor_enabled) {
|
||||
ar->monitor_enabled && ar->monitor_present) {
|
||||
ath10k_dbg(ATH10K_DBG_MAC, "mac monitor %d stop\n",
|
||||
ar->monitor_vdev_id);
|
||||
|
||||
@ -2360,8 +2535,8 @@ static void ath10k_bss_info_changed(struct ieee80211_hw *hw,
|
||||
ret = ath10k_peer_create(ar, arvif->vdev_id,
|
||||
info->bssid);
|
||||
if (ret)
|
||||
ath10k_warn("Failed to add peer: %pM for VDEV: %d\n",
|
||||
info->bssid, arvif->vdev_id);
|
||||
ath10k_warn("Failed to add peer %pM for vdev %d when changin bssid: %i\n",
|
||||
info->bssid, arvif->vdev_id, ret);
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_STATION) {
|
||||
/*
|
||||
@ -2542,6 +2717,44 @@ static void ath10k_cancel_hw_scan(struct ieee80211_hw *hw,
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
}
|
||||
|
||||
static void ath10k_set_key_h_def_keyidx(struct ath10k *ar,
|
||||
struct ath10k_vif *arvif,
|
||||
enum set_key_cmd cmd,
|
||||
struct ieee80211_key_conf *key)
|
||||
{
|
||||
u32 vdev_param = arvif->ar->wmi.vdev_param->def_keyid;
|
||||
int ret;
|
||||
|
||||
/* 10.1 firmware branch requires default key index to be set to group
|
||||
* key index after installing it. Otherwise FW/HW Txes corrupted
|
||||
* frames with multi-vif APs. This is not required for main firmware
|
||||
* branch (e.g. 636).
|
||||
*
|
||||
* FIXME: This has been tested only in AP. It remains unknown if this
|
||||
* is required for multi-vif STA interfaces on 10.1 */
|
||||
|
||||
if (arvif->vdev_type != WMI_VDEV_TYPE_AP)
|
||||
return;
|
||||
|
||||
if (key->cipher == WLAN_CIPHER_SUITE_WEP40)
|
||||
return;
|
||||
|
||||
if (key->cipher == WLAN_CIPHER_SUITE_WEP104)
|
||||
return;
|
||||
|
||||
if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
|
||||
return;
|
||||
|
||||
if (cmd != SET_KEY)
|
||||
return;
|
||||
|
||||
ret = ath10k_wmi_vdev_set_param(ar, arvif->vdev_id, vdev_param,
|
||||
key->keyidx);
|
||||
if (ret)
|
||||
ath10k_warn("failed to set group key as default key: %d\n",
|
||||
ret);
|
||||
}
|
||||
|
||||
static int ath10k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
||||
struct ieee80211_vif *vif, struct ieee80211_sta *sta,
|
||||
struct ieee80211_key_conf *key)
|
||||
@ -2603,6 +2816,8 @@ static int ath10k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
||||
goto exit;
|
||||
}
|
||||
|
||||
ath10k_set_key_h_def_keyidx(ar, arvif, cmd, key);
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
peer = ath10k_peer_find(ar, arvif->vdev_id, peer_addr);
|
||||
if (peer && cmd == SET_KEY)
|
||||
@ -2643,8 +2858,8 @@ static int ath10k_sta_state(struct ieee80211_hw *hw,
|
||||
|
||||
ret = ath10k_peer_create(ar, arvif->vdev_id, sta->addr);
|
||||
if (ret)
|
||||
ath10k_warn("Failed to add peer: %pM for VDEV: %d\n",
|
||||
sta->addr, arvif->vdev_id);
|
||||
ath10k_warn("Failed to add peer %pM for vdev %d when adding a new sta: %i\n",
|
||||
sta->addr, arvif->vdev_id, ret);
|
||||
} else if ((old_state == IEEE80211_STA_NONE &&
|
||||
new_state == IEEE80211_STA_NOTEXIST)) {
|
||||
/*
|
||||
@ -3249,12 +3464,36 @@ static const struct ieee80211_iface_limit ath10k_if_limits[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static const struct ieee80211_iface_combination ath10k_if_comb = {
|
||||
.limits = ath10k_if_limits,
|
||||
.n_limits = ARRAY_SIZE(ath10k_if_limits),
|
||||
.max_interfaces = 8,
|
||||
.num_different_channels = 1,
|
||||
.beacon_int_infra_match = true,
|
||||
#ifdef CONFIG_ATH10K_DFS_CERTIFIED
|
||||
static const struct ieee80211_iface_limit ath10k_if_dfs_limits[] = {
|
||||
{
|
||||
.max = 8,
|
||||
.types = BIT(NL80211_IFTYPE_AP)
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
static const struct ieee80211_iface_combination ath10k_if_comb[] = {
|
||||
{
|
||||
.limits = ath10k_if_limits,
|
||||
.n_limits = ARRAY_SIZE(ath10k_if_limits),
|
||||
.max_interfaces = 8,
|
||||
.num_different_channels = 1,
|
||||
.beacon_int_infra_match = true,
|
||||
},
|
||||
#ifdef CONFIG_ATH10K_DFS_CERTIFIED
|
||||
{
|
||||
.limits = ath10k_if_dfs_limits,
|
||||
.n_limits = ARRAY_SIZE(ath10k_if_dfs_limits),
|
||||
.max_interfaces = 8,
|
||||
.num_different_channels = 1,
|
||||
.beacon_int_infra_match = true,
|
||||
.radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
|
||||
BIT(NL80211_CHAN_WIDTH_20) |
|
||||
BIT(NL80211_CHAN_WIDTH_40) |
|
||||
BIT(NL80211_CHAN_WIDTH_80),
|
||||
}
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct ieee80211_sta_vht_cap ath10k_create_vht_cap(struct ath10k *ar)
|
||||
@ -3478,11 +3717,21 @@ int ath10k_mac_register(struct ath10k *ar)
|
||||
*/
|
||||
ar->hw->queues = 4;
|
||||
|
||||
ar->hw->wiphy->iface_combinations = &ath10k_if_comb;
|
||||
ar->hw->wiphy->n_iface_combinations = 1;
|
||||
ar->hw->wiphy->iface_combinations = ath10k_if_comb;
|
||||
ar->hw->wiphy->n_iface_combinations = ARRAY_SIZE(ath10k_if_comb);
|
||||
|
||||
ar->hw->netdev_features = NETIF_F_HW_CSUM;
|
||||
|
||||
if (config_enabled(CONFIG_ATH10K_DFS_CERTIFIED)) {
|
||||
/* Init ath dfs pattern detector */
|
||||
ar->ath_common.debug_mask = ATH_DBG_DFS;
|
||||
ar->dfs_detector = dfs_pattern_detector_init(&ar->ath_common,
|
||||
NL80211_DFS_UNSET);
|
||||
|
||||
if (!ar->dfs_detector)
|
||||
ath10k_warn("dfs pattern detector init failed\n");
|
||||
}
|
||||
|
||||
ret = ath_regd_init(&ar->ath_common.regulatory, ar->hw->wiphy,
|
||||
ath10k_reg_notifier);
|
||||
if (ret) {
|
||||
@ -3518,6 +3767,9 @@ void ath10k_mac_unregister(struct ath10k *ar)
|
||||
{
|
||||
ieee80211_unregister_hw(ar->hw);
|
||||
|
||||
if (config_enabled(CONFIG_ATH10K_DFS_CERTIFIED) && ar->dfs_detector)
|
||||
ar->dfs_detector->exit(ar->dfs_detector);
|
||||
|
||||
kfree(ar->mac.sbands[IEEE80211_BAND_2GHZ].channels);
|
||||
kfree(ar->mac.sbands[IEEE80211_BAND_5GHZ].channels);
|
||||
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -198,9 +198,7 @@ struct ath10k_pci {
|
||||
|
||||
struct tasklet_struct intr_tq;
|
||||
struct tasklet_struct msi_fw_err;
|
||||
|
||||
/* Number of Copy Engines supported */
|
||||
unsigned int ce_count;
|
||||
struct tasklet_struct early_irq_tasklet;
|
||||
|
||||
int started;
|
||||
|
||||
@ -318,6 +316,16 @@ static inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset)
|
||||
return ioread32(ar_pci->mem + offset);
|
||||
}
|
||||
|
||||
static inline u32 ath10k_pci_soc_read32(struct ath10k *ar, u32 addr)
|
||||
{
|
||||
return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr);
|
||||
}
|
||||
|
||||
static inline void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val)
|
||||
{
|
||||
ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val);
|
||||
}
|
||||
|
||||
int ath10k_do_pci_wake(struct ath10k *ar);
|
||||
void ath10k_do_pci_sleep(struct ath10k *ar);
|
||||
|
||||
|
@ -75,6 +75,7 @@ void ath10k_txrx_tx_unref(struct ath10k_htt *htt,
|
||||
ath10k_report_offchan_tx(htt->ar, msdu);
|
||||
|
||||
info = IEEE80211_SKB_CB(msdu);
|
||||
memset(&info->status, 0, sizeof(info->status));
|
||||
|
||||
if (tx_done->discard) {
|
||||
ieee80211_free_txskb(htt->ar->hw, msdu);
|
||||
@ -183,7 +184,7 @@ static void process_rx_rates(struct ath10k *ar, struct htt_rx_info *info,
|
||||
/* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
|
||||
TODO check this */
|
||||
mcs = (info2 >> 4) & 0x0F;
|
||||
nss = (info1 >> 10) & 0x07;
|
||||
nss = ((info1 >> 10) & 0x07) + 1;
|
||||
bw = info1 & 3;
|
||||
sgi = info2 & 1;
|
||||
|
||||
@ -236,6 +237,9 @@ void ath10k_process_rx(struct ath10k *ar, struct htt_rx_info *info)
|
||||
if (info->fcs_err)
|
||||
status->flag |= RX_FLAG_FAILED_FCS_CRC;
|
||||
|
||||
if (info->amsdu_more)
|
||||
status->flag |= RX_FLAG_AMSDU_MORE;
|
||||
|
||||
status->signal = info->signal;
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
|
@ -674,10 +674,8 @@ int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
|
||||
|
||||
/* Send the management frame buffer to the target */
|
||||
ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
|
||||
if (ret) {
|
||||
dev_kfree_skb_any(skb);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* TODO: report tx status to mac80211 - temporary just ACK */
|
||||
info->flags |= IEEE80211_TX_STAT_ACK;
|
||||
@ -909,6 +907,11 @@ static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
|
||||
ath10k_dbg(ATH10K_DBG_MGMT,
|
||||
"event mgmt rx status %08x\n", rx_status);
|
||||
|
||||
if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
|
||||
dev_kfree_skb(skb);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
|
||||
dev_kfree_skb(skb);
|
||||
return 0;
|
||||
@ -1383,9 +1386,259 @@ static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
|
||||
ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
|
||||
}
|
||||
|
||||
static void ath10k_dfs_radar_report(struct ath10k *ar,
|
||||
struct wmi_single_phyerr_rx_event *event,
|
||||
struct phyerr_radar_report *rr,
|
||||
u64 tsf)
|
||||
{
|
||||
u32 reg0, reg1, tsf32l;
|
||||
struct pulse_event pe;
|
||||
u64 tsf64;
|
||||
u8 rssi, width;
|
||||
|
||||
reg0 = __le32_to_cpu(rr->reg0);
|
||||
reg1 = __le32_to_cpu(rr->reg1);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY,
|
||||
"wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
|
||||
MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
|
||||
MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
|
||||
MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
|
||||
MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY,
|
||||
"wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
|
||||
MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
|
||||
MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
|
||||
MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
|
||||
MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
|
||||
MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY,
|
||||
"wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
|
||||
MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
|
||||
MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
|
||||
|
||||
if (!ar->dfs_detector)
|
||||
return;
|
||||
|
||||
/* report event to DFS pattern detector */
|
||||
tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
|
||||
tsf64 = tsf & (~0xFFFFFFFFULL);
|
||||
tsf64 |= tsf32l;
|
||||
|
||||
width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
|
||||
rssi = event->hdr.rssi_combined;
|
||||
|
||||
/* hardware store this as 8 bit signed value,
|
||||
* set to zero if negative number
|
||||
*/
|
||||
if (rssi & 0x80)
|
||||
rssi = 0;
|
||||
|
||||
pe.ts = tsf64;
|
||||
pe.freq = ar->hw->conf.chandef.chan->center_freq;
|
||||
pe.width = width;
|
||||
pe.rssi = rssi;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY,
|
||||
"dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
|
||||
pe.freq, pe.width, pe.rssi, pe.ts);
|
||||
|
||||
ATH10K_DFS_STAT_INC(ar, pulses_detected);
|
||||
|
||||
if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY,
|
||||
"dfs no pulse pattern detected, yet\n");
|
||||
return;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs radar detected\n");
|
||||
ATH10K_DFS_STAT_INC(ar, radar_detected);
|
||||
|
||||
/* Control radar events reporting in debugfs file
|
||||
dfs_block_radar_events */
|
||||
if (ar->dfs_block_radar_events) {
|
||||
ath10k_info("DFS Radar detected, but ignored as requested\n");
|
||||
return;
|
||||
}
|
||||
|
||||
ieee80211_radar_detected(ar->hw);
|
||||
}
|
||||
|
||||
static int ath10k_dfs_fft_report(struct ath10k *ar,
|
||||
struct wmi_single_phyerr_rx_event *event,
|
||||
struct phyerr_fft_report *fftr,
|
||||
u64 tsf)
|
||||
{
|
||||
u32 reg0, reg1;
|
||||
u8 rssi, peak_mag;
|
||||
|
||||
reg0 = __le32_to_cpu(fftr->reg0);
|
||||
reg1 = __le32_to_cpu(fftr->reg1);
|
||||
rssi = event->hdr.rssi_combined;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY,
|
||||
"wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
|
||||
MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
|
||||
MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
|
||||
MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
|
||||
MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY,
|
||||
"wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
|
||||
MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
|
||||
MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
|
||||
MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
|
||||
MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
|
||||
|
||||
peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
|
||||
|
||||
/* false event detection */
|
||||
if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
|
||||
peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
|
||||
ATH10K_DFS_STAT_INC(ar, pulses_discarded);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ath10k_wmi_event_dfs(struct ath10k *ar,
|
||||
struct wmi_single_phyerr_rx_event *event,
|
||||
u64 tsf)
|
||||
{
|
||||
int buf_len, tlv_len, res, i = 0;
|
||||
struct phyerr_tlv *tlv;
|
||||
struct phyerr_radar_report *rr;
|
||||
struct phyerr_fft_report *fftr;
|
||||
u8 *tlv_buf;
|
||||
|
||||
buf_len = __le32_to_cpu(event->hdr.buf_len);
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY,
|
||||
"wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
|
||||
event->hdr.phy_err_code, event->hdr.rssi_combined,
|
||||
__le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
|
||||
|
||||
/* Skip event if DFS disabled */
|
||||
if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
|
||||
return;
|
||||
|
||||
ATH10K_DFS_STAT_INC(ar, pulses_total);
|
||||
|
||||
while (i < buf_len) {
|
||||
if (i + sizeof(*tlv) > buf_len) {
|
||||
ath10k_warn("too short buf for tlv header (%d)\n", i);
|
||||
return;
|
||||
}
|
||||
|
||||
tlv = (struct phyerr_tlv *)&event->bufp[i];
|
||||
tlv_len = __le16_to_cpu(tlv->len);
|
||||
tlv_buf = &event->bufp[i + sizeof(*tlv)];
|
||||
ath10k_dbg(ATH10K_DBG_REGULATORY,
|
||||
"wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
|
||||
tlv_len, tlv->tag, tlv->sig);
|
||||
|
||||
switch (tlv->tag) {
|
||||
case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
|
||||
if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
|
||||
ath10k_warn("too short radar pulse summary (%d)\n",
|
||||
i);
|
||||
return;
|
||||
}
|
||||
|
||||
rr = (struct phyerr_radar_report *)tlv_buf;
|
||||
ath10k_dfs_radar_report(ar, event, rr, tsf);
|
||||
break;
|
||||
case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
|
||||
if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
|
||||
ath10k_warn("too short fft report (%d)\n", i);
|
||||
return;
|
||||
}
|
||||
|
||||
fftr = (struct phyerr_fft_report *)tlv_buf;
|
||||
res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
|
||||
if (res)
|
||||
return;
|
||||
break;
|
||||
}
|
||||
|
||||
i += sizeof(*tlv) + tlv_len;
|
||||
}
|
||||
}
|
||||
|
||||
static void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
|
||||
struct wmi_single_phyerr_rx_event *event,
|
||||
u64 tsf)
|
||||
{
|
||||
ath10k_dbg(ATH10K_DBG_WMI, "wmi event spectral scan\n");
|
||||
}
|
||||
|
||||
static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
|
||||
{
|
||||
ath10k_dbg(ATH10K_DBG_WMI, "WMI_PHYERR_EVENTID\n");
|
||||
struct wmi_comb_phyerr_rx_event *comb_event;
|
||||
struct wmi_single_phyerr_rx_event *event;
|
||||
u32 count, i, buf_len, phy_err_code;
|
||||
u64 tsf;
|
||||
int left_len = skb->len;
|
||||
|
||||
ATH10K_DFS_STAT_INC(ar, phy_errors);
|
||||
|
||||
/* Check if combined event available */
|
||||
if (left_len < sizeof(*comb_event)) {
|
||||
ath10k_warn("wmi phyerr combined event wrong len\n");
|
||||
return;
|
||||
}
|
||||
|
||||
left_len -= sizeof(*comb_event);
|
||||
|
||||
/* Check number of included events */
|
||||
comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
|
||||
count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
|
||||
|
||||
tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
|
||||
tsf <<= 32;
|
||||
tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_WMI,
|
||||
"wmi event phyerr count %d tsf64 0x%llX\n",
|
||||
count, tsf);
|
||||
|
||||
event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
|
||||
for (i = 0; i < count; i++) {
|
||||
/* Check if we can read event header */
|
||||
if (left_len < sizeof(*event)) {
|
||||
ath10k_warn("single event (%d) wrong head len\n", i);
|
||||
return;
|
||||
}
|
||||
|
||||
left_len -= sizeof(*event);
|
||||
|
||||
buf_len = __le32_to_cpu(event->hdr.buf_len);
|
||||
phy_err_code = event->hdr.phy_err_code;
|
||||
|
||||
if (left_len < buf_len) {
|
||||
ath10k_warn("single event (%d) wrong buf len\n", i);
|
||||
return;
|
||||
}
|
||||
|
||||
left_len -= buf_len;
|
||||
|
||||
switch (phy_err_code) {
|
||||
case PHY_ERROR_RADAR:
|
||||
ath10k_wmi_event_dfs(ar, event, tsf);
|
||||
break;
|
||||
case PHY_ERROR_SPECTRAL_SCAN:
|
||||
ath10k_wmi_event_spectral_scan(ar, event, tsf);
|
||||
break;
|
||||
case PHY_ERROR_FALSE_RADAR_EXT:
|
||||
ath10k_wmi_event_dfs(ar, event, tsf);
|
||||
ath10k_wmi_event_spectral_scan(ar, event, tsf);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
event += sizeof(*event) + buf_len;
|
||||
}
|
||||
}
|
||||
|
||||
static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
|
||||
@ -2062,6 +2315,7 @@ int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
|
||||
{
|
||||
struct wmi_set_channel_cmd *cmd;
|
||||
struct sk_buff *skb;
|
||||
u32 ch_flags = 0;
|
||||
|
||||
if (arg->passive)
|
||||
return -EINVAL;
|
||||
@ -2070,10 +2324,14 @@ int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
if (arg->chan_radar)
|
||||
ch_flags |= WMI_CHAN_FLAG_DFS;
|
||||
|
||||
cmd = (struct wmi_set_channel_cmd *)skb->data;
|
||||
cmd->chan.mhz = __cpu_to_le32(arg->freq);
|
||||
cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
|
||||
cmd->chan.mode = arg->mode;
|
||||
cmd->chan.flags |= __cpu_to_le32(ch_flags);
|
||||
cmd->chan.min_power = arg->min_power;
|
||||
cmd->chan.max_power = arg->max_power;
|
||||
cmd->chan.reg_power = arg->max_reg_power;
|
||||
@ -2211,7 +2469,7 @@ static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
|
||||
__cpu_to_le32(ar->wmi.num_mem_chunks));
|
||||
ar->wmi.num_mem_chunks);
|
||||
|
||||
cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
|
||||
|
||||
@ -2224,10 +2482,10 @@ static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
|
||||
__cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_WMI,
|
||||
"wmi chunk %d len %d requested, addr 0x%x\n",
|
||||
"wmi chunk %d len %d requested, addr 0x%llx\n",
|
||||
i,
|
||||
cmd->host_mem_chunks[i].size,
|
||||
cmd->host_mem_chunks[i].ptr);
|
||||
ar->wmi.mem_chunks[i].len,
|
||||
(unsigned long long)ar->wmi.mem_chunks[i].paddr);
|
||||
}
|
||||
out:
|
||||
memcpy(&cmd->resource_config, &config, sizeof(config));
|
||||
@ -2302,7 +2560,7 @@ static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
|
||||
__cpu_to_le32(ar->wmi.num_mem_chunks));
|
||||
ar->wmi.num_mem_chunks);
|
||||
|
||||
cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
|
||||
|
||||
@ -2315,10 +2573,10 @@ static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
|
||||
__cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_WMI,
|
||||
"wmi chunk %d len %d requested, addr 0x%x\n",
|
||||
"wmi chunk %d len %d requested, addr 0x%llx\n",
|
||||
i,
|
||||
cmd->host_mem_chunks[i].size,
|
||||
cmd->host_mem_chunks[i].ptr);
|
||||
ar->wmi.mem_chunks[i].len,
|
||||
(unsigned long long)ar->wmi.mem_chunks[i].paddr);
|
||||
}
|
||||
out:
|
||||
memcpy(&cmd->resource_config, &config, sizeof(config));
|
||||
@ -2622,6 +2880,7 @@ static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
|
||||
struct sk_buff *skb;
|
||||
const char *cmdname;
|
||||
u32 flags = 0;
|
||||
u32 ch_flags = 0;
|
||||
|
||||
if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
|
||||
cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
|
||||
@ -2648,6 +2907,8 @@ static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
|
||||
flags |= WMI_VDEV_START_HIDDEN_SSID;
|
||||
if (arg->pmf_enabled)
|
||||
flags |= WMI_VDEV_START_PMF_ENABLED;
|
||||
if (arg->channel.chan_radar)
|
||||
ch_flags |= WMI_CHAN_FLAG_DFS;
|
||||
|
||||
cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
|
||||
cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
|
||||
@ -2669,6 +2930,7 @@ static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
|
||||
__cpu_to_le32(arg->channel.band_center_freq1);
|
||||
|
||||
cmd->chan.mode = arg->channel.mode;
|
||||
cmd->chan.flags |= __cpu_to_le32(ch_flags);
|
||||
cmd->chan.min_power = arg->channel.min_power;
|
||||
cmd->chan.max_power = arg->channel.max_power;
|
||||
cmd->chan.reg_power = arg->channel.max_reg_power;
|
||||
@ -2676,9 +2938,10 @@ static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
|
||||
cmd->chan.antenna_max = arg->channel.max_antenna_gain;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_WMI,
|
||||
"wmi vdev %s id 0x%x freq %d, mode %d, ch_flags: 0x%0X,"
|
||||
"max_power: %d\n", cmdname, arg->vdev_id, arg->channel.freq,
|
||||
arg->channel.mode, flags, arg->channel.max_power);
|
||||
"wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, "
|
||||
"ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id,
|
||||
flags, arg->channel.freq, arg->channel.mode,
|
||||
cmd->chan.flags, arg->channel.max_power);
|
||||
|
||||
return ath10k_wmi_cmd_send(ar, skb, cmd_id);
|
||||
}
|
||||
@ -3012,6 +3275,8 @@ int ath10k_wmi_scan_chan_list(struct ath10k *ar,
|
||||
flags |= WMI_CHAN_FLAG_ALLOW_VHT;
|
||||
if (ch->ht40plus)
|
||||
flags |= WMI_CHAN_FLAG_HT40_PLUS;
|
||||
if (ch->chan_radar)
|
||||
flags |= WMI_CHAN_FLAG_DFS;
|
||||
|
||||
ci->mhz = __cpu_to_le32(ch->freq);
|
||||
ci->band_center_freq1 = __cpu_to_le32(ch->freq);
|
||||
@ -3094,6 +3359,7 @@ int ath10k_wmi_beacon_send_nowait(struct ath10k *ar,
|
||||
{
|
||||
struct wmi_bcn_tx_cmd *cmd;
|
||||
struct sk_buff *skb;
|
||||
int ret;
|
||||
|
||||
skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->bcn_len);
|
||||
if (!skb)
|
||||
@ -3106,7 +3372,11 @@ int ath10k_wmi_beacon_send_nowait(struct ath10k *ar,
|
||||
cmd->hdr.bcn_len = __cpu_to_le32(arg->bcn_len);
|
||||
memcpy(cmd->bcn, arg->bcn, arg->bcn_len);
|
||||
|
||||
return ath10k_wmi_cmd_send_nowait(ar, skb, ar->wmi.cmd->bcn_tx_cmdid);
|
||||
ret = ath10k_wmi_cmd_send_nowait(ar, skb, ar->wmi.cmd->bcn_tx_cmdid);
|
||||
if (ret)
|
||||
dev_kfree_skb(skb);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
|
||||
|
@ -893,6 +893,7 @@ struct wmi_channel {
|
||||
union {
|
||||
__le32 reginfo0;
|
||||
struct {
|
||||
/* note: power unit is 0.5 dBm */
|
||||
u8 min_power;
|
||||
u8 max_power;
|
||||
u8 reg_power;
|
||||
@ -915,7 +916,8 @@ struct wmi_channel_arg {
|
||||
bool allow_ht;
|
||||
bool allow_vht;
|
||||
bool ht40plus;
|
||||
/* note: power unit is 1/4th of dBm */
|
||||
bool chan_radar;
|
||||
/* note: power unit is 0.5 dBm */
|
||||
u32 min_power;
|
||||
u32 max_power;
|
||||
u32 max_reg_power;
|
||||
@ -1977,6 +1979,10 @@ struct wmi_mgmt_rx_event_v2 {
|
||||
#define WMI_RX_STATUS_ERR_MIC 0x10
|
||||
#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
|
||||
|
||||
#define PHY_ERROR_SPECTRAL_SCAN 0x26
|
||||
#define PHY_ERROR_FALSE_RADAR_EXT 0x24
|
||||
#define PHY_ERROR_RADAR 0x05
|
||||
|
||||
struct wmi_single_phyerr_rx_hdr {
|
||||
/* TSF timestamp */
|
||||
__le32 tsf_timestamp;
|
||||
@ -2068,6 +2074,87 @@ struct wmi_comb_phyerr_rx_event {
|
||||
u8 bufp[0];
|
||||
} __packed;
|
||||
|
||||
#define PHYERR_TLV_SIG 0xBB
|
||||
#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
|
||||
#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
|
||||
|
||||
struct phyerr_radar_report {
|
||||
__le32 reg0; /* RADAR_REPORT_REG0_* */
|
||||
__le32 reg1; /* REDAR_REPORT_REG1_* */
|
||||
} __packed;
|
||||
|
||||
#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
|
||||
#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
|
||||
|
||||
#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
|
||||
#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
|
||||
|
||||
#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
|
||||
#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
|
||||
|
||||
#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
|
||||
#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
|
||||
|
||||
#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
|
||||
#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
|
||||
|
||||
#define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
|
||||
#define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
|
||||
|
||||
#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
|
||||
#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
|
||||
|
||||
#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
|
||||
#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
|
||||
|
||||
#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
|
||||
#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
|
||||
|
||||
#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
|
||||
#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
|
||||
|
||||
#define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
|
||||
#define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
|
||||
|
||||
struct phyerr_fft_report {
|
||||
__le32 reg0; /* SEARCH_FFT_REPORT_REG0_ * */
|
||||
__le32 reg1; /* SEARCH_FFT_REPORT_REG1_ * */
|
||||
} __packed;
|
||||
|
||||
#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
|
||||
#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
|
||||
|
||||
#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
|
||||
#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
|
||||
|
||||
#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
|
||||
#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
|
||||
|
||||
#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
|
||||
#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
|
||||
|
||||
#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
|
||||
#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
|
||||
|
||||
#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
|
||||
#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
|
||||
|
||||
#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
|
||||
#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
|
||||
|
||||
#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
|
||||
#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
|
||||
|
||||
|
||||
struct phyerr_tlv {
|
||||
__le16 len;
|
||||
u8 tag;
|
||||
u8 sig;
|
||||
} __packed;
|
||||
|
||||
#define DFS_RSSI_POSSIBLY_FALSE 50
|
||||
#define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
|
||||
|
||||
struct wmi_mgmt_tx_hdr {
|
||||
__le32 vdev_id;
|
||||
struct wmi_mac_addr peer_macaddr;
|
||||
@ -2233,7 +2320,12 @@ enum wmi_pdev_param {
|
||||
* 0: no protection 1:use CTS-to-self 2: use RTS/CTS
|
||||
*/
|
||||
WMI_PDEV_PARAM_PROTECTION_MODE,
|
||||
/* Dynamic bandwidth 0: disable 1: enable */
|
||||
/*
|
||||
* Dynamic bandwidth - 0: disable, 1: enable
|
||||
*
|
||||
* When enabled HW rate control tries different bandwidths when
|
||||
* retransmitting frames.
|
||||
*/
|
||||
WMI_PDEV_PARAM_DYNAMIC_BW,
|
||||
/* Non aggregrate/ 11g sw retry threshold.0-disable */
|
||||
WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
|
||||
|
Loading…
Reference in New Issue
Block a user