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EDAC, altera: Add ECC Manager IRQ controller support
To better support child devices, the ECC manager needs to be implemented as an IRQ controller. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1465331757-10227-1-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
This commit is contained in:
Thor Thayer
Borislav Petkov
parent
47d78000eb
commit
13ab8448d2
@ -22,9 +22,11 @@
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#include <linux/edac.h>
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#include <linux/genalloc.h>
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#include <linux/interrupt.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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@ -882,22 +884,29 @@ static void ocram_free_mem(void *p, size_t size, void *other)
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gen_pool_free((struct gen_pool *)other, (u32)p, size);
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}
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static irqreturn_t altr_edac_a10_ecc_irq(struct altr_edac_device_dev *dci,
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bool sberr)
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static irqreturn_t altr_edac_a10_ecc_irq(int irq, void *dev_id)
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{
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struct altr_edac_device_dev *dci = dev_id;
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void __iomem *base = dci->base;
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if (sberr) {
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if (irq == dci->sb_irq) {
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writel(ALTR_A10_ECC_SERRPENA,
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base + ALTR_A10_ECC_INTSTAT_OFST);
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edac_device_handle_ce(dci->edac_dev, 0, 0, dci->edac_dev_name);
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} else {
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return IRQ_HANDLED;
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} else if (irq == dci->db_irq) {
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writel(ALTR_A10_ECC_DERRPENA,
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base + ALTR_A10_ECC_INTSTAT_OFST);
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edac_device_handle_ue(dci->edac_dev, 0, 0, dci->edac_dev_name);
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panic("\nEDAC:ECC_DEVICE[Uncorrectable errors]\n");
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return IRQ_HANDLED;
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}
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return IRQ_HANDLED;
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WARN_ON(1);
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return IRQ_NONE;
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}
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const struct edac_device_prv_data ocramecc_data = {
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@ -988,22 +997,30 @@ static int altr_l2_check_deps(struct altr_edac_device_dev *device)
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return -ENODEV;
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}
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static irqreturn_t altr_edac_a10_l2_irq(struct altr_edac_device_dev *dci,
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bool sberr)
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static irqreturn_t altr_edac_a10_l2_irq(int irq, void *dev_id)
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{
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if (sberr) {
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struct altr_edac_device_dev *dci = dev_id;
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if (irq == dci->sb_irq) {
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regmap_write(dci->edac->ecc_mgr_map,
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A10_SYSGMR_MPU_CLEAR_L2_ECC_OFST,
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A10_SYSGMR_MPU_CLEAR_L2_ECC_SB);
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edac_device_handle_ce(dci->edac_dev, 0, 0, dci->edac_dev_name);
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} else {
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return IRQ_HANDLED;
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} else if (irq == dci->db_irq) {
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regmap_write(dci->edac->ecc_mgr_map,
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A10_SYSGMR_MPU_CLEAR_L2_ECC_OFST,
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A10_SYSGMR_MPU_CLEAR_L2_ECC_MB);
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edac_device_handle_ue(dci->edac_dev, 0, 0, dci->edac_dev_name);
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panic("\nEDAC:ECC_DEVICE[Uncorrectable errors]\n");
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return IRQ_HANDLED;
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}
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return IRQ_HANDLED;
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WARN_ON(1);
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return IRQ_NONE;
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}
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const struct edac_device_prv_data l2ecc_data = {
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@ -1075,28 +1092,28 @@ static ssize_t altr_edac_a10_device_trig(struct file *file,
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return count;
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}
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static irqreturn_t altr_edac_a10_irq_handler(int irq, void *dev_id)
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static void altr_edac_a10_irq_handler(struct irq_desc *desc)
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{
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irqreturn_t rc = IRQ_NONE;
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struct altr_arria10_edac *edac = dev_id;
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struct altr_edac_device_dev *dci;
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int irq_status;
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bool sberr = (irq == edac->sb_irq) ? 1 : 0;
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int sm_offset = sberr ? A10_SYSMGR_ECC_INTSTAT_SERR_OFST :
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A10_SYSMGR_ECC_INTSTAT_DERR_OFST;
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int dberr, bit, sm_offset, irq_status;
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struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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int irq = irq_desc_get_irq(desc);
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dberr = (irq == edac->db_irq) ? 1 : 0;
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sm_offset = dberr ? A10_SYSMGR_ECC_INTSTAT_DERR_OFST :
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A10_SYSMGR_ECC_INTSTAT_SERR_OFST;
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chained_irq_enter(chip, desc);
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regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status);
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if ((irq != edac->sb_irq) && (irq != edac->db_irq)) {
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WARN_ON(1);
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} else {
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list_for_each_entry(dci, &edac->a10_ecc_devices, next) {
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if (irq_status & dci->data->irq_status_mask)
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rc = dci->data->ecc_irq_handler(dci, sberr);
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}
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for_each_set_bit(bit, (unsigned long *)&irq_status, 32) {
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irq = irq_linear_revmap(edac->domain, dberr * 32 + bit);
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if (irq)
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generic_handle_irq(irq);
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}
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return rc;
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chained_irq_exit(chip, desc);
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}
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static int altr_edac_a10_device_add(struct altr_arria10_edac *edac,
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@ -1168,6 +1185,34 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac,
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goto err_release_group1;
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}
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altdev->sb_irq = irq_of_parse_and_map(np, 0);
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if (!altdev->sb_irq) {
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edac_printk(KERN_ERR, EDAC_DEVICE, "Error allocating SBIRQ\n");
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rc = -ENODEV;
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goto err_release_group1;
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}
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rc = devm_request_irq(edac->dev, altdev->sb_irq,
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prv->ecc_irq_handler,
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IRQF_SHARED, ecc_name, altdev);
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if (rc) {
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edac_printk(KERN_ERR, EDAC_DEVICE, "No DBERR IRQ resource\n");
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goto err_release_group1;
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}
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altdev->db_irq = irq_of_parse_and_map(np, 1);
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if (!altdev->db_irq) {
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edac_printk(KERN_ERR, EDAC_DEVICE, "Error allocating DBIRQ\n");
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rc = -ENODEV;
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goto err_release_group1;
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}
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rc = devm_request_irq(edac->dev, altdev->db_irq,
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prv->ecc_irq_handler,
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IRQF_SHARED, ecc_name, altdev);
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if (rc) {
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edac_printk(KERN_ERR, EDAC_DEVICE, "No DBERR IRQ resource\n");
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goto err_release_group1;
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}
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rc = edac_device_add_device(dci);
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if (rc) {
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dev_err(edac->dev, "edac_device_add_device failed\n");
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@ -1186,7 +1231,6 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac,
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err_release_group1:
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edac_device_free_ctl_info(dci);
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err_release_group:
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edac_printk(KERN_ALERT, EDAC_DEVICE, "%s: %d\n", __func__, __LINE__);
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devres_release_group(edac->dev, NULL);
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edac_printk(KERN_ERR, EDAC_DEVICE,
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"%s:Error setting up EDAC device: %d\n", ecc_name, rc);
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@ -1194,11 +1238,43 @@ err_release_group:
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return rc;
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}
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static void a10_eccmgr_irq_mask(struct irq_data *d)
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{
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struct altr_arria10_edac *edac = irq_data_get_irq_chip_data(d);
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regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_SET_OFST,
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BIT(d->hwirq));
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}
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static void a10_eccmgr_irq_unmask(struct irq_data *d)
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{
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struct altr_arria10_edac *edac = irq_data_get_irq_chip_data(d);
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regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_CLR_OFST,
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BIT(d->hwirq));
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}
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static int a10_eccmgr_irqdomain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct altr_arria10_edac *edac = d->host_data;
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irq_set_chip_and_handler(irq, &edac->irq_chip, handle_simple_irq);
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irq_set_chip_data(irq, edac);
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irq_set_noprobe(irq);
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return 0;
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}
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struct irq_domain_ops a10_eccmgr_ic_ops = {
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.map = a10_eccmgr_irqdomain_map,
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.xlate = irq_domain_xlate_twocell,
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};
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static int altr_edac_a10_probe(struct platform_device *pdev)
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{
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struct altr_arria10_edac *edac;
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struct device_node *child;
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int rc;
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edac = devm_kzalloc(&pdev->dev, sizeof(*edac), GFP_KERNEL);
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if (!edac)
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@ -1216,24 +1292,35 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
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return PTR_ERR(edac->ecc_mgr_map);
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}
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edac->sb_irq = platform_get_irq(pdev, 0);
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rc = devm_request_irq(&pdev->dev, edac->sb_irq,
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altr_edac_a10_irq_handler,
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IRQF_SHARED, dev_name(&pdev->dev), edac);
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if (rc) {
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edac_printk(KERN_ERR, EDAC_DEVICE, "No SBERR IRQ resource\n");
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return rc;
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edac->irq_chip.name = pdev->dev.of_node->name;
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edac->irq_chip.irq_mask = a10_eccmgr_irq_mask;
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edac->irq_chip.irq_unmask = a10_eccmgr_irq_unmask;
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edac->domain = irq_domain_add_linear(pdev->dev.of_node, 64,
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&a10_eccmgr_ic_ops, edac);
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if (!edac->domain) {
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dev_err(&pdev->dev, "Error adding IRQ domain\n");
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return -ENOMEM;
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}
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edac->db_irq = platform_get_irq(pdev, 1);
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rc = devm_request_irq(&pdev->dev, edac->db_irq,
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altr_edac_a10_irq_handler,
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IRQF_SHARED, dev_name(&pdev->dev), edac);
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if (rc) {
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edac_printk(KERN_ERR, EDAC_DEVICE, "No DBERR IRQ resource\n");
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return rc;
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edac->sb_irq = platform_get_irq(pdev, 0);
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if (edac->sb_irq < 0) {
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dev_err(&pdev->dev, "No SBERR IRQ resource\n");
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return edac->sb_irq;
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}
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irq_set_chained_handler_and_data(edac->sb_irq,
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altr_edac_a10_irq_handler,
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edac);
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edac->db_irq = platform_get_irq(pdev, 1);
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if (edac->db_irq < 0) {
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dev_err(&pdev->dev, "No DBERR IRQ resource\n");
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return edac->db_irq;
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}
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irq_set_chained_handler_and_data(edac->db_irq,
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altr_edac_a10_irq_handler,
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edac);
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for_each_child_of_node(pdev->dev.of_node, child) {
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if (!of_device_is_available(child))
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continue;
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@ -295,8 +295,7 @@ struct edac_device_prv_data {
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int ce_set_mask;
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int ue_set_mask;
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int set_err_ofst;
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irqreturn_t (*ecc_irq_handler)(struct altr_edac_device_dev *dci,
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bool sb);
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irqreturn_t (*ecc_irq_handler)(int irq, void *dev_id);
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int trig_alloc_sz;
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const struct file_operations *inject_fops;
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};
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@ -320,6 +319,8 @@ struct altr_arria10_edac {
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struct regmap *ecc_mgr_map;
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int sb_irq;
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int db_irq;
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struct irq_domain *domain;
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struct irq_chip irq_chip;
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struct list_head a10_ecc_devices;
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};
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