renegade-project/linux-next
2
0
Fork 0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-18 02:04:05 +08:00
Code

ARM: dts: mvebu: split SolidRun CuBox into variants

Browse Source 
As Mainlining effort for SolidRun CuBox has been carried out on the
Engineering Sample, the board DTS was reflecting this. Actually,
SolidRun CuBox comes in three different variants:
Engineering Sample (ES), production with 1GB RAM (1G),
and production with 2GB RAM (2G).

Therefore, we base current dove-cubox.dts on to the 1G production
variant and add a ES dts to add required quirk for misrouted SDHCI
card detect on top of dove-cubox.dts. For the 2G variant we rely on
the bootloader to setup correct RAM size.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1401228006-3212-1-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Sebastian Hesselbarth 2014-05-28 00:00:06 +02:00 committed by Jason Cooper
parent 481ff165ac
commit 133cea6680
3 changed files with 13 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@ -444,6 +444,7 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-openblocks-ax3-4.dtb
dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
dove-cubox.dtb \
dove-cubox-es.dtb \
dove-d2plug.dtb \
dove-d3plug.dtb \
dove-dove-db.dtb

12
arch/arm/boot/dts/dove-cubox-es.dts Normal file
View File

@ -0,0 +1,12 @@
#include "dove-cubox.dts"
/ {
model = "SolidRun CuBox (Engineering Sample)";
compatible = "solidrun,cubox-es", "solidrun,cubox", "marvell,dove";
};
&sdio0 {
/* sdio0 card detect is connected to wrong pin on CuBox ES */
cd-gpios = <&gpio0 12 1>;
pinctrl-0 = <&pmx_sdio0 &pmx_gpio_12>;
};

3
arch/arm/boot/dts/dove-cubox.dts
View File

@ -111,9 +111,6 @@
&sdio0 {
status = "okay";
/* sdio0 card detect is connected to wrong pin on CuBox */
cd-gpios = <&gpio0 12 1>;
pinctrl-0 = <&pmx_sdio0 &pmx_gpio_12>;
};
&spi0 {