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ARM: imx: add a legacy irqdomain for mx31ads
Call irq_alloc_descs to get the irq_base for mx31ads, and add a legacy irqdomain using the irq_base, so that the mapping between mx31ads hardware irq and Linux irq number can be dynamically handled by irqdomain. As the result, the use of MXC_BOARD_IRQ_START can be completely removed from mach-mx31ads.c. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
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ec7828807b
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@ -21,6 +21,7 @@
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -63,18 +64,17 @@
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#define PBC_INTMASK_SET_REG (PBC_INTMASK_SET + PBC_BASE_ADDRESS)
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#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS)
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#define MXC_EXP_IO_BASE MXC_BOARD_IRQ_START
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#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
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#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10)
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#define EXPIO_INT_XUART_INTB (MXC_EXP_IO_BASE + 11)
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#define EXPIO_INT_XUART_INTA 10
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#define EXPIO_INT_XUART_INTB 11
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#define MXC_MAX_EXP_IO_LINES 16
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/* CS8900 */
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#define EXPIO_INT_ENET_INT (MXC_EXP_IO_BASE + 8)
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#define EXPIO_INT_ENET_INT 8
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#define CS4_CS8900_MMIO_START 0x20000
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static struct irq_domain *domain;
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/*
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* The serial port definition structure.
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*/
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@ -82,7 +82,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
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{
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.membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
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.mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTA),
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.irq = EXPIO_INT_XUART_INTA,
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.uartclk = 14745600,
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.regshift = 0,
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.iotype = UPIO_MEM,
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@ -90,7 +89,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
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}, {
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.membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
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.mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB),
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.irq = EXPIO_INT_XUART_INTB,
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.uartclk = 14745600,
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.regshift = 0,
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.iotype = UPIO_MEM,
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@ -107,9 +105,9 @@ static struct platform_device serial_device = {
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},
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};
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static const struct resource mx31ads_cs8900_resources[] __initconst = {
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static struct resource mx31ads_cs8900_resources[] __initdata = {
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DEFINE_RES_MEM(MX31_CS4_BASE_ADDR + CS4_CS8900_MMIO_START, SZ_64K),
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DEFINE_RES_IRQ(EXPIO_INT_ENET_INT),
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DEFINE_RES_IRQ(-1),
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};
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static const struct platform_device_info mx31ads_cs8900_devinfo __initconst = {
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@ -121,11 +119,19 @@ static const struct platform_device_info mx31ads_cs8900_devinfo __initconst = {
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static int __init mxc_init_extuart(void)
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{
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serial_platform_data[0].irq = irq_find_mapping(domain,
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EXPIO_INT_XUART_INTA);
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serial_platform_data[1].irq = irq_find_mapping(domain,
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EXPIO_INT_XUART_INTB);
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return platform_device_register(&serial_device);
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}
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static void __init mxc_init_ext_ethernet(void)
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{
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mx31ads_cs8900_resources[1].start =
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irq_find_mapping(domain, EXPIO_INT_ENET_INT);
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mx31ads_cs8900_resources[1].end =
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irq_find_mapping(domain, EXPIO_INT_ENET_INT);
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platform_device_register_full(
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(struct platform_device_info *)&mx31ads_cs8900_devinfo);
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}
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@ -156,12 +162,12 @@ static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc)
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imr_val = __raw_readw(PBC_INTMASK_SET_REG);
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int_valid = __raw_readw(PBC_INTSTATUS_REG) & imr_val;
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expio_irq = MXC_EXP_IO_BASE;
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expio_irq = 0;
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for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
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if ((int_valid & 1) == 0)
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continue;
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generic_handle_irq(expio_irq);
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generic_handle_irq(irq_find_mapping(domain, expio_irq));
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}
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}
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@ -171,7 +177,7 @@ static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc)
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*/
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static void expio_mask_irq(struct irq_data *d)
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{
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u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
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u32 expio = d->hwirq;
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/* mask the interrupt */
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__raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG);
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__raw_readw(PBC_INTMASK_CLEAR_REG);
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@ -183,7 +189,7 @@ static void expio_mask_irq(struct irq_data *d)
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*/
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static void expio_ack_irq(struct irq_data *d)
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{
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u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
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u32 expio = d->hwirq;
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/* clear the interrupt status */
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__raw_writew(1 << expio, PBC_INTSTATUS_REG);
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}
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@ -194,7 +200,7 @@ static void expio_ack_irq(struct irq_data *d)
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*/
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static void expio_unmask_irq(struct irq_data *d)
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{
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u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
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u32 expio = d->hwirq;
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/* unmask the interrupt */
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__raw_writew(1 << expio, PBC_INTMASK_SET_REG);
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}
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@ -208,6 +214,7 @@ static struct irq_chip expio_irq_chip = {
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static void __init mx31ads_init_expio(void)
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{
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int irq_base;
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int i, irq;
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printk(KERN_INFO "MX31ADS EXPIO(CPLD) hardware\n");
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@ -220,8 +227,15 @@ static void __init mx31ads_init_expio(void)
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/* disable the interrupt and clear the status */
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__raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG);
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__raw_writew(0xFFFF, PBC_INTSTATUS_REG);
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for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
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i++) {
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irq_base = irq_alloc_descs(-1, 0, MXC_MAX_EXP_IO_LINES, numa_node_id());
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WARN_ON(irq_base < 0);
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domain = irq_domain_add_legacy(NULL, MXC_MAX_EXP_IO_LINES, irq_base, 0,
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&irq_domain_simple_ops, NULL);
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WARN_ON(!domain);
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for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) {
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irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
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set_irq_flags(i, IRQF_VALID);
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}
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