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usb: cdns3: remove fetched trb from cache before dequeuing
After doorbell DMA fetches the TRB. If during dequeuing request
driver changes NORMAL TRB to LINK TRB but doesn't delete it from
controller cache then controller will handle cached TRB and packet
can be lost.
The example scenario for this issue looks like:
1. queue request - set doorbell
2. dequeue request
3. send OUT data packet from host
4. Device will accept this packet which is unexpected
5. queue new request - set doorbell
6. Device lost the expected packet.
By setting DFLUSH controller clears DRDY bit and stop DMA transfer.
Fixes: 7733f6c32e
("usb: cdns3: Add Cadence USB3 DRD Driver")
cc: <stable@vger.kernel.org>
Signed-off-by: Pawel Laszczak <pawell@cadence.com>
Acked-by: Peter Chen <peter.chen@kernel.org>
Link: https://lore.kernel.org/r/20221115100039.441295-1-pawell@cadence.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
b1f02c6a26
commit
1301c7b9f7
@ -2614,6 +2614,7 @@ int cdns3_gadget_ep_dequeue(struct usb_ep *ep,
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u8 req_on_hw_ring = 0;
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unsigned long flags;
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int ret = 0;
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int val;
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if (!ep || !request || !ep->desc)
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return -EINVAL;
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@ -2649,6 +2650,13 @@ found:
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/* Update ring only if removed request is on pending_req_list list */
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if (req_on_hw_ring && link_trb) {
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/* Stop DMA */
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writel(EP_CMD_DFLUSH, &priv_dev->regs->ep_cmd);
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/* wait for DFLUSH cleared */
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readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
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!(val & EP_CMD_DFLUSH), 1, 1000);
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link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma +
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((priv_req->end_trb + 1) * TRB_SIZE)));
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link_trb->control = cpu_to_le32((le32_to_cpu(link_trb->control) & TRB_CYCLE) |
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@ -2660,6 +2668,10 @@ found:
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cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
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req = cdns3_next_request(&priv_ep->pending_req_list);
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if (req)
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cdns3_rearm_transfer(priv_ep, 1);
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not_found:
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spin_unlock_irqrestore(&priv_dev->lock, flags);
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return ret;
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