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MIPS: Octeon: Turn hardware bitfields and structures inside out.
Although the proper way to do this for bitfields would be to use the macro that Ralf has provided, this is a little easier to understand as a diff. Signed-off-by: Paul Martin <paul.martin@codethink.co.uk> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9628/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -519,44 +519,89 @@ int cvmx_l2c_unlock_mem_region(uint64_t start, uint64_t len)
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union __cvmx_l2c_tag {
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uint64_t u64;
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struct cvmx_l2c_tag_cn50xx {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved:40;
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uint64_t V:1; /* Line valid */
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uint64_t D:1; /* Line dirty */
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uint64_t L:1; /* Line locked */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t addr:20; /* Phys mem addr (33..14) */
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#else
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uint64_t addr:20; /* Phys mem addr (33..14) */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t L:1; /* Line locked */
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uint64_t D:1; /* Line dirty */
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uint64_t V:1; /* Line valid */
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uint64_t reserved:40;
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#endif
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} cn50xx;
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struct cvmx_l2c_tag_cn30xx {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved:41;
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uint64_t V:1; /* Line valid */
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uint64_t D:1; /* Line dirty */
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uint64_t L:1; /* Line locked */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t addr:19; /* Phys mem addr (33..15) */
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#else
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uint64_t addr:19; /* Phys mem addr (33..15) */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t L:1; /* Line locked */
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uint64_t D:1; /* Line dirty */
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uint64_t V:1; /* Line valid */
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uint64_t reserved:41;
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#endif
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} cn30xx;
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struct cvmx_l2c_tag_cn31xx {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved:42;
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uint64_t V:1; /* Line valid */
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uint64_t D:1; /* Line dirty */
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uint64_t L:1; /* Line locked */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t addr:18; /* Phys mem addr (33..16) */
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#else
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uint64_t addr:18; /* Phys mem addr (33..16) */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t L:1; /* Line locked */
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uint64_t D:1; /* Line dirty */
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uint64_t V:1; /* Line valid */
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uint64_t reserved:42;
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#endif
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} cn31xx;
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struct cvmx_l2c_tag_cn38xx {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved:43;
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uint64_t V:1; /* Line valid */
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uint64_t D:1; /* Line dirty */
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uint64_t L:1; /* Line locked */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t addr:17; /* Phys mem addr (33..17) */
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#else
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uint64_t addr:17; /* Phys mem addr (33..17) */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t L:1; /* Line locked */
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uint64_t D:1; /* Line dirty */
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uint64_t V:1; /* Line valid */
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uint64_t reserved:43;
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#endif
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} cn38xx;
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struct cvmx_l2c_tag_cn58xx {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved:44;
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uint64_t V:1; /* Line valid */
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uint64_t D:1; /* Line dirty */
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uint64_t L:1; /* Line locked */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t addr:16; /* Phys mem addr (33..18) */
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#else
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uint64_t addr:16; /* Phys mem addr (33..18) */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t L:1; /* Line locked */
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uint64_t D:1; /* Line dirty */
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uint64_t V:1; /* Line valid */
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uint64_t reserved:44;
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#endif
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} cn58xx;
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struct cvmx_l2c_tag_cn58xx cn56xx; /* 2048 sets */
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struct cvmx_l2c_tag_cn31xx cn52xx; /* 512 sets */
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@ -104,6 +104,7 @@ typedef enum {
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typedef union {
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uint64_t u64;
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#ifdef __BIG_ENDIAN_BITFIELD
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/* mapped or unmapped virtual address */
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struct {
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uint64_t R:2;
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@ -202,6 +203,72 @@ typedef union {
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uint64_t didspace:24;
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uint64_t unused:40;
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} sfilldidspace;
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#else
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struct {
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uint64_t offset:62;
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uint64_t R:2;
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} sva;
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struct {
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uint64_t offset:31;
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uint64_t zeroes:33;
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} suseg;
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struct {
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uint64_t offset:29;
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uint64_t sp:2;
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uint64_t ones:33;
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} sxkseg;
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struct {
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uint64_t pa:49;
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uint64_t mbz:10;
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uint64_t cca:3;
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uint64_t R:2;
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} sxkphys;
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struct {
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uint64_t offset:36;
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uint64_t unaddr:4;
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uint64_t did:8;
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uint64_t is_io:1;
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uint64_t mbz:15;
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} sphys;
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struct {
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uint64_t offset:36;
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uint64_t unaddr:4;
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uint64_t zeroes:24;
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} smem;
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struct {
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uint64_t offset:36;
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uint64_t unaddr:4;
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uint64_t did:8;
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uint64_t is_io:1;
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uint64_t mbz:13;
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uint64_t mem_region:2;
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} sio;
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struct {
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uint64_t addr:13;
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cvmx_add_win_dec_t csrdec:2;
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uint64_t ones:49;
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} sscr;
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struct {
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uint64_t addr:7;
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uint64_t type:3;
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uint64_t unused2:3;
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uint64_t csrdec:2;
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uint64_t ones:49;
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} sdma;
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struct {
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uint64_t unused:40;
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uint64_t didspace:24;
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} sfilldidspace;
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#endif
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} cvmx_addr_t;
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@ -95,6 +95,7 @@ struct cvmx_bootmem_named_block_desc {
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* positions for backwards compatibility.
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*/
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struct cvmx_bootmem_desc {
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#if defined(__BIG_ENDIAN_BITFIELD) || defined(CVMX_BUILD_FOR_LINUX_HOST)
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/* spinlock to control access to list */
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uint32_t lock;
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/* flags for indicating various conditions */
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@ -120,7 +121,20 @@ struct cvmx_bootmem_desc {
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uint32_t named_block_name_len;
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/* address of named memory block descriptors */
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uint64_t named_block_array_addr;
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#else /* __LITTLE_ENDIAN */
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uint32_t flags;
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uint32_t lock;
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uint64_t head_addr;
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uint32_t minor_version;
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uint32_t major_version;
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uint64_t app_data_addr;
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uint64_t app_data_size;
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uint32_t named_block_name_len;
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uint32_t named_block_num_blocks;
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uint64_t named_block_array_addr;
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#endif
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};
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/**
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@ -49,6 +49,7 @@
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typedef union {
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uint64_t u64;
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/*
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* the (64-bit word) location in scratchpad to write
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* to (if len != 0)
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@ -63,6 +64,12 @@ typedef union {
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* the NCB bus.
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*/
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uint64_t addr:40;
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#else
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uint64_t addr:40;
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uint64_t did:8;
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uint64_t len:8;
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uint64_t scraddr:8;
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#endif
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} s;
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} cvmx_fpa_iobdma_data_t;
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union cvmx_l2c_tag {
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uint64_t u64;
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint64_t reserved:28;
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uint64_t V:1; /* Line valid */
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uint64_t D:1; /* Line dirty */
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uint64_t L:1; /* Line locked */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t addr:32; /* Phys mem (not all bits valid) */
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#else
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uint64_t addr:32; /* Phys mem (not all bits valid) */
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uint64_t U:1; /* Use, LRU eviction */
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uint64_t L:1; /* Line locked */
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uint64_t D:1; /* Line dirty */
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uint64_t V:1; /* Line valid */
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uint64_t reserved:28;
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#endif
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} s;
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};
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@ -39,6 +39,7 @@ union cvmx_buf_ptr {
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void *ptr;
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uint64_t u64;
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/* if set, invert the "free" pick of the overall
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* packet. HW always sets this bit to 0 on inbound
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* packet */
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@ -55,6 +56,13 @@ union cvmx_buf_ptr {
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uint64_t size:16;
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/* Pointer to the first byte of the data, NOT buffer */
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uint64_t addr:40;
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#else
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uint64_t addr:40;
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uint64_t size:16;
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uint64_t pool:3;
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uint64_t back:4;
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uint64_t i:1;
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#endif
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} s;
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};
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typedef union {
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uint64_t u64;
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/* Must CVMX_IO_SEG */
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uint64_t mem_space:2;
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/* Must be zero */
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@ -151,6 +152,17 @@ typedef union {
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uint64_t queue:9;
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/* Must be zero */
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uint64_t reserved4:3;
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#else
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uint64_t reserved4:3;
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uint64_t queue:9;
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uint64_t port:9;
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uint64_t reserved3:15;
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uint64_t reserved2:4;
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uint64_t did:8;
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uint64_t is_io:1;
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uint64_t reserved:13;
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uint64_t mem_space:2;
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#endif
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} s;
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} cvmx_pko_doorbell_address_t;
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@ -160,6 +172,7 @@ typedef union {
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typedef union {
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uint64_t u64;
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/*
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* The size of the reg1 operation - could be 8, 16,
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* 32, or 64 bits.
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@ -229,6 +242,24 @@ typedef union {
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uint64_t segs:6;
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/* Including L2, but no trailing CRC */
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uint64_t total_bytes:16;
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#else
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uint64_t total_bytes:16;
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uint64_t segs:6;
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uint64_t dontfree:1;
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uint64_t ignore_i:1;
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uint64_t ipoffp1:7;
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uint64_t gather:1;
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uint64_t rsp:1;
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uint64_t wqp:1;
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uint64_t n2:1;
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uint64_t le:1;
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uint64_t reg0:11;
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uint64_t subone0:1;
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uint64_t reg1:11;
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uint64_t subone1:1;
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uint64_t size0:2;
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uint64_t size1:2;
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#endif
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} s;
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} cvmx_pko_command_word0_t;
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typedef union {
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uint64_t u64;
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/*
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* Don't reschedule this entry. no_sched is used for
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* CVMX_POW_TAG_OP_SWTAG_DESCH and
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@ -217,6 +218,17 @@ typedef union {
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* CVMX_POW_TAG_OP_*_NSCHED
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*/
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uint64_t tag:32;
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#else
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uint64_t tag:32;
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uint64_t type:3;
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uint64_t grp:4;
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uint64_t qos:3;
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uint64_t unused2:2;
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cvmx_pow_tag_op_t op:4;
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uint64_t index:13;
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uint64_t unused:2;
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uint64_t no_sched:1;
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#endif
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} s;
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} cvmx_pow_tag_req_t;
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@ -230,6 +242,7 @@ typedef union {
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* Address for new work request loads (did<2:0> == 0)
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*/
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/* Mips64 address region. Should be CVMX_IO_SEG */
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uint64_t mem_region:2;
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/* Must be zero */
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@ -247,12 +260,22 @@ typedef union {
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uint64_t wait:1;
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/* Must be zero */
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uint64_t reserved_0_2:3;
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#else
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uint64_t reserved_0_2:3;
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uint64_t wait:1;
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uint64_t reserved_4_39:36;
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uint64_t did:8;
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uint64_t is_io:1;
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uint64_t reserved_49_61:13;
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uint64_t mem_region:2;
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#endif
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} swork;
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/**
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* Address for loads to get POW internal status
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*/
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/* Mips64 address region. Should be CVMX_IO_SEG */
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uint64_t mem_region:2;
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/* Must be zero */
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@ -282,12 +305,25 @@ typedef union {
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uint64_t get_wqp:1;
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/* Must be zero */
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uint64_t reserved_0_2:3;
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#else
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uint64_t reserved_0_2:3;
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uint64_t get_wqp:1;
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uint64_t get_cur:1;
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uint64_t get_rev:1;
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uint64_t coreid:4;
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uint64_t reserved_10_39:30;
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uint64_t did:8;
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uint64_t is_io:1;
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uint64_t reserved_49_61:13;
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uint64_t mem_region:2;
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#endif
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} sstatus;
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/**
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* Address for memory loads to get POW internal state
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*/
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/* Mips64 address region. Should be CVMX_IO_SEG */
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uint64_t mem_region:2;
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/* Must be zero */
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@ -314,12 +350,24 @@ typedef union {
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uint64_t get_wqp:1;
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/* Must be zero */
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uint64_t reserved_0_2:3;
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#else
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uint64_t reserved_0_2:3;
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uint64_t get_wqp:1;
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uint64_t get_des:1;
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uint64_t index:11;
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uint64_t reserved_16_39:24;
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uint64_t did:8;
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uint64_t is_io:1;
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uint64_t reserved_49_61:13;
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uint64_t mem_region:2;
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#endif
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} smemload;
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/**
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* Address for index/pointer loads
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*/
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/* Mips64 address region. Should be CVMX_IO_SEG */
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uint64_t mem_region:2;
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/* Must be zero */
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@ -366,6 +414,17 @@ typedef union {
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uint64_t get_rmt:1;
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/* Must be zero */
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uint64_t reserved_0_2:3;
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#else
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uint64_t reserved_0_2:3;
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uint64_t get_rmt:1;
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uint64_t get_des_get_tail:1;
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uint64_t qosgrp:4;
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uint64_t reserved_9_39:31;
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uint64_t did:8;
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uint64_t is_io:1;
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uint64_t reserved_49_61:13;
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uint64_t mem_region:2;
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#endif
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} sindexload;
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/**
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@ -377,6 +436,7 @@ typedef union {
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* available.)
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*/
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struct {
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#ifdef __BIG_ENDIAN_BITFIELD
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/* Mips64 address region. Should be CVMX_IO_SEG */
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uint64_t mem_region:2;
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/* Must be zero */
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@ -387,6 +447,13 @@ typedef union {
|
||||
uint64_t did:8;
|
||||
/* Must be zero */
|
||||
uint64_t reserved_0_39:40;
|
||||
#else
|
||||
uint64_t reserved_0_39:40;
|
||||
uint64_t did:8;
|
||||
uint64_t is_io:1;
|
||||
uint64_t reserved_49_61:13;
|
||||
uint64_t mem_region:2;
|
||||
#endif
|
||||
} snull_rd;
|
||||
} cvmx_pow_load_addr_t;
|
||||
|
||||
@ -401,6 +468,7 @@ typedef union {
|
||||
* Response to new work request loads
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
/*
|
||||
* Set when no new work queue entry was returned. *
|
||||
* If there was de-scheduled work, the HW will
|
||||
@ -419,12 +487,18 @@ typedef union {
|
||||
uint64_t reserved_40_62:23;
|
||||
/* 36 in O1 -- the work queue pointer */
|
||||
uint64_t addr:40;
|
||||
#else
|
||||
uint64_t addr:40;
|
||||
uint64_t reserved_40_62:23;
|
||||
uint64_t no_work:1;
|
||||
#endif
|
||||
} s_work;
|
||||
|
||||
/**
|
||||
* Result for a POW Status Load (when get_cur==0 and get_wqp==0)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_62_63:2;
|
||||
/* Set when there is a pending non-NULL SWTAG or
|
||||
* SWTAG_FULL, and the POW entry has not left the list
|
||||
@ -476,12 +550,32 @@ typedef union {
|
||||
* AND pend_desched_switch) are set.
|
||||
*/
|
||||
uint64_t pend_tag:32;
|
||||
#else
|
||||
uint64_t pend_tag:32;
|
||||
uint64_t pend_type:2;
|
||||
uint64_t reserved_34_35:2;
|
||||
uint64_t pend_grp:4;
|
||||
uint64_t pend_index:11;
|
||||
uint64_t reserved_51:1;
|
||||
uint64_t pend_nosched_clr:1;
|
||||
uint64_t pend_null_rd:1;
|
||||
uint64_t pend_new_work_wait:1;
|
||||
uint64_t pend_new_work:1;
|
||||
uint64_t pend_nosched:1;
|
||||
uint64_t pend_desched_switch:1;
|
||||
uint64_t pend_desched:1;
|
||||
uint64_t pend_switch_null:1;
|
||||
uint64_t pend_switch_full:1;
|
||||
uint64_t pend_switch:1;
|
||||
uint64_t reserved_62_63:2;
|
||||
#endif
|
||||
} s_sstatus0;
|
||||
|
||||
/**
|
||||
* Result for a POW Status Load (when get_cur==0 and get_wqp==1)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_62_63:2;
|
||||
/*
|
||||
* Set when there is a pending non-NULL SWTAG or
|
||||
@ -529,6 +623,23 @@ typedef union {
|
||||
uint64_t pend_grp:4;
|
||||
/* This is the wqp when pend_nosched_clr is set. */
|
||||
uint64_t pend_wqp:36;
|
||||
#else
|
||||
uint64_t pend_wqp:36;
|
||||
uint64_t pend_grp:4;
|
||||
uint64_t pend_index:11;
|
||||
uint64_t reserved_51:1;
|
||||
uint64_t pend_nosched_clr:1;
|
||||
uint64_t pend_null_rd:1;
|
||||
uint64_t pend_new_work_wait:1;
|
||||
uint64_t pend_new_work:1;
|
||||
uint64_t pend_nosched:1;
|
||||
uint64_t pend_desched_switch:1;
|
||||
uint64_t pend_desched:1;
|
||||
uint64_t pend_switch_null:1;
|
||||
uint64_t pend_switch_full:1;
|
||||
uint64_t pend_switch:1;
|
||||
uint64_t reserved_62_63:2;
|
||||
#endif
|
||||
} s_sstatus1;
|
||||
|
||||
/**
|
||||
@ -536,6 +647,7 @@ typedef union {
|
||||
* get_rev==0)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_62_63:2;
|
||||
/*
|
||||
* Points to the next POW entry in the tag list when
|
||||
@ -573,12 +685,23 @@ typedef union {
|
||||
* SWTAG_DESCHED).
|
||||
*/
|
||||
uint64_t tag:32;
|
||||
#else
|
||||
uint64_t tag:32;
|
||||
uint64_t tag_type:2;
|
||||
uint64_t tail:1;
|
||||
uint64_t head:1;
|
||||
uint64_t grp:4;
|
||||
uint64_t index:11;
|
||||
uint64_t link_index:11;
|
||||
uint64_t reserved_62_63:2;
|
||||
#endif
|
||||
} s_sstatus2;
|
||||
|
||||
/**
|
||||
* Result for a POW Status Load (when get_cur==1, get_wqp==0, and get_rev==1)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_62_63:2;
|
||||
/*
|
||||
* Points to the prior POW entry in the tag list when
|
||||
@ -617,6 +740,16 @@ typedef union {
|
||||
* SWTAG_DESCHED).
|
||||
*/
|
||||
uint64_t tag:32;
|
||||
#else
|
||||
uint64_t tag:32;
|
||||
uint64_t tag_type:2;
|
||||
uint64_t tail:1;
|
||||
uint64_t head:1;
|
||||
uint64_t grp:4;
|
||||
uint64_t index:11;
|
||||
uint64_t revlink_index:11;
|
||||
uint64_t reserved_62_63:2;
|
||||
#endif
|
||||
} s_sstatus3;
|
||||
|
||||
/**
|
||||
@ -624,6 +757,7 @@ typedef union {
|
||||
* get_rev==0)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_62_63:2;
|
||||
/*
|
||||
* Points to the next POW entry in the tag list when
|
||||
@ -642,6 +776,13 @@ typedef union {
|
||||
* list entered on SWTAG_FULL).
|
||||
*/
|
||||
uint64_t wqp:36;
|
||||
#else
|
||||
uint64_t wqp:36;
|
||||
uint64_t grp:4;
|
||||
uint64_t index:11;
|
||||
uint64_t link_index:11;
|
||||
uint64_t reserved_62_63:2;
|
||||
#endif
|
||||
} s_sstatus4;
|
||||
|
||||
/**
|
||||
@ -649,6 +790,7 @@ typedef union {
|
||||
* get_rev==1)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_62_63:2;
|
||||
/*
|
||||
* Points to the prior POW entry in the tag list when
|
||||
@ -669,12 +811,20 @@ typedef union {
|
||||
* list entered on SWTAG_FULL).
|
||||
*/
|
||||
uint64_t wqp:36;
|
||||
#else
|
||||
uint64_t wqp:36;
|
||||
uint64_t grp:4;
|
||||
uint64_t index:11;
|
||||
uint64_t revlink_index:11;
|
||||
uint64_t reserved_62_63:2;
|
||||
#endif
|
||||
} s_sstatus5;
|
||||
|
||||
/**
|
||||
* Result For POW Memory Load (get_des == 0 and get_wqp == 0)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_51_63:13;
|
||||
/*
|
||||
* The next entry in the input, free, descheduled_head
|
||||
@ -695,12 +845,22 @@ typedef union {
|
||||
uint64_t tag_type:2;
|
||||
/* The tag of the POW entry. */
|
||||
uint64_t tag:32;
|
||||
#else
|
||||
uint64_t tag:32;
|
||||
uint64_t tag_type:2;
|
||||
uint64_t tail:1;
|
||||
uint64_t reserved_35:1;
|
||||
uint64_t grp:4;
|
||||
uint64_t next_index:11;
|
||||
uint64_t reserved_51_63:13;
|
||||
#endif
|
||||
} s_smemload0;
|
||||
|
||||
/**
|
||||
* Result For POW Memory Load (get_des == 0 and get_wqp == 1)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_51_63:13;
|
||||
/*
|
||||
* The next entry in the input, free, descheduled_head
|
||||
@ -712,12 +872,19 @@ typedef union {
|
||||
uint64_t grp:4;
|
||||
/* The WQP held in the POW entry. */
|
||||
uint64_t wqp:36;
|
||||
#else
|
||||
uint64_t wqp:36;
|
||||
uint64_t grp:4;
|
||||
uint64_t next_index:11;
|
||||
uint64_t reserved_51_63:13;
|
||||
#endif
|
||||
} s_smemload1;
|
||||
|
||||
/**
|
||||
* Result For POW Memory Load (get_des == 1)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_51_63:13;
|
||||
/*
|
||||
* The next entry in the tag list connected to the
|
||||
@ -740,12 +907,22 @@ typedef union {
|
||||
* is set.
|
||||
*/
|
||||
uint64_t pend_tag:32;
|
||||
#else
|
||||
uint64_t pend_tag:32;
|
||||
uint64_t pend_type:2;
|
||||
uint64_t pend_switch:1;
|
||||
uint64_t nosched:1;
|
||||
uint64_t grp:4;
|
||||
uint64_t fwd_index:11;
|
||||
uint64_t reserved_51_63:13;
|
||||
#endif
|
||||
} s_smemload2;
|
||||
|
||||
/**
|
||||
* Result For POW Index/Pointer Load (get_rmt == 0/get_des_get_tail == 0)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_52_63:12;
|
||||
/*
|
||||
* set when there is one or more POW entries on the
|
||||
@ -791,12 +968,28 @@ typedef union {
|
||||
* the input Q list selected by qosgrp.
|
||||
*/
|
||||
uint64_t loc_tail:11;
|
||||
#else
|
||||
uint64_t loc_tail:11;
|
||||
uint64_t reserved_11:1;
|
||||
uint64_t loc_head:11;
|
||||
uint64_t reserved_23:1;
|
||||
uint64_t loc_one:1;
|
||||
uint64_t loc_val:1;
|
||||
uint64_t free_tail:11;
|
||||
uint64_t reserved_37:1;
|
||||
uint64_t free_head:11;
|
||||
uint64_t reserved_49:1;
|
||||
uint64_t free_one:1;
|
||||
uint64_t free_val:1;
|
||||
uint64_t reserved_52_63:12;
|
||||
#endif
|
||||
} sindexload0;
|
||||
|
||||
/**
|
||||
* Result For POW Index/Pointer Load (get_rmt == 0/get_des_get_tail == 1)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_52_63:12;
|
||||
/*
|
||||
* set when there is one or more POW entries on the
|
||||
@ -843,12 +1036,28 @@ typedef union {
|
||||
* head on the descheduled list selected by qosgrp.
|
||||
*/
|
||||
uint64_t des_tail:11;
|
||||
#else
|
||||
uint64_t des_tail:11;
|
||||
uint64_t reserved_11:1;
|
||||
uint64_t des_head:11;
|
||||
uint64_t reserved_23:1;
|
||||
uint64_t des_one:1;
|
||||
uint64_t des_val:1;
|
||||
uint64_t nosched_tail:11;
|
||||
uint64_t reserved_37:1;
|
||||
uint64_t nosched_head:11;
|
||||
uint64_t reserved_49:1;
|
||||
uint64_t nosched_one:1;
|
||||
uint64_t nosched_val:1;
|
||||
uint64_t reserved_52_63:12;
|
||||
#endif
|
||||
} sindexload1;
|
||||
|
||||
/**
|
||||
* Result For POW Index/Pointer Load (get_rmt == 1/get_des_get_tail == 0)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_39_63:25;
|
||||
/*
|
||||
* Set when this DRAM list is the current head
|
||||
@ -877,6 +1086,13 @@ typedef union {
|
||||
* qosgrp.
|
||||
*/
|
||||
uint64_t rmt_head:36;
|
||||
#else
|
||||
uint64_t rmt_head:36;
|
||||
uint64_t rmt_one:1;
|
||||
uint64_t rmt_val:1;
|
||||
uint64_t rmt_is_head:1;
|
||||
uint64_t reserved_39_63:25;
|
||||
#endif
|
||||
} sindexload2;
|
||||
|
||||
/**
|
||||
@ -884,6 +1100,7 @@ typedef union {
|
||||
* 1/get_des_get_tail == 1)
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t reserved_39_63:25;
|
||||
/*
|
||||
* set when this DRAM list is the current head
|
||||
@ -912,12 +1129,20 @@ typedef union {
|
||||
* qosgrp.
|
||||
*/
|
||||
uint64_t rmt_tail:36;
|
||||
#else
|
||||
uint64_t rmt_tail:36;
|
||||
uint64_t rmt_one:1;
|
||||
uint64_t rmt_val:1;
|
||||
uint64_t rmt_is_head:1;
|
||||
uint64_t reserved_39_63:25;
|
||||
#endif
|
||||
} sindexload3;
|
||||
|
||||
/**
|
||||
* Response to NULL_RD request loads
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t unused:62;
|
||||
/* of type cvmx_pow_tag_type_t. state is one of the
|
||||
* following:
|
||||
@ -928,6 +1153,10 @@ typedef union {
|
||||
* - CVMX_POW_TAG_TYPE_NULL_NULL
|
||||
*/
|
||||
uint64_t state:2;
|
||||
#else
|
||||
uint64_t state:2;
|
||||
uint64_t unused:62;
|
||||
#endif
|
||||
} s_null_rd;
|
||||
|
||||
} cvmx_pow_tag_load_resp_t;
|
||||
@ -962,6 +1191,7 @@ typedef union {
|
||||
uint64_t u64;
|
||||
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
/* Memory region. Should be CVMX_IO_SEG in most cases */
|
||||
uint64_t mem_reg:2;
|
||||
uint64_t reserved_49_61:13; /* Must be zero */
|
||||
@ -971,6 +1201,14 @@ typedef union {
|
||||
uint64_t reserved_36_39:4; /* Must be zero */
|
||||
/* Address field. addr<2:0> must be zero */
|
||||
uint64_t addr:36;
|
||||
#else
|
||||
uint64_t addr:36;
|
||||
uint64_t reserved_36_39:4;
|
||||
uint64_t did:8;
|
||||
uint64_t is_io:1;
|
||||
uint64_t reserved_49_61:13;
|
||||
uint64_t mem_reg:2;
|
||||
#endif
|
||||
} stag;
|
||||
} cvmx_pow_tag_store_addr_t;
|
||||
|
||||
@ -981,6 +1219,7 @@ typedef union {
|
||||
uint64_t u64;
|
||||
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
/*
|
||||
* the (64-bit word) location in scratchpad to write
|
||||
* to (if len != 0)
|
||||
@ -994,6 +1233,14 @@ typedef union {
|
||||
/* if set, don't return load response until work is available */
|
||||
uint64_t wait:1;
|
||||
uint64_t unused2:3;
|
||||
#else
|
||||
uint64_t unused2:3;
|
||||
uint64_t wait:1;
|
||||
uint64_t unused:36;
|
||||
uint64_t did:8;
|
||||
uint64_t len:8;
|
||||
uint64_t scraddr:8;
|
||||
#endif
|
||||
} s;
|
||||
|
||||
} cvmx_pow_iobdma_store_t;
|
||||
|
@ -57,6 +57,7 @@ typedef union {
|
||||
|
||||
/* Use this struct if the hardware determines that the packet is IP */
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
/* HW sets this to the number of buffers used by this packet */
|
||||
uint64_t bufs:8;
|
||||
/* HW sets to the number of L2 bytes prior to the IP */
|
||||
@ -166,13 +167,45 @@ typedef union {
|
||||
* the slow path */
|
||||
/* type is cvmx_pip_err_t */
|
||||
uint64_t err_code:8;
|
||||
#else
|
||||
uint64_t err_code:8;
|
||||
uint64_t rcv_error:1;
|
||||
uint64_t not_IP:1;
|
||||
uint64_t is_mcast:1;
|
||||
uint64_t is_bcast:1;
|
||||
uint64_t IP_exc:1;
|
||||
uint64_t is_frag:1;
|
||||
uint64_t L4_error:1;
|
||||
uint64_t software:1;
|
||||
uint64_t is_v6:1;
|
||||
uint64_t dec_ipsec:1;
|
||||
uint64_t tcp_or_udp:1;
|
||||
uint64_t dec_ipcomp:1;
|
||||
uint64_t unassigned2:4;
|
||||
uint64_t unassigned2a:4;
|
||||
uint64_t pr:4;
|
||||
uint64_t vlan_id:12;
|
||||
uint64_t vlan_cfi:1;
|
||||
uint64_t unassigned:1;
|
||||
uint64_t vlan_stacked:1;
|
||||
uint64_t vlan_valid:1;
|
||||
uint64_t ip_offset:8;
|
||||
uint64_t bufs:8;
|
||||
#endif
|
||||
} s;
|
||||
|
||||
/* use this to get at the 16 vlan bits */
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
uint64_t unused1:16;
|
||||
uint64_t vlan:16;
|
||||
uint64_t unused2:32;
|
||||
#else
|
||||
uint64_t unused2:32;
|
||||
uint64_t vlan:16;
|
||||
uint64_t unused1:16;
|
||||
|
||||
#endif
|
||||
} svlan;
|
||||
|
||||
/*
|
||||
@ -180,6 +213,7 @@ typedef union {
|
||||
* the packet is ip.
|
||||
*/
|
||||
struct {
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
/*
|
||||
* HW sets this to the number of buffers used by this
|
||||
* packet.
|
||||
@ -296,6 +330,27 @@ typedef union {
|
||||
*/
|
||||
/* type is cvmx_pip_err_t (union, so can't use directly */
|
||||
uint64_t err_code:8;
|
||||
#else
|
||||
uint64_t err_code:8;
|
||||
uint64_t rcv_error:1;
|
||||
uint64_t not_IP:1;
|
||||
uint64_t is_mcast:1;
|
||||
uint64_t is_bcast:1;
|
||||
uint64_t is_arp:1;
|
||||
uint64_t is_rarp:1;
|
||||
uint64_t unassigned3:1;
|
||||
uint64_t software:1;
|
||||
uint64_t unassigned2:4;
|
||||
uint64_t unassigned2a:8;
|
||||
uint64_t pr:4;
|
||||
uint64_t vlan_id:12;
|
||||
uint64_t vlan_cfi:1;
|
||||
uint64_t unassigned:1;
|
||||
uint64_t vlan_stacked:1;
|
||||
uint64_t vlan_valid:1;
|
||||
uint64_t unused:8;
|
||||
uint64_t bufs:8;
|
||||
#endif
|
||||
} snoip;
|
||||
|
||||
} cvmx_pip_wqe_word2;
|
||||
@ -312,6 +367,7 @@ typedef struct {
|
||||
* HW WRITE: the following 64 bits are filled by HW when a packet arrives
|
||||
*/
|
||||
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
/**
|
||||
* raw chksum result generated by the HW
|
||||
*/
|
||||
@ -327,12 +383,18 @@ typedef struct {
|
||||
* (Only 36 bits used in Octeon 1)
|
||||
*/
|
||||
uint64_t next_ptr:40;
|
||||
#else
|
||||
uint64_t next_ptr:40;
|
||||
uint8_t unused;
|
||||
uint16_t hw_chksum;
|
||||
#endif
|
||||
|
||||
/*****************************************************************
|
||||
* WORD 1
|
||||
* HW WRITE: the following 64 bits are filled by HW when a packet arrives
|
||||
*/
|
||||
|
||||
#ifdef __BIG_ENDIAN_BITFIELD
|
||||
/**
|
||||
* HW sets to the total number of bytes in the packet
|
||||
*/
|
||||
@ -359,6 +421,15 @@ typedef struct {
|
||||
* the synchronization/ordering tag
|
||||
*/
|
||||
uint64_t tag:32;
|
||||
#else
|
||||
uint64_t tag:32;
|
||||
uint64_t tag_type:2;
|
||||
uint64_t zero_2:1;
|
||||
uint64_t grp:4;
|
||||
uint64_t qos:3;
|
||||
uint64_t ipprt:6;
|
||||
uint64_t len:16;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* WORD 2 HW WRITE: the following 64-bits are filled in by
|
||||
|
Loading…
Reference in New Issue
Block a user