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nvmem: qfprom: Fix up qfprom_disable_fuse_blowing() ordering

qfprom_disable_fuse_blowing() disables a bunch of resources,
and then does a few register writes in the 'conf' address
space.
It works perhaps because the resources are needed only for the
'raw' register space writes, and that the 'conf' space allows
read/writes regardless.
However that makes the code look confusing, so just move the
register writes before turning off the resources in the
function.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20210806085947.22682-3-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Rajendra Nayak 2021-08-06 09:59:45 +01:00 committed by Greg Kroah-Hartman
parent cca5644c05
commit 11c4b3e264

View File

@ -139,6 +139,9 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
{
int ret;
writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
/*
* This may be a shared rail and may be able to run at a lower rate
* when we're not blowing fuses. At the moment, the regulator framework
@ -159,9 +162,6 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
"Failed to set clock rate for disable (ignoring)\n");
clk_disable_unprepare(priv->secclk);
writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
}
/**