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iio: adc: stm32-dfsdm: add support for buffer modes
DFSDM conversions can be launched continuously, or using various triggers: - by software - hardware triggers (e.g. like in stm32-adc: TIM, LPTIM, EXTI) - synchronously with DFSDM filter 0. e.g. for filters 1, 2 Launching conversions can be done using two methods: a - injected: - scan mode can be used to convert several channels each time a trigger occurs. - When not is scan mode, channels are converted in sequence, one upon each trigger. b - regular: - supports software triggers or synchronous with filter 0 - single or continuous conversions This patch finalizes DFSDM operating modes using IIO buffer modes: - INDIO_BUFFER_SOFTWARE: regular continuous conversions (no trigger) but limited to 1 channel. Users must set sampling frequency in this case. For filters > 1, conversions can be started synchronously with filter 0. - INDIO_BUFFER_TRIGGERED: triggered conversions uses injected mode for launching conversions. DFSDM can use hardware triggers (e.g. STM32 timer or lptimer), so add INDIO_HARDWARE_TRIGGERED to supported modes. - INDIO_DIRECT_MODE: Only support DMA-based buffer modes. In case no DMA is available, only support single conversions. From userland perspective, to summarize various use cases: 1 - single conversion on any filter: $ cd iio:deviceX $ cat in_voltageY_raw This uses regular a conversion (not continuous) 2 - Using sampling frequency without trigger (single channel, buffer) $ cd iio:deviceX $ echo 100 > sampling_frequency $ echo "" > trigger/current_trigger $ echo 1 > scan_elements/in_voltageY_en $ echo 1 > buffer/enable This uses regular conversion in continuous mode (Frequency is achieved by tuning filter parameters) 3 - sync mode with filter 0: other filters can be converted when using "st,filter0-sync" dt property. The conversions will get started at the same time as filter 0. So for any filters > 1: $ cd iio:deviceX $ echo 100 > sampling_frequency $ echo "" > trigger/current_trigger $ echo 1 > scan_elements/in_voltageY_en $ echo 1 > buffer/enable Then start filter 0 as in 2 above. 4 - Using a hardware trigger (with one channel): - check trigger, configure it: $ cat /sys/bus/iio/devices/trigger1/name tim6_trgo $ echo 100 > /sys/bus/iio/devices/trigger1/sampling_frequency - go to any filter: $ echo 1 > scan_elements/in_voltageY_en $ echo tim6_trgo > trigger/current_trigger $ echo 1 > buffer/enable This uses injected conversion as it uses a hardware trigger (without scan) 5 - Using a hardware trigger (with 2+ channel): Same as in 4/ above, but enable two or more channels in scan_elements. This uses injected conversion as it uses a hardware trigger (with scan mode) Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
parent
a6096762e9
commit
11646e81d7
@ -12,6 +12,11 @@
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#include <linux/iio/buffer.h>
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#include <linux/iio/hw-consumer.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/timer/stm32-lptim-trigger.h>
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#include <linux/iio/timer/stm32-timer-trigger.h>
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#include <linux/iio/trigger.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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@ -121,6 +126,61 @@ static int stm32_dfsdm_str2val(const char *str,
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return -EINVAL;
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}
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/**
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* struct stm32_dfsdm_trig_info - DFSDM trigger info
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* @name: name of the trigger, corresponding to its source
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* @jextsel: trigger signal selection
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*/
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struct stm32_dfsdm_trig_info {
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const char *name;
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unsigned int jextsel;
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};
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/* hardware injected trigger enable, edge selection */
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enum stm32_dfsdm_jexten {
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STM32_DFSDM_JEXTEN_DISABLED,
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STM32_DFSDM_JEXTEN_RISING_EDGE,
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STM32_DFSDM_JEXTEN_FALLING_EDGE,
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STM32_DFSDM_EXTEN_BOTH_EDGES,
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};
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static const struct stm32_dfsdm_trig_info stm32_dfsdm_trigs[] = {
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{ TIM1_TRGO, 0 },
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{ TIM1_TRGO2, 1 },
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{ TIM8_TRGO, 2 },
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{ TIM8_TRGO2, 3 },
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{ TIM3_TRGO, 4 },
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{ TIM4_TRGO, 5 },
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{ TIM16_OC1, 6 },
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{ TIM6_TRGO, 7 },
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{ TIM7_TRGO, 8 },
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{ LPTIM1_OUT, 26 },
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{ LPTIM2_OUT, 27 },
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{ LPTIM3_OUT, 28 },
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{},
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};
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static int stm32_dfsdm_get_jextsel(struct iio_dev *indio_dev,
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struct iio_trigger *trig)
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{
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int i;
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/* lookup triggers registered by stm32 timer trigger driver */
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for (i = 0; stm32_dfsdm_trigs[i].name; i++) {
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/**
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* Checking both stm32 timer trigger type and trig name
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* should be safe against arbitrary trigger names.
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*/
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if ((is_stm32_timer_trigger(trig) ||
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is_stm32_lptim_trigger(trig)) &&
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!strcmp(stm32_dfsdm_trigs[i].name, trig->name)) {
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return stm32_dfsdm_trigs[i].jextsel;
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}
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}
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return -EINVAL;
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}
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static int stm32_dfsdm_set_osrs(struct stm32_dfsdm_filter *fl,
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unsigned int fast, unsigned int oversamp)
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{
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@ -265,7 +325,8 @@ static int stm32_dfsdm_chan_configure(struct stm32_dfsdm *dfsdm,
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}
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static int stm32_dfsdm_start_filter(struct stm32_dfsdm_adc *adc,
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unsigned int fl_id)
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unsigned int fl_id,
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struct iio_trigger *trig)
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{
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struct stm32_dfsdm *dfsdm = adc->dfsdm;
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int ret;
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@ -277,7 +338,7 @@ static int stm32_dfsdm_start_filter(struct stm32_dfsdm_adc *adc,
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return ret;
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/* Nothing more to do for injected (scan mode/triggered) conversions */
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if (adc->nconv > 1)
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if (adc->nconv > 1 || trig)
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return 0;
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/* Software start (single or continuous) regular conversion */
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@ -294,8 +355,38 @@ static void stm32_dfsdm_stop_filter(struct stm32_dfsdm *dfsdm,
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DFSDM_CR1_DFEN_MASK, DFSDM_CR1_DFEN(0));
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}
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static int stm32_dfsdm_filter_set_trig(struct stm32_dfsdm_adc *adc,
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unsigned int fl_id,
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struct iio_trigger *trig)
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{
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struct iio_dev *indio_dev = iio_priv_to_dev(adc);
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struct regmap *regmap = adc->dfsdm->regmap;
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u32 jextsel = 0, jexten = STM32_DFSDM_JEXTEN_DISABLED;
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int ret;
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if (trig) {
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ret = stm32_dfsdm_get_jextsel(indio_dev, trig);
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if (ret < 0)
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return ret;
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/* set trigger source and polarity (default to rising edge) */
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jextsel = ret;
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jexten = STM32_DFSDM_JEXTEN_RISING_EDGE;
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}
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ret = regmap_update_bits(regmap, DFSDM_CR1(fl_id),
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DFSDM_CR1_JEXTSEL_MASK | DFSDM_CR1_JEXTEN_MASK,
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DFSDM_CR1_JEXTSEL(jextsel) |
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DFSDM_CR1_JEXTEN(jexten));
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if (ret < 0)
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return ret;
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return 0;
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}
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static int stm32_dfsdm_filter_configure(struct stm32_dfsdm_adc *adc,
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unsigned int fl_id)
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unsigned int fl_id,
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struct iio_trigger *trig)
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{
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struct iio_dev *indio_dev = iio_priv_to_dev(adc);
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struct regmap *regmap = adc->dfsdm->regmap;
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@ -322,6 +413,10 @@ static int stm32_dfsdm_filter_configure(struct stm32_dfsdm_adc *adc,
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if (ret)
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return ret;
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ret = stm32_dfsdm_filter_set_trig(adc, fl_id, trig);
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if (ret)
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return ret;
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/*
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* DFSDM modes configuration W.R.T audio/iio type modes
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* ----------------------------------------------------------------
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@ -341,7 +436,7 @@ static int stm32_dfsdm_filter_configure(struct stm32_dfsdm_adc *adc,
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* | | | | sync_mode |
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* ----------------------------------------------------------------
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*/
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if (adc->nconv == 1) {
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if (adc->nconv == 1 && !trig) {
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bit = __ffs(adc->smask);
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chan = indio_dev->channels + bit;
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@ -365,13 +460,15 @@ static int stm32_dfsdm_filter_configure(struct stm32_dfsdm_adc *adc,
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return ret;
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/* Use scan mode for multiple channels */
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cr1 = DFSDM_CR1_JSCAN(1);
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cr1 = DFSDM_CR1_JSCAN((adc->nconv > 1) ? 1 : 0);
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/*
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* Continuous conversions not supported in injected mode:
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* - use conversions in sync with filter 0
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* Continuous conversions not supported in injected mode,
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* either use:
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* - conversions in sync with filter 0
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* - triggered conversions
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*/
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if (!fl->sync_mode)
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if (!fl->sync_mode && !trig)
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return -EINVAL;
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cr1 |= DFSDM_CR1_JSYNC(fl->sync_mode);
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}
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@ -503,7 +600,8 @@ static ssize_t dfsdm_adc_audio_set_spiclk(struct iio_dev *indio_dev,
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return len;
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}
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static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc)
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static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc,
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struct iio_trigger *trig)
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{
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struct regmap *regmap = adc->dfsdm->regmap;
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int ret;
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@ -512,11 +610,11 @@ static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc)
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if (ret < 0)
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return ret;
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ret = stm32_dfsdm_filter_configure(adc, adc->fl_id);
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ret = stm32_dfsdm_filter_configure(adc, adc->fl_id, trig);
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if (ret < 0)
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goto stop_channels;
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ret = stm32_dfsdm_start_filter(adc, adc->fl_id);
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ret = stm32_dfsdm_start_filter(adc, adc->fl_id, trig);
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if (ret < 0)
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goto filter_unconfigure;
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@ -548,6 +646,7 @@ static int stm32_dfsdm_set_watermark(struct iio_dev *indio_dev,
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{
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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unsigned int watermark = DFSDM_DMA_BUFFER_SIZE / 2;
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unsigned int rx_buf_sz = DFSDM_DMA_BUFFER_SIZE;
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/*
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* DMA cyclic transfers are used, buffer is split into two periods.
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@ -556,7 +655,7 @@ static int stm32_dfsdm_set_watermark(struct iio_dev *indio_dev,
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* - one buffer (period) driver pushed to ASoC side.
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*/
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watermark = min(watermark, val * (unsigned int)(sizeof(u32)));
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adc->buf_sz = watermark * 2;
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adc->buf_sz = min(rx_buf_sz, watermark * 2 * adc->nconv);
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return 0;
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}
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@ -586,13 +685,41 @@ static unsigned int stm32_dfsdm_adc_dma_residue(struct stm32_dfsdm_adc *adc)
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return 0;
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}
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static void stm32_dfsdm_audio_dma_buffer_done(void *data)
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static irqreturn_t stm32_dfsdm_adc_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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int available = stm32_dfsdm_adc_dma_residue(adc);
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while (available >= indio_dev->scan_bytes) {
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u32 *buffer = (u32 *)&adc->rx_buf[adc->bufi];
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iio_push_to_buffers_with_timestamp(indio_dev, buffer,
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pf->timestamp);
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available -= indio_dev->scan_bytes;
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adc->bufi += indio_dev->scan_bytes;
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if (adc->bufi >= adc->buf_sz)
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adc->bufi = 0;
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}
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static void stm32_dfsdm_dma_buffer_done(void *data)
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{
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struct iio_dev *indio_dev = data;
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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int available = stm32_dfsdm_adc_dma_residue(adc);
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size_t old_pos;
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if (indio_dev->currentmode & INDIO_BUFFER_TRIGGERED) {
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iio_trigger_poll_chained(indio_dev->trig);
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return;
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}
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/*
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* FIXME: In Kernel interface does not support cyclic DMA buffer,and
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* offers only an interface to push data samples per samples.
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@ -620,6 +747,9 @@ static void stm32_dfsdm_audio_dma_buffer_done(void *data)
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adc->bufi = 0;
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old_pos = 0;
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}
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/* regular iio buffer without trigger */
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if (adc->dev_data->type == DFSDM_IIO)
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iio_push_to_buffers(indio_dev, buffer);
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}
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if (adc->cb)
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adc->cb(&adc->rx_buf[old_pos], adc->bufi - old_pos,
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@ -643,7 +773,7 @@ static int stm32_dfsdm_adc_dma_start(struct iio_dev *indio_dev)
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dev_dbg(&indio_dev->dev, "%s size=%d watermark=%d\n", __func__,
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adc->buf_sz, adc->buf_sz / 2);
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if (adc->nconv == 1)
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if (adc->nconv == 1 && !indio_dev->trig)
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config.src_addr += DFSDM_RDATAR(adc->fl_id);
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else
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config.src_addr += DFSDM_JDATAR(adc->fl_id);
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@ -660,7 +790,7 @@ static int stm32_dfsdm_adc_dma_start(struct iio_dev *indio_dev)
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if (!desc)
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return -EBUSY;
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desc->callback = stm32_dfsdm_audio_dma_buffer_done;
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desc->callback = stm32_dfsdm_dma_buffer_done;
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desc->callback_param = indio_dev;
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cookie = dmaengine_submit(desc);
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@ -671,7 +801,7 @@ static int stm32_dfsdm_adc_dma_start(struct iio_dev *indio_dev)
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/* Issue pending DMA requests */
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dma_async_issue_pending(adc->dma_chan);
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if (adc->nconv == 1) {
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if (adc->nconv == 1 && !indio_dev->trig) {
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/* Enable regular DMA transfer*/
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ret = regmap_update_bits(adc->dfsdm->regmap,
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DFSDM_CR1(adc->fl_id),
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@ -726,13 +856,19 @@ static int stm32_dfsdm_postenable(struct iio_dev *indio_dev)
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struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
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int ret;
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if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) {
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ret = iio_triggered_buffer_postenable(indio_dev);
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if (ret < 0)
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return ret;
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}
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/* Reset adc buffer index */
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adc->bufi = 0;
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if (adc->hwc) {
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ret = iio_hw_consumer_enable(adc->hwc);
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if (ret < 0)
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return ret;
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goto err_predisable;
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}
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ret = stm32_dfsdm_start_dfsdm(adc->dfsdm);
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@ -745,7 +881,7 @@ static int stm32_dfsdm_postenable(struct iio_dev *indio_dev)
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goto stop_dfsdm;
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}
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ret = stm32_dfsdm_start_conv(adc);
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ret = stm32_dfsdm_start_conv(adc, indio_dev->trig);
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if (ret) {
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dev_err(&indio_dev->dev, "Can't start conversion\n");
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goto err_stop_dma;
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@ -760,6 +896,9 @@ stop_dfsdm:
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err_stop_hwc:
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if (adc->hwc)
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iio_hw_consumer_disable(adc->hwc);
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err_predisable:
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if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED)
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iio_triggered_buffer_predisable(indio_dev);
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return ret;
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}
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@ -777,6 +916,9 @@ static int stm32_dfsdm_predisable(struct iio_dev *indio_dev)
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if (adc->hwc)
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iio_hw_consumer_disable(adc->hwc);
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if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED)
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iio_triggered_buffer_predisable(indio_dev);
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return 0;
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}
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@ -856,7 +998,7 @@ static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev,
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adc->nconv = 1;
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adc->smask = BIT(chan->scan_index);
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ret = stm32_dfsdm_start_conv(adc);
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ret = stm32_dfsdm_start_conv(adc, NULL);
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if (ret < 0) {
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regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR2(adc->fl_id),
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DFSDM_CR2_REOCIE_MASK, DFSDM_CR2_REOCIE(0));
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@ -978,6 +1120,12 @@ static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev,
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return -EINVAL;
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}
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static int stm32_dfsdm_validate_trigger(struct iio_dev *indio_dev,
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struct iio_trigger *trig)
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{
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return stm32_dfsdm_get_jextsel(indio_dev, trig) < 0 ? -EINVAL : 0;
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}
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static const struct iio_info stm32_dfsdm_info_audio = {
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.hwfifo_set_watermark = stm32_dfsdm_set_watermark,
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.read_raw = stm32_dfsdm_read_raw,
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@ -986,9 +1134,11 @@ static const struct iio_info stm32_dfsdm_info_audio = {
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};
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static const struct iio_info stm32_dfsdm_info_adc = {
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.hwfifo_set_watermark = stm32_dfsdm_set_watermark,
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.read_raw = stm32_dfsdm_read_raw,
|
||||
.write_raw = stm32_dfsdm_write_raw,
|
||||
.update_scan_mode = stm32_dfsdm_update_scan_mode,
|
||||
.validate_trigger = stm32_dfsdm_validate_trigger,
|
||||
};
|
||||
|
||||
static irqreturn_t stm32_dfsdm_irq(int irq, void *arg)
|
||||
@ -1061,6 +1211,9 @@ static int stm32_dfsdm_dma_request(struct iio_dev *indio_dev)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
|
||||
indio_dev->setup_ops = &stm32_dfsdm_buffer_setup_ops;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1082,7 +1235,8 @@ static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev,
|
||||
* IIO_CHAN_INFO_OVERSAMPLING_RATIO: used to set oversampling
|
||||
*/
|
||||
ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
|
||||
ch->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
|
||||
ch->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) |
|
||||
BIT(IIO_CHAN_INFO_SAMP_FREQ);
|
||||
|
||||
if (adc->dev_data->type == DFSDM_AUDIO) {
|
||||
ch->scan_type.sign = 's';
|
||||
@ -1104,9 +1258,6 @@ static int stm32_dfsdm_audio_init(struct iio_dev *indio_dev)
|
||||
struct stm32_dfsdm_channel *d_ch;
|
||||
int ret;
|
||||
|
||||
indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
|
||||
indio_dev->setup_ops = &stm32_dfsdm_buffer_setup_ops;
|
||||
|
||||
ch = devm_kzalloc(&indio_dev->dev, sizeof(*ch), GFP_KERNEL);
|
||||
if (!ch)
|
||||
return -ENOMEM;
|
||||
@ -1174,6 +1325,25 @@ static int stm32_dfsdm_adc_init(struct iio_dev *indio_dev)
|
||||
|
||||
init_completion(&adc->completion);
|
||||
|
||||
/* Optionally request DMA */
|
||||
if (stm32_dfsdm_dma_request(indio_dev)) {
|
||||
dev_dbg(&indio_dev->dev, "No DMA support\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
ret = iio_triggered_buffer_setup(indio_dev,
|
||||
&iio_pollfunc_store_time,
|
||||
&stm32_dfsdm_adc_trigger_handler,
|
||||
&stm32_dfsdm_buffer_setup_ops);
|
||||
if (ret) {
|
||||
stm32_dfsdm_dma_release(indio_dev);
|
||||
dev_err(&indio_dev->dev, "buffer setup failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* lptimer/timer hardware triggers */
|
||||
indio_dev->modes |= INDIO_HARDWARE_TRIGGERED;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1221,7 +1391,7 @@ static int stm32_dfsdm_adc_probe(struct platform_device *pdev)
|
||||
|
||||
iio->dev.parent = dev;
|
||||
iio->dev.of_node = np;
|
||||
iio->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
|
||||
iio->modes = INDIO_DIRECT_MODE;
|
||||
|
||||
platform_set_drvdata(pdev, adc);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user