mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-26 22:24:09 +08:00
usb: musb: remove some register access wrapper functions
The following wrappers were defined because of Blackfin support. Now Blackfin support is removed, these wrappers are no longer needed, so remove them. musb_write_txfifosz musb_write_txfifoadd musb_write_rxfifosz musb_write_rxfifoadd musb_write_ulpi_buscontrol musb_read_txfifosz musb_read_txfifoadd musb_read_rxfifosz musb_read_rxfifoadd musb_read_ulpi_buscontrol musb_read_hwvers Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
53e1657a1c
commit
113ad151cf
@ -1240,25 +1240,25 @@ fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep,
|
||||
/* REVISIT error check: be sure ep0 can both rx and tx ... */
|
||||
switch (cfg->style) {
|
||||
case FIFO_TX:
|
||||
musb_write_txfifosz(mbase, c_size);
|
||||
musb_write_txfifoadd(mbase, c_off);
|
||||
musb_writeb(mbase, MUSB_TXFIFOSZ, c_size);
|
||||
musb_writew(mbase, MUSB_TXFIFOADD, c_off);
|
||||
hw_ep->tx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
|
||||
hw_ep->max_packet_sz_tx = maxpacket;
|
||||
break;
|
||||
case FIFO_RX:
|
||||
musb_write_rxfifosz(mbase, c_size);
|
||||
musb_write_rxfifoadd(mbase, c_off);
|
||||
musb_writeb(mbase, MUSB_RXFIFOSZ, c_size);
|
||||
musb_writew(mbase, MUSB_RXFIFOADD, c_off);
|
||||
hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
|
||||
hw_ep->max_packet_sz_rx = maxpacket;
|
||||
break;
|
||||
case FIFO_RXTX:
|
||||
musb_write_txfifosz(mbase, c_size);
|
||||
musb_write_txfifoadd(mbase, c_off);
|
||||
musb_writeb(mbase, MUSB_TXFIFOSZ, c_size);
|
||||
musb_writew(mbase, MUSB_TXFIFOADD, c_off);
|
||||
hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
|
||||
hw_ep->max_packet_sz_rx = maxpacket;
|
||||
|
||||
musb_write_rxfifosz(mbase, c_size);
|
||||
musb_write_rxfifoadd(mbase, c_off);
|
||||
musb_writeb(mbase, MUSB_RXFIFOSZ, c_size);
|
||||
musb_writew(mbase, MUSB_RXFIFOADD, c_off);
|
||||
hw_ep->tx_double_buffered = hw_ep->rx_double_buffered;
|
||||
hw_ep->max_packet_sz_tx = maxpacket;
|
||||
|
||||
@ -1466,7 +1466,7 @@ static int musb_core_init(u16 musb_type, struct musb *musb)
|
||||
}
|
||||
|
||||
/* log release info */
|
||||
musb->hwvers = musb_read_hwvers(mbase);
|
||||
musb->hwvers = musb_readw(mbase, MUSB_HWVERS);
|
||||
pr_debug("%s: %sHDRC RTL version %d.%d%s\n",
|
||||
musb_driver_name, type, MUSB_HWVERS_MAJOR(musb->hwvers),
|
||||
MUSB_HWVERS_MINOR(musb->hwvers),
|
||||
@ -2311,9 +2311,9 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
||||
|
||||
/* program PHY to use external vBus if required */
|
||||
if (plat->extvbus) {
|
||||
u8 busctl = musb_read_ulpi_buscontrol(musb->mregs);
|
||||
u8 busctl = musb_readb(musb->mregs, MUSB_ULPI_BUSCONTROL);
|
||||
busctl |= MUSB_ULPI_USE_EXTVBUS;
|
||||
musb_write_ulpi_buscontrol(musb->mregs, busctl);
|
||||
musb_writeb(musb->mregs, MUSB_ULPI_BUSCONTROL, busctl);
|
||||
}
|
||||
|
||||
if (musb->xceiv->otg->default_a) {
|
||||
@ -2482,7 +2482,7 @@ static void musb_save_context(struct musb *musb)
|
||||
|
||||
musb->context.frame = musb_readw(musb_base, MUSB_FRAME);
|
||||
musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE);
|
||||
musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs);
|
||||
musb->context.busctl = musb_readb(musb_base, MUSB_ULPI_BUSCONTROL);
|
||||
musb->context.power = musb_readb(musb_base, MUSB_POWER);
|
||||
musb->context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE);
|
||||
musb->context.index = musb_readb(musb_base, MUSB_INDEX);
|
||||
@ -2511,13 +2511,13 @@ static void musb_save_context(struct musb *musb)
|
||||
|
||||
if (musb->dyn_fifo) {
|
||||
musb->context.index_regs[i].txfifoadd =
|
||||
musb_read_txfifoadd(musb_base);
|
||||
musb_readw(musb_base, MUSB_TXFIFOADD);
|
||||
musb->context.index_regs[i].rxfifoadd =
|
||||
musb_read_rxfifoadd(musb_base);
|
||||
musb_readw(musb_base, MUSB_RXFIFOADD);
|
||||
musb->context.index_regs[i].txfifosz =
|
||||
musb_read_txfifosz(musb_base);
|
||||
musb_readb(musb_base, MUSB_TXFIFOSZ);
|
||||
musb->context.index_regs[i].rxfifosz =
|
||||
musb_read_rxfifosz(musb_base);
|
||||
musb_readb(musb_base, MUSB_RXFIFOSZ);
|
||||
}
|
||||
|
||||
musb->context.index_regs[i].txtype =
|
||||
@ -2554,7 +2554,7 @@ static void musb_restore_context(struct musb *musb)
|
||||
|
||||
musb_writew(musb_base, MUSB_FRAME, musb->context.frame);
|
||||
musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode);
|
||||
musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl);
|
||||
musb_writeb(musb_base, MUSB_ULPI_BUSCONTROL, musb->context.busctl);
|
||||
|
||||
/* Don't affect SUSPENDM/RESUME bits in POWER reg */
|
||||
power = musb_readb(musb_base, MUSB_POWER);
|
||||
@ -2591,13 +2591,13 @@ static void musb_restore_context(struct musb *musb)
|
||||
musb->context.index_regs[i].rxcsr);
|
||||
|
||||
if (musb->dyn_fifo) {
|
||||
musb_write_txfifosz(musb_base,
|
||||
musb_writeb(musb_base, MUSB_TXFIFOSZ,
|
||||
musb->context.index_regs[i].txfifosz);
|
||||
musb_write_rxfifosz(musb_base,
|
||||
musb_writeb(musb_base, MUSB_RXFIFOSZ,
|
||||
musb->context.index_regs[i].rxfifosz);
|
||||
musb_write_txfifoadd(musb_base,
|
||||
musb_writew(musb_base, MUSB_TXFIFOADD,
|
||||
musb->context.index_regs[i].txfifoadd);
|
||||
musb_write_rxfifoadd(musb_base,
|
||||
musb_writew(musb_base, MUSB_RXFIFOADD,
|
||||
musb->context.index_regs[i].rxfifoadd);
|
||||
}
|
||||
|
||||
|
@ -273,67 +273,12 @@
|
||||
#define MUSB_RXHUBADDR 0x06
|
||||
#define MUSB_RXHUBPORT 0x07
|
||||
|
||||
static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size)
|
||||
{
|
||||
musb_writeb(mbase, MUSB_TXFIFOSZ, c_size);
|
||||
}
|
||||
|
||||
static inline void musb_write_txfifoadd(void __iomem *mbase, u16 c_off)
|
||||
{
|
||||
musb_writew(mbase, MUSB_TXFIFOADD, c_off);
|
||||
}
|
||||
|
||||
static inline void musb_write_rxfifosz(void __iomem *mbase, u8 c_size)
|
||||
{
|
||||
musb_writeb(mbase, MUSB_RXFIFOSZ, c_size);
|
||||
}
|
||||
|
||||
static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
|
||||
{
|
||||
musb_writew(mbase, MUSB_RXFIFOADD, c_off);
|
||||
}
|
||||
|
||||
static inline void musb_write_ulpi_buscontrol(void __iomem *mbase, u8 val)
|
||||
{
|
||||
musb_writeb(mbase, MUSB_ULPI_BUSCONTROL, val);
|
||||
}
|
||||
|
||||
static inline u8 musb_read_txfifosz(void __iomem *mbase)
|
||||
{
|
||||
return musb_readb(mbase, MUSB_TXFIFOSZ);
|
||||
}
|
||||
|
||||
static inline u16 musb_read_txfifoadd(void __iomem *mbase)
|
||||
{
|
||||
return musb_readw(mbase, MUSB_TXFIFOADD);
|
||||
}
|
||||
|
||||
static inline u8 musb_read_rxfifosz(void __iomem *mbase)
|
||||
{
|
||||
return musb_readb(mbase, MUSB_RXFIFOSZ);
|
||||
}
|
||||
|
||||
static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
|
||||
{
|
||||
return musb_readw(mbase, MUSB_RXFIFOADD);
|
||||
}
|
||||
|
||||
static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase)
|
||||
{
|
||||
return musb_readb(mbase, MUSB_ULPI_BUSCONTROL);
|
||||
}
|
||||
|
||||
static inline u8 musb_read_configdata(void __iomem *mbase)
|
||||
{
|
||||
musb_writeb(mbase, MUSB_INDEX, 0);
|
||||
return musb_readb(mbase, 0x10 + MUSB_CONFIGDATA);
|
||||
}
|
||||
|
||||
static inline u16 musb_read_hwvers(void __iomem *mbase)
|
||||
{
|
||||
return musb_readw(mbase, MUSB_HWVERS);
|
||||
}
|
||||
|
||||
static inline void musb_write_rxfunaddr(struct musb *musb, u8 epnum,
|
||||
u8 qh_addr_reg)
|
||||
{
|
||||
|
Loading…
Reference in New Issue
Block a user