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drm/radeon: Mark all possible functions / structs as static

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Let's allow GCC to optimize better.

This exposed some five unused functions, but this patch doesn't remove them.

Signed-off-by: Lauri Kasanen <cand@gmx.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lauri Kasanen 2012-08-31 13:43:50 -04:00 committed by Alex Deucher
parent b9ce0afeef
commit 1109ca09b9
27 changed files with 93 additions and 93 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/drm/radeon/atombios_encoders.c
View File

@ -2489,7 +2489,7 @@ static const struct drm_encoder_funcs radeon_atom_enc_funcs = {
.destroy = radeon_enc_destroy,
};
struct radeon_encoder_atom_dac *
static struct radeon_encoder_atom_dac *
radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder)
{
struct drm_device *dev = radeon_encoder->base.dev;
@ -2503,7 +2503,7 @@ radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder)
return dac;
}
struct radeon_encoder_atom_dig *
static struct radeon_encoder_atom_dig *
radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder)
{
int encoder_enum = (radeon_encoder->encoder_enum & ENUM_ID_MASK) >> ENUM_ID_SHIFT;

12
drivers/gpu/drm/radeon/evergreen.c
View File

@ -1121,7 +1121,7 @@ void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev)
}
}
int evergreen_pcie_gart_enable(struct radeon_device *rdev)
static int evergreen_pcie_gart_enable(struct radeon_device *rdev)
{
u32 tmp;
int r;
@ -1180,7 +1180,7 @@ int evergreen_pcie_gart_enable(struct radeon_device *rdev)
return 0;
}
void evergreen_pcie_gart_disable(struct radeon_device *rdev)
static void evergreen_pcie_gart_disable(struct radeon_device *rdev)
{
u32 tmp;
@ -1205,7 +1205,7 @@ void evergreen_pcie_gart_disable(struct radeon_device *rdev)
radeon_gart_table_vram_unpin(rdev);
}
void evergreen_pcie_gart_fini(struct radeon_device *rdev)
static void evergreen_pcie_gart_fini(struct radeon_device *rdev)
{
evergreen_pcie_gart_disable(rdev);
radeon_gart_table_vram_free(rdev);
@ -1213,7 +1213,7 @@ void evergreen_pcie_gart_fini(struct radeon_device *rdev)
}
void evergreen_agp_enable(struct radeon_device *rdev)
static void evergreen_agp_enable(struct radeon_device *rdev)
{
u32 tmp;
@ -1556,7 +1556,7 @@ static int evergreen_cp_start(struct radeon_device *rdev)
return 0;
}
int evergreen_cp_resume(struct radeon_device *rdev)
static int evergreen_cp_resume(struct radeon_device *rdev)
{
struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
u32 tmp;
@ -2709,7 +2709,7 @@ static void evergreen_irq_ack(struct radeon_device *rdev)
}
}
void evergreen_irq_disable(struct radeon_device *rdev)
static void evergreen_irq_disable(struct radeon_device *rdev)
{
r600_disable_interrupts(rdev);
/* Wait and acknowledge irq */

2
drivers/gpu/drm/radeon/evergreen_cs.c
View File

@ -995,7 +995,7 @@ static int evergreen_cs_track_check(struct radeon_cs_parser *p)
* Assume that chunk_ib_index is properly set. Will return -EINVAL
* if packet is bigger than remaining ib size. or if packets is unknown.
**/
int evergreen_cs_packet_parse(struct radeon_cs_parser *p,
static int evergreen_cs_packet_parse(struct radeon_cs_parser *p,
struct radeon_cs_packet *pkt,
unsigned idx)
{

8
drivers/gpu/drm/radeon/ni.c
View File

@ -726,7 +726,7 @@ void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev)
WREG32(VM_INVALIDATE_REQUEST, 1);
}
int cayman_pcie_gart_enable(struct radeon_device *rdev)
static int cayman_pcie_gart_enable(struct radeon_device *rdev)
{
int i, r;
@ -793,7 +793,7 @@ int cayman_pcie_gart_enable(struct radeon_device *rdev)
return 0;
}
void cayman_pcie_gart_disable(struct radeon_device *rdev)
static void cayman_pcie_gart_disable(struct radeon_device *rdev)
{
/* Disable all tables */
WREG32(VM_CONTEXT0_CNTL, 0);
@ -813,7 +813,7 @@ void cayman_pcie_gart_disable(struct radeon_device *rdev)
radeon_gart_table_vram_unpin(rdev);
}
void cayman_pcie_gart_fini(struct radeon_device *rdev)
static void cayman_pcie_gart_fini(struct radeon_device *rdev)
{
cayman_pcie_gart_disable(rdev);
radeon_gart_table_vram_free(rdev);
@ -1005,7 +1005,7 @@ static void cayman_cp_fini(struct radeon_device *rdev)
radeon_scratch_free(rdev, ring->rptr_save_reg);
}
int cayman_cp_resume(struct radeon_device *rdev)
static int cayman_cp_resume(struct radeon_device *rdev)
{
static const int ridx[] = {
RADEON_RING_TYPE_GFX_INDEX,

14
drivers/gpu/drm/radeon/r100.c
View File

@ -2513,7 +2513,7 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track
/*
* Global GPU functions
*/
void r100_errata(struct radeon_device *rdev)
static void r100_errata(struct radeon_device *rdev)
{
rdev->pll_errata = 0;
@ -2529,7 +2529,7 @@ void r100_errata(struct radeon_device *rdev)
}
/* Wait for vertical sync on primary CRTC */
void r100_gpu_wait_for_vsync(struct radeon_device *rdev)
static void r100_gpu_wait_for_vsync(struct radeon_device *rdev)
{
uint32_t crtc_gen_cntl, tmp;
int i;
@ -2551,7 +2551,7 @@ void r100_gpu_wait_for_vsync(struct radeon_device *rdev)
}
/* Wait for vertical sync on secondary CRTC */
void r100_gpu_wait_for_vsync2(struct radeon_device *rdev)
static void r100_gpu_wait_for_vsync2(struct radeon_device *rdev)
{
uint32_t crtc2_gen_cntl, tmp;
int i;
@ -2572,7 +2572,7 @@ void r100_gpu_wait_for_vsync2(struct radeon_device *rdev)
}
}
int r100_rbbm_fifo_wait_for_entry(struct radeon_device *rdev, unsigned n)
static int r100_rbbm_fifo_wait_for_entry(struct radeon_device *rdev, unsigned n)
{
unsigned i;
uint32_t tmp;
@ -2933,7 +2933,7 @@ void r100_vga_set_state(struct radeon_device *rdev, bool state)
WREG32(RADEON_CONFIG_CNTL, temp);
}
void r100_mc_init(struct radeon_device *rdev)
static void r100_mc_init(struct radeon_device *rdev)
{
u64 base;
@ -3005,7 +3005,7 @@ void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
r100_pll_errata_after_data(rdev);
}
void r100_set_safe_registers(struct radeon_device *rdev)
static void r100_set_safe_registers(struct radeon_device *rdev)
{
if (ASIC_IS_RN50(rdev)) {
rdev->config.r100.reg_safe_bm = rn50_reg_safe_bm;
@ -3947,7 +3947,7 @@ static void r100_mc_program(struct radeon_device *rdev)
r100_mc_resume(rdev, &save);
}
void r100_clock_startup(struct radeon_device *rdev)
static void r100_clock_startup(struct radeon_device *rdev)
{
u32 tmp;

4
drivers/gpu/drm/radeon/r300.c
View File

@ -296,7 +296,7 @@ void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
radeon_ring_unlock_commit(rdev, ring);
}
void r300_errata(struct radeon_device *rdev)
static void r300_errata(struct radeon_device *rdev)
{
rdev->pll_errata = 0;
@ -322,7 +322,7 @@ int r300_mc_wait_for_idle(struct radeon_device *rdev)
return -1;
}
void r300_gpu_init(struct radeon_device *rdev)
static void r300_gpu_init(struct radeon_device *rdev)
{
uint32_t gb_tile_config, tmp;

4
drivers/gpu/drm/radeon/r520.c
View File

@ -119,7 +119,7 @@ static void r520_vram_get_type(struct radeon_device *rdev)
rdev->mc.vram_width *= 2;
}
void r520_mc_init(struct radeon_device *rdev)
static void r520_mc_init(struct radeon_device *rdev)
{
r520_vram_get_type(rdev);
@ -131,7 +131,7 @@ void r520_mc_init(struct radeon_device *rdev)
radeon_update_bandwidth_info(rdev);
}
void r520_mc_program(struct radeon_device *rdev)
static void r520_mc_program(struct radeon_device *rdev)
{
struct rv515_mc_save save;

18
drivers/gpu/drm/radeon/r600.c
View File

@ -98,7 +98,7 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev);
/* r600,rv610,rv630,rv620,rv635,rv670 */
int r600_mc_wait_for_idle(struct radeon_device *rdev);
void r600_gpu_init(struct radeon_device *rdev);
static void r600_gpu_init(struct radeon_device *rdev);
void r600_fini(struct radeon_device *rdev);
void r600_irq_disable(struct radeon_device *rdev);
static void r600_pcie_gen2_enable(struct radeon_device *rdev);
@ -881,7 +881,7 @@ int r600_pcie_gart_init(struct radeon_device *rdev)
return radeon_gart_table_vram_alloc(rdev);
}
int r600_pcie_gart_enable(struct radeon_device *rdev)
static int r600_pcie_gart_enable(struct radeon_device *rdev)
{
u32 tmp;
int r, i;
@ -938,7 +938,7 @@ int r600_pcie_gart_enable(struct radeon_device *rdev)
return 0;
}
void r600_pcie_gart_disable(struct radeon_device *rdev)
static void r600_pcie_gart_disable(struct radeon_device *rdev)
{
u32 tmp;
int i;
@ -971,14 +971,14 @@ void r600_pcie_gart_disable(struct radeon_device *rdev)
radeon_gart_table_vram_unpin(rdev);
}
void r600_pcie_gart_fini(struct radeon_device *rdev)
static void r600_pcie_gart_fini(struct radeon_device *rdev)
{
radeon_gart_fini(rdev);
r600_pcie_gart_disable(rdev);
radeon_gart_table_vram_free(rdev);
}
void r600_agp_enable(struct radeon_device *rdev)
static void r600_agp_enable(struct radeon_device *rdev)
{
u32 tmp;
int i;
@ -1158,7 +1158,7 @@ static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc
}
}
int r600_mc_init(struct radeon_device *rdev)
static int r600_mc_init(struct radeon_device *rdev)
{
u32 tmp;
int chansize, numchan;
@ -1258,7 +1258,7 @@ void r600_vram_scratch_fini(struct radeon_device *rdev)
* reset, it's up to the caller to determine if the GPU needs one. We
* might add an helper function to check that.
*/
int r600_gpu_soft_reset(struct radeon_device *rdev)
static int r600_gpu_soft_reset(struct radeon_device *rdev)
{
struct rv515_mc_save save;
u32 grbm_busy_mask = S_008010_VC_BUSY(1) | S_008010_VGT_BUSY_NO_DMA(1) |
@ -1433,7 +1433,7 @@ int r600_count_pipe_bits(uint32_t val)
return ret;
}
void r600_gpu_init(struct radeon_device *rdev)
static void r600_gpu_init(struct radeon_device *rdev)
{
u32 tiling_config;
u32 ramcfg;
@ -2347,7 +2347,7 @@ void r600_clear_surface_reg(struct radeon_device *rdev, int reg)
/* FIXME: implement */
}
int r600_startup(struct radeon_device *rdev)
static int r600_startup(struct radeon_device *rdev)
{
struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
int r;

2
drivers/gpu/drm/radeon/r600_cs.c
View File

@ -847,7 +847,7 @@ static int r600_cs_track_check(struct radeon_cs_parser *p)
* Assume that chunk_ib_index is properly set. Will return -EINVAL
* if packet is bigger than remaining ib size. or if packets is unknown.
**/
int r600_cs_packet_parse(struct radeon_cs_parser *p,
static int r600_cs_packet_parse(struct radeon_cs_parser *p,
struct radeon_cs_packet *pkt,
unsigned idx)
{

2
drivers/gpu/drm/radeon/r600_hdmi.c
View File

@ -53,7 +53,7 @@ enum r600_hdmi_iec_status_bits {
AUDIO_STATUS_LEVEL = 0x80
};
struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = {
static const struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = {
/* 32kHz 44.1kHz 48kHz */
/* Clock N CTS N CTS N CTS */
{ 25174, 4576, 28125, 7007, 31250, 6864, 28125 }, /* 25,20/1.001 MHz */

2
drivers/gpu/drm/radeon/radeon_combios.c
View File

@ -3319,7 +3319,7 @@ static void combios_write_ram_size(struct drm_device *dev)
WREG32(RADEON_CONFIG_MEMSIZE, mem_size);
}
void radeon_combios_dyn_clk_setup(struct drm_device *dev, int enable)
static void radeon_combios_dyn_clk_setup(struct drm_device *dev, int enable)
{
uint16_t dyn_clk_info =
combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE);

28
drivers/gpu/drm/radeon/radeon_connectors.c
View File

@ -194,7 +194,7 @@ radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_c
}
}
struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
{
struct drm_mode_object *obj;
struct drm_encoder *encoder;
@ -215,7 +215,7 @@ struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int enc
return NULL;
}
struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
{
int enc_id = connector->encoder_ids[0];
struct drm_mode_object *obj;
@ -366,7 +366,7 @@ static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_conn
}
}
int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
uint64_t val)
{
struct drm_device *dev = connector->dev;
@ -687,13 +687,13 @@ static int radeon_lvds_set_property(struct drm_connector *connector,
}
struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
.get_modes = radeon_lvds_get_modes,
.mode_valid = radeon_lvds_mode_valid,
.best_encoder = radeon_best_single_encoder,
};
struct drm_connector_funcs radeon_lvds_connector_funcs = {
static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = radeon_lvds_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
@ -805,13 +805,13 @@ radeon_vga_detect(struct drm_connector *connector, bool force)
return ret;
}
struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
.get_modes = radeon_vga_get_modes,
.mode_valid = radeon_vga_mode_valid,
.best_encoder = radeon_best_single_encoder,
};
struct drm_connector_funcs radeon_vga_connector_funcs = {
static const struct drm_connector_funcs radeon_vga_connector_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = radeon_vga_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
@ -875,13 +875,13 @@ radeon_tv_detect(struct drm_connector *connector, bool force)
return ret;
}
struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
.get_modes = radeon_tv_get_modes,
.mode_valid = radeon_tv_mode_valid,
.best_encoder = radeon_best_single_encoder,
};
struct drm_connector_funcs radeon_tv_connector_funcs = {
static const struct drm_connector_funcs radeon_tv_connector_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = radeon_tv_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
@ -1085,7 +1085,7 @@ out:
}
/* okay need to be smart in here about which encoder to pick */
struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
{
int enc_id = connector->encoder_ids[0];
struct radeon_connector *radeon_connector = to_radeon_connector(connector);
@ -1175,13 +1175,13 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector,
return MODE_OK;
}
struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
.get_modes = radeon_dvi_get_modes,
.mode_valid = radeon_dvi_mode_valid,
.best_encoder = radeon_dvi_encoder,
};
struct drm_connector_funcs radeon_dvi_connector_funcs = {
static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = radeon_dvi_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
@ -1458,13 +1458,13 @@ static int radeon_dp_mode_valid(struct drm_connector *connector,
}
}
struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
.get_modes = radeon_dp_get_modes,
.mode_valid = radeon_dp_mode_valid,
.best_encoder = radeon_dvi_encoder,
};
struct drm_connector_funcs radeon_dp_connector_funcs = {
static const struct drm_connector_funcs radeon_dp_connector_funcs = {
.dpms = drm_helper_connector_dpms,
.detect = radeon_dp_detect,
.fill_modes = drm_helper_probe_single_connector_modes,

2
drivers/gpu/drm/radeon/radeon_cs.c
View File

@ -32,7 +32,7 @@
void r100_cs_dump_packet(struct radeon_cs_parser *p,
struct radeon_cs_packet *pkt);
int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
{
struct drm_device *ddev = p->rdev->ddev;
struct radeon_cs_chunk *chunk;

2
drivers/gpu/drm/radeon/radeon_device.c
View File

@ -842,7 +842,7 @@ static unsigned int radeon_vga_set_decode(void *cookie, bool state)
* Validates certain module parameters and updates
* the associated values used by the driver (all asics).
*/
void radeon_check_arguments(struct radeon_device *rdev)
static void radeon_check_arguments(struct radeon_device *rdev)
{
/* vramlimit must be a power of two */
switch (radeon_vram_limit) {

2
drivers/gpu/drm/radeon/radeon_fb.c
View File

@ -317,7 +317,7 @@ static int radeon_fb_find_or_create_single(struct drm_fb_helper *helper,
}
static char *mode_option;
int radeon_parse_options(char *options)
static int radeon_parse_options(char *options)
{
char *this_opt;

2
drivers/gpu/drm/radeon/radeon_fence.c
View File

@ -399,7 +399,7 @@ int radeon_fence_wait(struct radeon_fence *fence, bool intr)
return 0;
}
bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq)
static bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq)
{
unsigned i;

2
drivers/gpu/drm/radeon/radeon_ioc32.c
View File

@ -369,7 +369,7 @@ static int compat_radeon_cp_setparam(struct file *file, unsigned int cmd,
#define compat_radeon_cp_setparam NULL
#endif /* X86_64 || IA64 */
drm_ioctl_compat_t *radeon_compat_ioctls[] = {
static drm_ioctl_compat_t *radeon_compat_ioctls[] = {
[DRM_RADEON_CP_INIT] = compat_radeon_cp_init,
[DRM_RADEON_CLEAR] = compat_radeon_cp_clear,
[DRM_RADEON_STIPPLE] = compat_radeon_cp_stipple,

4
drivers/gpu/drm/radeon/radeon_legacy_crtc.c
View File

@ -206,7 +206,7 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
WREG32(RADEON_FP_CRTC_V_TOTAL_DISP, fp_crtc_v_total_disp);
}
void radeon_restore_common_regs(struct drm_device *dev)
static void radeon_restore_common_regs(struct drm_device *dev)
{
/* don't need this yet */
}
@ -295,7 +295,7 @@ static uint8_t radeon_compute_pll_gain(uint16_t ref_freq, uint16_t ref_div,
return 1;
}
void radeon_crtc_dpms(struct drm_crtc *crtc, int mode)
static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode)
{
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
struct drm_device *dev = crtc->dev;

8
drivers/gpu/drm/radeon/radeon_ring.c
View File

@ -43,7 +43,7 @@
* produce command buffers which are send to the kernel and
* put in IBs for execution by the requested ring.
*/
int radeon_debugfs_sa_init(struct radeon_device *rdev);
static int radeon_debugfs_sa_init(struct radeon_device *rdev);
/**
* radeon_ib_get - request an IB (Indirect Buffer)
@ -291,7 +291,7 @@ int radeon_ib_ring_tests(struct radeon_device *rdev)
* wptr. The GPU then starts fetching commands and executes
* them until the pointers are equal again.
*/
int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
/**
* radeon_ring_write - write a value to the ring
@ -819,7 +819,7 @@ static struct drm_info_list radeon_debugfs_sa_list[] = {
#endif
int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)
static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)
{
#if defined(CONFIG_DEBUG_FS)
unsigned i;
@ -839,7 +839,7 @@ int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *rin
return 0;
}
int radeon_debugfs_sa_init(struct radeon_device *rdev)
static int radeon_debugfs_sa_init(struct radeon_device *rdev)
{
#if defined(CONFIG_DEBUG_FS)
return radeon_debugfs_add_files(rdev, radeon_debugfs_sa_list, 1);

2
drivers/gpu/drm/radeon/radeon_test.c
View File

@ -313,7 +313,7 @@ out_cleanup:
printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
}
void radeon_test_ring_sync2(struct radeon_device *rdev,
static void radeon_test_ring_sync2(struct radeon_device *rdev,
struct radeon_ring *ringA,
struct radeon_ring *ringB,
struct radeon_ring *ringC)

2
drivers/gpu/drm/radeon/radeon_ttm.c
View File

@ -549,7 +549,7 @@ static struct ttm_backend_func radeon_backend_func = {
.destroy = &radeon_ttm_backend_destroy,
};
struct ttm_tt *radeon_ttm_tt_create(struct ttm_bo_device *bdev,
static struct ttm_tt *radeon_ttm_tt_create(struct ttm_bo_device *bdev,
unsigned long size, uint32_t page_flags,
struct page *dummy_read_page)
{

6
drivers/gpu/drm/radeon/rs400.c
View File

@ -242,7 +242,7 @@ int rs400_mc_wait_for_idle(struct radeon_device *rdev)
return -1;
}
void rs400_gpu_init(struct radeon_device *rdev)
static void rs400_gpu_init(struct radeon_device *rdev)
{
/* FIXME: is this correct ? */
r420_pipes_init(rdev);
@ -252,7 +252,7 @@ void rs400_gpu_init(struct radeon_device *rdev)
}
}
void rs400_mc_init(struct radeon_device *rdev)
static void rs400_mc_init(struct radeon_device *rdev)
{
u64 base;
@ -370,7 +370,7 @@ static int rs400_debugfs_pcie_gart_info_init(struct radeon_device *rdev)
#endif
}
void rs400_mc_program(struct radeon_device *rdev)
static void rs400_mc_program(struct radeon_device *rdev)
{
struct r100_mc_save save;

14
drivers/gpu/drm/radeon/rs600.c
View File

@ -43,7 +43,7 @@
#include "rs600_reg_safe.h"
void rs600_gpu_init(struct radeon_device *rdev);
static void rs600_gpu_init(struct radeon_device *rdev);
int rs600_mc_wait_for_idle(struct radeon_device *rdev);
static const u32 crtc_offsets[2] =
@ -432,7 +432,7 @@ void rs600_gart_tlb_flush(struct radeon_device *rdev)
tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
}
int rs600_gart_init(struct radeon_device *rdev)
static int rs600_gart_init(struct radeon_device *rdev)
{
int r;
@ -514,7 +514,7 @@ static int rs600_gart_enable(struct radeon_device *rdev)
return 0;
}
void rs600_gart_disable(struct radeon_device *rdev)
static void rs600_gart_disable(struct radeon_device *rdev)
{
u32 tmp;
@ -525,7 +525,7 @@ void rs600_gart_disable(struct radeon_device *rdev)
radeon_gart_table_vram_unpin(rdev);
}
void rs600_gart_fini(struct radeon_device *rdev)
static void rs600_gart_fini(struct radeon_device *rdev)
{
radeon_gart_fini(rdev);
rs600_gart_disable(rdev);
@ -753,7 +753,7 @@ int rs600_mc_wait_for_idle(struct radeon_device *rdev)
return -1;
}
void rs600_gpu_init(struct radeon_device *rdev)
static void rs600_gpu_init(struct radeon_device *rdev)
{
r420_pipes_init(rdev);
/* Wait for mc idle */
@ -761,7 +761,7 @@ void rs600_gpu_init(struct radeon_device *rdev)
dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");
}
void rs600_mc_init(struct radeon_device *rdev)
static void rs600_mc_init(struct radeon_device *rdev)
{
u64 base;
@ -823,7 +823,7 @@ void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
WREG32(R_000074_MC_IND_DATA, v);
}
void rs600_debugfs(struct radeon_device *rdev)
static void rs600_debugfs(struct radeon_device *rdev)
{
if (r100_debugfs_rbbm_init(rdev))
DRM_ERROR("Failed to register debugfs file for RBBM !\n");

6
drivers/gpu/drm/radeon/rs690.c
View File

@ -145,7 +145,7 @@ void rs690_pm_info(struct radeon_device *rdev)
rdev->pm.sideport_bandwidth.full = dfixed_div(rdev->pm.sideport_bandwidth, tmp);
}
void rs690_mc_init(struct radeon_device *rdev)
static void rs690_mc_init(struct radeon_device *rdev)
{
u64 base;
@ -224,7 +224,7 @@ struct rs690_watermark {
fixed20_12 sclk;
};
void rs690_crtc_bandwidth_compute(struct radeon_device *rdev,
static void rs690_crtc_bandwidth_compute(struct radeon_device *rdev,
struct radeon_crtc *crtc,
struct rs690_watermark *wm)
{
@ -581,7 +581,7 @@ void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
WREG32(R_000078_MC_INDEX, 0x7F);
}
void rs690_mc_program(struct radeon_device *rdev)
static void rs690_mc_program(struct radeon_device *rdev)
{
struct rv515_mc_save save;

18
drivers/gpu/drm/radeon/rv515.c
View File

@ -35,9 +35,9 @@
#include "rv515_reg_safe.h"
/* This files gather functions specifics to: rv515 */
int rv515_debugfs_pipes_info_init(struct radeon_device *rdev);
int rv515_debugfs_ga_info_init(struct radeon_device *rdev);
void rv515_gpu_init(struct radeon_device *rdev);
static int rv515_debugfs_pipes_info_init(struct radeon_device *rdev);
static int rv515_debugfs_ga_info_init(struct radeon_device *rdev);
static void rv515_gpu_init(struct radeon_device *rdev);
int rv515_mc_wait_for_idle(struct radeon_device *rdev);
void rv515_debugfs(struct radeon_device *rdev)
@ -143,7 +143,7 @@ void rv515_vga_render_disable(struct radeon_device *rdev)
RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL);
}
void rv515_gpu_init(struct radeon_device *rdev)
static void rv515_gpu_init(struct radeon_device *rdev)
{
unsigned pipe_select_current, gb_pipe_select, tmp;
@ -189,7 +189,7 @@ static void rv515_vram_get_type(struct radeon_device *rdev)
}
}
void rv515_mc_init(struct radeon_device *rdev)
static void rv515_mc_init(struct radeon_device *rdev)
{
rv515_vram_get_type(rdev);
@ -261,7 +261,7 @@ static struct drm_info_list rv515_ga_info_list[] = {
};
#endif
int rv515_debugfs_pipes_info_init(struct radeon_device *rdev)
static int rv515_debugfs_pipes_info_init(struct radeon_device *rdev)
{
#if defined(CONFIG_DEBUG_FS)
return radeon_debugfs_add_files(rdev, rv515_pipes_info_list, 1);
@ -270,7 +270,7 @@ int rv515_debugfs_pipes_info_init(struct radeon_device *rdev)
#endif
}
int rv515_debugfs_ga_info_init(struct radeon_device *rdev)
static int rv515_debugfs_ga_info_init(struct radeon_device *rdev)
{
#if defined(CONFIG_DEBUG_FS)
return radeon_debugfs_add_files(rdev, rv515_ga_info_list, 1);
@ -310,7 +310,7 @@ void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save)
WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control);
}
void rv515_mc_program(struct radeon_device *rdev)
static void rv515_mc_program(struct radeon_device *rdev)
{
struct rv515_mc_save save;
@ -787,7 +787,7 @@ struct rv515_watermark {
fixed20_12 sclk;
};
void rv515_crtc_bandwidth_compute(struct radeon_device *rdev,
static void rv515_crtc_bandwidth_compute(struct radeon_device *rdev,
struct radeon_crtc *crtc,
struct rv515_watermark *wm)
{

10
drivers/gpu/drm/radeon/rv770.c
View File

@ -124,7 +124,7 @@ void rv770_pm_misc(struct radeon_device *rdev)
/*
* GART
*/
int rv770_pcie_gart_enable(struct radeon_device *rdev)
static int rv770_pcie_gart_enable(struct radeon_device *rdev)
{
u32 tmp;
int r, i;
@ -175,7 +175,7 @@ int rv770_pcie_gart_enable(struct radeon_device *rdev)
return 0;
}
void rv770_pcie_gart_disable(struct radeon_device *rdev)
static void rv770_pcie_gart_disable(struct radeon_device *rdev)
{
u32 tmp;
int i;
@ -201,7 +201,7 @@ void rv770_pcie_gart_disable(struct radeon_device *rdev)
radeon_gart_table_vram_unpin(rdev);
}
void rv770_pcie_gart_fini(struct radeon_device *rdev)
static void rv770_pcie_gart_fini(struct radeon_device *rdev)
{
radeon_gart_fini(rdev);
rv770_pcie_gart_disable(rdev);
@ -209,7 +209,7 @@ void rv770_pcie_gart_fini(struct radeon_device *rdev)
}
void rv770_agp_enable(struct radeon_device *rdev)
static void rv770_agp_enable(struct radeon_device *rdev)
{
u32 tmp;
int i;
@ -839,7 +839,7 @@ void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
}
}
int rv770_mc_init(struct radeon_device *rdev)
static int rv770_mc_init(struct radeon_device *rdev)
{
u32 tmp;
int chansize, numchan;

6
drivers/gpu/drm/radeon/si.c
View File

@ -2364,7 +2364,7 @@ void si_pcie_gart_tlb_flush(struct radeon_device *rdev)
WREG32(VM_INVALIDATE_REQUEST, 1);
}
int si_pcie_gart_enable(struct radeon_device *rdev)
static int si_pcie_gart_enable(struct radeon_device *rdev)
{
int r, i;
@ -2437,7 +2437,7 @@ int si_pcie_gart_enable(struct radeon_device *rdev)
return 0;
}
void si_pcie_gart_disable(struct radeon_device *rdev)
static void si_pcie_gart_disable(struct radeon_device *rdev)
{
/* Disable all tables */
WREG32(VM_CONTEXT0_CNTL, 0);
@ -2456,7 +2456,7 @@ void si_pcie_gart_disable(struct radeon_device *rdev)
radeon_gart_table_vram_unpin(rdev);
}
void si_pcie_gart_fini(struct radeon_device *rdev)
static void si_pcie_gart_fini(struct radeon_device *rdev)
{
si_pcie_gart_disable(rdev);
radeon_gart_table_vram_free(rdev);