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x86, mm: fault.c, refactor/simplify the is_prefetch() code
Impact: no functionality changed Factor out the opcode checker into a helper inline. The code got a tiny bit smaller: text data bss dec hex filename 4632 32 24 4688 1250 fault.o.before 4618 32 24 4674 1242 fault.o.after And it got cleaner / easier to review as well. Cc: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -99,12 +99,58 @@ static inline int notify_page_fault(struct pt_regs *regs)
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*
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* Opcode checker based on code by Richard Brunner.
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*/
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static inline int
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check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr,
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unsigned char opcode, int *prefetch)
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{
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unsigned char instr_hi = opcode & 0xf0;
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unsigned char instr_lo = opcode & 0x0f;
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switch (instr_hi) {
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case 0x20:
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case 0x30:
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/*
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* Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
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* In X86_64 long mode, the CPU will signal invalid
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* opcode if some of these prefixes are present so
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* X86_64 will never get here anyway
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*/
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return ((instr_lo & 7) == 0x6);
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#ifdef CONFIG_X86_64
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case 0x40:
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/*
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* In AMD64 long mode 0x40..0x4F are valid REX prefixes
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* Need to figure out under what instruction mode the
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* instruction was issued. Could check the LDT for lm,
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* but for now it's good enough to assume that long
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* mode only uses well known segments or kernel.
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*/
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return (!user_mode(regs)) || (regs->cs == __USER_CS);
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#endif
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case 0x60:
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/* 0x64 thru 0x67 are valid prefixes in all modes. */
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return (instr_lo & 0xC) == 0x4;
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case 0xF0:
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/* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
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return !instr_lo || (instr_lo>>1) == 1;
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case 0x00:
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/* Prefetch instruction is 0x0F0D or 0x0F18 */
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if (probe_kernel_address(instr, opcode))
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return 0;
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*prefetch = (instr_lo == 0xF) &&
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(opcode == 0x0D || opcode == 0x18);
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return 0;
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default:
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return 0;
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}
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}
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static int
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is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr)
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{
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unsigned char *max_instr;
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unsigned char *instr;
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int scan_more = 1;
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int prefetch = 0;
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/*
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@ -114,68 +160,22 @@ is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr)
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if (error_code & PF_INSTR)
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return 0;
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instr = (unsigned char *)convert_ip_to_linear(current, regs);
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instr = (void *)convert_ip_to_linear(current, regs);
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max_instr = instr + 15;
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if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE)
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return 0;
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while (scan_more && instr < max_instr) {
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unsigned char instr_hi;
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unsigned char instr_lo;
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while (instr < max_instr) {
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unsigned char opcode;
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if (probe_kernel_address(instr, opcode))
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break;
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instr_hi = opcode & 0xf0;
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instr_lo = opcode & 0x0f;
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instr++;
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switch (instr_hi) {
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case 0x20:
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case 0x30:
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/*
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* Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
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* In X86_64 long mode, the CPU will signal invalid
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* opcode if some of these prefixes are present so
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* X86_64 will never get here anyway
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*/
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scan_more = ((instr_lo & 7) == 0x6);
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if (!check_prefetch_opcode(regs, instr, opcode, &prefetch))
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break;
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#ifdef CONFIG_X86_64
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case 0x40:
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/*
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* In AMD64 long mode 0x40..0x4F are valid REX prefixes
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* Need to figure out under what instruction mode the
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* instruction was issued. Could check the LDT for lm,
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* but for now it's good enough to assume that long
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* mode only uses well known segments or kernel.
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*/
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scan_more = (!user_mode(regs)) || (regs->cs == __USER_CS);
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break;
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#endif
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case 0x60:
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/* 0x64 thru 0x67 are valid prefixes in all modes. */
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scan_more = (instr_lo & 0xC) == 0x4;
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break;
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case 0xF0:
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/* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
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scan_more = !instr_lo || (instr_lo>>1) == 1;
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break;
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case 0x00:
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/* Prefetch instruction is 0x0F0D or 0x0F18 */
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scan_more = 0;
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if (probe_kernel_address(instr, opcode))
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break;
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prefetch = (instr_lo == 0xF) &&
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(opcode == 0x0D || opcode == 0x18);
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break;
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default:
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scan_more = 0;
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break;
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}
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}
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return prefetch;
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}
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