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tty: serial: 8250_dma: keep own book keeping about RX transfers
After dmaengine_terminate_all() has been invoked then both DMA drivers (edma and omap-dma) do not invoke dma_cookie_complete() to mark the transfer as complete. This dma_cookie_complete() is performed by the Synopsys DesignWare driver which is probably the only one that is used by omap8250-dma and hence don't see following problem… …which is that once a RX transfer has been terminated then following query of channel status reports DMA_IN_PROGRESS (again: the actual transfer has been canceled, there is nothing going on anymore). This means that serial8250_rx_dma() never enqueues another DMA transfer because it (wrongly) assumes that there is a transer already pending. Vinod Koul refuses to accept a patch which adds this dma_cookie_complete() to both drivers and so dmaengine_tx_status() would report DMA_COMPLETE instead (and behave like the Synopsys DesignWare driver already does). He argues that I am not allowed to use the cookie to query the status and that the driver already cleaned everything up after the invokation of dmaengine_terminate_all(). To end this I add a bookkeeping whether or not a RX-transfer has been started to the 8250-dma code. It has already been done for the TX side. *Now* we learn about the RX status based on our bookkeeping and don't need dmaengine_tx_status() for this anymore. Cc: vinod.koul@intel.com Reviewed-by: Tony Lindgren <tony@atomide.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -42,6 +42,7 @@ struct uart_8250_dma {
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unsigned char tx_running:1;
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unsigned char tx_err: 1;
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unsigned char rx_running:1;
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};
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struct old_serial_port {
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@ -61,6 +61,7 @@ static void __dma_rx_complete(void *param)
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dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr,
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dma->rx_size, DMA_FROM_DEVICE);
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dma->rx_running = 0;
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dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
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dmaengine_terminate_all(dma->rxchan);
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@ -123,10 +124,6 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
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{
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struct uart_8250_dma *dma = p->dma;
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struct dma_async_tx_descriptor *desc;
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struct dma_tx_state state;
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int dma_status;
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dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
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switch (iir & 0x3f) {
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case UART_IIR_RLSI:
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@ -137,7 +134,7 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
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* If RCVR FIFO trigger level was not reached, complete the
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* transfer and let 8250_core copy the remaining data.
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*/
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if (dma_status == DMA_IN_PROGRESS) {
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if (dma->rx_running) {
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dmaengine_pause(dma->rxchan);
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__dma_rx_complete(p);
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}
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@ -146,7 +143,7 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
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break;
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}
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if (dma_status)
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if (dma->rx_running)
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return 0;
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desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
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@ -155,6 +152,7 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
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if (!desc)
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return -EBUSY;
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dma->rx_running = 1;
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desc->callback = __dma_rx_complete;
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desc->callback_param = p;
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