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selftests/powerpc: Add ptrace tests for VSX, VMX registers
This patch adds ptrace interface test for VSX, VMX registers. This also adds ptrace interface based helper functions related to VSX, VMX registers access. This also adds some assembly helper functions related to VSX and VMX registers. Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Anshuman Khandual
Michael Ellerman
parent
01f7fdc7b9
commit
0da535c084
@ -130,3 +130,268 @@ FUNC_START(store_fpr_single_precision)
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stfs 31, 31*4(3)
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blr
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FUNC_END(store_fpr_single_precision)
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/* VMX/VSX registers - unsigned long buf[128] */
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FUNC_START(loadvsx)
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lis 4, 0
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LXVD2X (0,(4),(3))
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addi 4, 4, 16
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LXVD2X (1,(4),(3))
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addi 4, 4, 16
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LXVD2X (2,(4),(3))
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addi 4, 4, 16
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LXVD2X (3,(4),(3))
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addi 4, 4, 16
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LXVD2X (4,(4),(3))
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addi 4, 4, 16
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LXVD2X (5,(4),(3))
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addi 4, 4, 16
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LXVD2X (6,(4),(3))
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addi 4, 4, 16
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LXVD2X (7,(4),(3))
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addi 4, 4, 16
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LXVD2X (8,(4),(3))
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addi 4, 4, 16
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LXVD2X (9,(4),(3))
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addi 4, 4, 16
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LXVD2X (10,(4),(3))
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addi 4, 4, 16
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LXVD2X (11,(4),(3))
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addi 4, 4, 16
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LXVD2X (12,(4),(3))
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addi 4, 4, 16
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LXVD2X (13,(4),(3))
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addi 4, 4, 16
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LXVD2X (14,(4),(3))
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addi 4, 4, 16
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LXVD2X (15,(4),(3))
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addi 4, 4, 16
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LXVD2X (16,(4),(3))
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addi 4, 4, 16
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LXVD2X (17,(4),(3))
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addi 4, 4, 16
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LXVD2X (18,(4),(3))
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addi 4, 4, 16
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LXVD2X (19,(4),(3))
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addi 4, 4, 16
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LXVD2X (20,(4),(3))
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addi 4, 4, 16
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LXVD2X (21,(4),(3))
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addi 4, 4, 16
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LXVD2X (22,(4),(3))
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addi 4, 4, 16
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LXVD2X (23,(4),(3))
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addi 4, 4, 16
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LXVD2X (24,(4),(3))
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addi 4, 4, 16
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LXVD2X (25,(4),(3))
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addi 4, 4, 16
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LXVD2X (26,(4),(3))
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addi 4, 4, 16
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LXVD2X (27,(4),(3))
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addi 4, 4, 16
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LXVD2X (28,(4),(3))
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addi 4, 4, 16
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LXVD2X (29,(4),(3))
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addi 4, 4, 16
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LXVD2X (30,(4),(3))
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addi 4, 4, 16
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LXVD2X (31,(4),(3))
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addi 4, 4, 16
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LXVD2X (32,(4),(3))
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addi 4, 4, 16
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LXVD2X (33,(4),(3))
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addi 4, 4, 16
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LXVD2X (34,(4),(3))
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addi 4, 4, 16
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LXVD2X (35,(4),(3))
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addi 4, 4, 16
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LXVD2X (36,(4),(3))
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addi 4, 4, 16
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LXVD2X (37,(4),(3))
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addi 4, 4, 16
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LXVD2X (38,(4),(3))
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addi 4, 4, 16
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LXVD2X (39,(4),(3))
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addi 4, 4, 16
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LXVD2X (40,(4),(3))
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addi 4, 4, 16
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LXVD2X (41,(4),(3))
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addi 4, 4, 16
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LXVD2X (42,(4),(3))
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addi 4, 4, 16
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LXVD2X (43,(4),(3))
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addi 4, 4, 16
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LXVD2X (44,(4),(3))
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addi 4, 4, 16
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LXVD2X (45,(4),(3))
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addi 4, 4, 16
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LXVD2X (46,(4),(3))
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addi 4, 4, 16
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LXVD2X (47,(4),(3))
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addi 4, 4, 16
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LXVD2X (48,(4),(3))
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addi 4, 4, 16
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LXVD2X (49,(4),(3))
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addi 4, 4, 16
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LXVD2X (50,(4),(3))
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addi 4, 4, 16
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LXVD2X (51,(4),(3))
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addi 4, 4, 16
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LXVD2X (52,(4),(3))
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addi 4, 4, 16
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LXVD2X (53,(4),(3))
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addi 4, 4, 16
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LXVD2X (54,(4),(3))
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addi 4, 4, 16
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LXVD2X (55,(4),(3))
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addi 4, 4, 16
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LXVD2X (56,(4),(3))
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addi 4, 4, 16
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LXVD2X (57,(4),(3))
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addi 4, 4, 16
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LXVD2X (58,(4),(3))
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addi 4, 4, 16
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LXVD2X (59,(4),(3))
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addi 4, 4, 16
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LXVD2X (60,(4),(3))
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addi 4, 4, 16
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LXVD2X (61,(4),(3))
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addi 4, 4, 16
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LXVD2X (62,(4),(3))
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addi 4, 4, 16
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LXVD2X (63,(4),(3))
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blr
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FUNC_END(loadvsx)
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FUNC_START(storevsx)
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lis 4, 0
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STXVD2X (0,(4),(3))
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addi 4, 4, 16
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STXVD2X (1,(4),(3))
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addi 4, 4, 16
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STXVD2X (2,(4),(3))
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addi 4, 4, 16
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STXVD2X (3,(4),(3))
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addi 4, 4, 16
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STXVD2X (4,(4),(3))
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addi 4, 4, 16
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STXVD2X (5,(4),(3))
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addi 4, 4, 16
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STXVD2X (6,(4),(3))
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addi 4, 4, 16
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STXVD2X (7,(4),(3))
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addi 4, 4, 16
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STXVD2X (8,(4),(3))
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addi 4, 4, 16
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STXVD2X (9,(4),(3))
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addi 4, 4, 16
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STXVD2X (10,(4),(3))
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addi 4, 4, 16
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STXVD2X (11,(4),(3))
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addi 4, 4, 16
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STXVD2X (12,(4),(3))
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addi 4, 4, 16
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STXVD2X (13,(4),(3))
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addi 4, 4, 16
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STXVD2X (14,(4),(3))
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addi 4, 4, 16
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STXVD2X (15,(4),(3))
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addi 4, 4, 16
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STXVD2X (16,(4),(3))
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addi 4, 4, 16
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STXVD2X (17,(4),(3))
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addi 4, 4, 16
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STXVD2X (18,(4),(3))
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addi 4, 4, 16
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STXVD2X (19,(4),(3))
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addi 4, 4, 16
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STXVD2X (20,(4),(3))
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addi 4, 4, 16
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STXVD2X (21,(4),(3))
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addi 4, 4, 16
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STXVD2X (22,(4),(3))
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addi 4, 4, 16
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STXVD2X (23,(4),(3))
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addi 4, 4, 16
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STXVD2X (24,(4),(3))
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addi 4, 4, 16
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STXVD2X (25,(4),(3))
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addi 4, 4, 16
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STXVD2X (26,(4),(3))
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addi 4, 4, 16
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STXVD2X (27,(4),(3))
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addi 4, 4, 16
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STXVD2X (28,(4),(3))
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addi 4, 4, 16
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STXVD2X (29,(4),(3))
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addi 4, 4, 16
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STXVD2X (30,(4),(3))
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addi 4, 4, 16
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STXVD2X (31,(4),(3))
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addi 4, 4, 16
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STXVD2X (32,(4),(3))
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addi 4, 4, 16
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STXVD2X (33,(4),(3))
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addi 4, 4, 16
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STXVD2X (34,(4),(3))
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addi 4, 4, 16
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STXVD2X (35,(4),(3))
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addi 4, 4, 16
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STXVD2X (36,(4),(3))
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addi 4, 4, 16
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STXVD2X (37,(4),(3))
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addi 4, 4, 16
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STXVD2X (38,(4),(3))
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addi 4, 4, 16
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STXVD2X (39,(4),(3))
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addi 4, 4, 16
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STXVD2X (40,(4),(3))
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addi 4, 4, 16
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STXVD2X (41,(4),(3))
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addi 4, 4, 16
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STXVD2X (42,(4),(3))
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addi 4, 4, 16
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STXVD2X (43,(4),(3))
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addi 4, 4, 16
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STXVD2X (44,(4),(3))
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addi 4, 4, 16
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STXVD2X (45,(4),(3))
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addi 4, 4, 16
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STXVD2X (46,(4),(3))
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addi 4, 4, 16
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STXVD2X (47,(4),(3))
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addi 4, 4, 16
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STXVD2X (48,(4),(3))
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addi 4, 4, 16
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STXVD2X (49,(4),(3))
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addi 4, 4, 16
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STXVD2X (50,(4),(3))
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addi 4, 4, 16
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STXVD2X (51,(4),(3))
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addi 4, 4, 16
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STXVD2X (52,(4),(3))
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addi 4, 4, 16
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STXVD2X (53,(4),(3))
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addi 4, 4, 16
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STXVD2X (54,(4),(3))
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addi 4, 4, 16
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STXVD2X (55,(4),(3))
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addi 4, 4, 16
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STXVD2X (56,(4),(3))
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addi 4, 4, 16
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STXVD2X (57,(4),(3))
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addi 4, 4, 16
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STXVD2X (58,(4),(3))
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addi 4, 4, 16
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STXVD2X (59,(4),(3))
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addi 4, 4, 16
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STXVD2X (60,(4),(3))
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addi 4, 4, 16
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STXVD2X (61,(4),(3))
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addi 4, 4, 16
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STXVD2X (62,(4),(3))
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addi 4, 4, 16
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STXVD2X (63,(4),(3))
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blr
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FUNC_END(storevsx)
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@ -4,3 +4,4 @@ ptrace-tm-spd-gpr
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ptrace-tar
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ptrace-tm-tar
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ptrace-tm-spd-tar
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ptrace-vsx
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@ -1,5 +1,5 @@
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TEST_PROGS := ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
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ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
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ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
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include ../../lib.mk
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117
tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
Normal file
117
tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
Normal file
@ -0,0 +1,117 @@
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/*
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* Ptrace test for VMX/VSX registers
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*
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* Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include "ptrace.h"
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#include "ptrace-vsx.h"
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/* Tracer and Tracee Shared Data */
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int shm_id;
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int *cptr, *pptr;
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unsigned long fp_load[VEC_MAX];
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unsigned long fp_load_new[VEC_MAX];
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unsigned long fp_store[VEC_MAX];
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void vsx(void)
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{
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int ret;
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cptr = (int *)shmat(shm_id, NULL, 0);
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loadvsx(fp_load, 0);
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cptr[1] = 1;
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while (!cptr[0])
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asm volatile("" : : : "memory");
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shmdt((void *) cptr);
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storevsx(fp_store, 0);
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ret = compare_vsx_vmx(fp_store, fp_load_new);
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if (ret)
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exit(1);
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exit(0);
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}
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int trace_vsx(pid_t child)
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{
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unsigned long vsx[VSX_MAX];
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unsigned long vmx[VMX_MAX + 2][2];
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FAIL_IF(start_trace(child));
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FAIL_IF(show_vsx(child, vsx));
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FAIL_IF(validate_vsx(vsx, fp_load));
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FAIL_IF(show_vmx(child, vmx));
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FAIL_IF(validate_vmx(vmx, fp_load));
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memset(vsx, 0, sizeof(vsx));
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memset(vmx, 0, sizeof(vmx));
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load_vsx_vmx(fp_load_new, vsx, vmx);
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FAIL_IF(write_vsx(child, vsx));
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FAIL_IF(write_vmx(child, vmx));
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FAIL_IF(stop_trace(child));
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return TEST_PASS;
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}
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int ptrace_vsx(void)
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{
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pid_t pid;
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int ret, status, i;
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shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
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for (i = 0; i < VEC_MAX; i++)
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fp_load[i] = i + rand();
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for (i = 0; i < VEC_MAX; i++)
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fp_load_new[i] = i + 2 * rand();
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pid = fork();
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if (pid < 0) {
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perror("fork() failed");
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return TEST_FAIL;
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}
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if (pid == 0)
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vsx();
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if (pid) {
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pptr = (int *)shmat(shm_id, NULL, 0);
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while (!pptr[1])
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asm volatile("" : : : "memory");
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ret = trace_vsx(pid);
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if (ret) {
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kill(pid, SIGTERM);
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shmdt((void *)pptr);
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shmctl(shm_id, IPC_RMID, NULL);
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return TEST_FAIL;
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}
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pptr[0] = 1;
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shmdt((void *)pptr);
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ret = wait(&status);
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shmctl(shm_id, IPC_RMID, NULL);
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if (ret != pid) {
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printf("Child's exit status not captured\n");
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return TEST_FAIL;
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}
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return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
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TEST_PASS;
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}
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return TEST_PASS;
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}
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int main(int argc, char *argv[])
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{
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return test_harness(ptrace_vsx, "ptrace_vsx");
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}
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127
tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
Normal file
127
tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
Normal file
@ -0,0 +1,127 @@
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/*
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* Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#define VEC_MAX 128
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#define VSX_MAX 32
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#define VMX_MAX 32
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/*
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* unsigned long vsx[32]
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* unsigned long load[128]
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*/
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int validate_vsx(unsigned long *vsx, unsigned long *load)
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{
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int i;
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for (i = 0; i < VSX_MAX; i++) {
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if (vsx[i] != load[2 * i + 1]) {
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printf("vsx[%d]: %lx load[%d] %lx\n",
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i, vsx[i], 2 * i + 1, load[2 * i + 1]);
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return TEST_FAIL;
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}
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}
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return TEST_PASS;
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}
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/*
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* unsigned long vmx[32][2]
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* unsigned long load[128]
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*/
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int validate_vmx(unsigned long vmx[][2], unsigned long *load)
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{
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int i;
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for (i = 0; i < VMX_MAX; i++) {
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#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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if ((vmx[i][0] != load[64 + 2 * i]) ||
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(vmx[i][1] != load[65 + 2 * i])) {
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printf("vmx[%d][0]: %lx load[%d] %lx\n",
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i, vmx[i][0], 64 + 2 * i,
|
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load[64 + 2 * i]);
|
||||
printf("vmx[%d][1]: %lx load[%d] %lx\n",
|
||||
i, vmx[i][1], 65 + 2 * i,
|
||||
load[65 + 2 * i]);
|
||||
return TEST_FAIL;
|
||||
}
|
||||
#else /*
|
||||
* In LE each value pair is stored in an
|
||||
* alternate manner.
|
||||
*/
|
||||
if ((vmx[i][0] != load[65 + 2 * i]) ||
|
||||
(vmx[i][1] != load[64 + 2 * i])) {
|
||||
printf("vmx[%d][0]: %lx load[%d] %lx\n",
|
||||
i, vmx[i][0], 65 + 2 * i,
|
||||
load[65 + 2 * i]);
|
||||
printf("vmx[%d][1]: %lx load[%d] %lx\n",
|
||||
i, vmx[i][1], 64 + 2 * i,
|
||||
load[64 + 2 * i]);
|
||||
return TEST_FAIL;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
/*
|
||||
* unsigned long store[128]
|
||||
* unsigned long load[128]
|
||||
*/
|
||||
int compare_vsx_vmx(unsigned long *store, unsigned long *load)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < VSX_MAX; i++) {
|
||||
if (store[1 + 2 * i] != load[1 + 2 * i]) {
|
||||
printf("store[%d]: %lx load[%d] %lx\n",
|
||||
1 + 2 * i, store[i],
|
||||
1 + 2 * i, load[i]);
|
||||
return TEST_FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
|
||||
for (i = 64; i < VEC_MAX; i++) {
|
||||
if (store[i] != load[i]) {
|
||||
printf("store[%d]: %lx load[%d] %lx\n",
|
||||
i, store[i], i, load[i]);
|
||||
return TEST_FAIL;
|
||||
}
|
||||
}
|
||||
#else /* In LE each value pair is stored in an alternate manner */
|
||||
for (i = 64; i < VEC_MAX; i++) {
|
||||
if (!(i % 2) && (store[i] != load[i+1])) {
|
||||
printf("store[%d]: %lx load[%d] %lx\n",
|
||||
i, store[i], i+1, load[i+1]);
|
||||
return TEST_FAIL;
|
||||
}
|
||||
if ((i % 2) && (store[i] != load[i-1])) {
|
||||
printf("here store[%d]: %lx load[%d] %lx\n",
|
||||
i, store[i], i-1, load[i-1]);
|
||||
return TEST_FAIL;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
void load_vsx_vmx(unsigned long *load, unsigned long *vsx,
|
||||
unsigned long vmx[][2])
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < VSX_MAX; i++)
|
||||
vsx[i] = load[1 + 2 * i];
|
||||
|
||||
for (i = 0; i < VMX_MAX; i++) {
|
||||
vmx[i][0] = load[64 + 2 * i];
|
||||
vmx[i][1] = load[65 + 2 * i];
|
||||
}
|
||||
}
|
||||
|
||||
void loadvsx(void *p, int tmp);
|
||||
void storevsx(void *p, int tmp);
|
||||
@ -486,6 +486,125 @@ int write_ckpt_gpr(pid_t child, unsigned long val)
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
/* VMX */
|
||||
int show_vmx(pid_t child, unsigned long vmx[][2])
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = ptrace(PTRACE_GETVRREGS, child, 0, vmx);
|
||||
if (ret) {
|
||||
perror("ptrace(PTRACE_GETVRREGS) failed");
|
||||
return TEST_FAIL;
|
||||
}
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
int show_vmx_ckpt(pid_t child, unsigned long vmx[][2])
|
||||
{
|
||||
unsigned long regs[34][2];
|
||||
struct iovec iov;
|
||||
int ret;
|
||||
|
||||
iov.iov_base = (u64 *) regs;
|
||||
iov.iov_len = sizeof(regs);
|
||||
ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CVMX, &iov);
|
||||
if (ret) {
|
||||
perror("ptrace(PTRACE_GETREGSET, NT_PPC_TM_CVMX) failed");
|
||||
return TEST_FAIL;
|
||||
}
|
||||
memcpy(vmx, regs, sizeof(regs));
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
|
||||
int write_vmx(pid_t child, unsigned long vmx[][2])
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = ptrace(PTRACE_SETVRREGS, child, 0, vmx);
|
||||
if (ret) {
|
||||
perror("ptrace(PTRACE_SETVRREGS) failed");
|
||||
return TEST_FAIL;
|
||||
}
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
int write_vmx_ckpt(pid_t child, unsigned long vmx[][2])
|
||||
{
|
||||
unsigned long regs[34][2];
|
||||
struct iovec iov;
|
||||
int ret;
|
||||
|
||||
memcpy(regs, vmx, sizeof(regs));
|
||||
iov.iov_base = (u64 *) regs;
|
||||
iov.iov_len = sizeof(regs);
|
||||
ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TM_CVMX, &iov);
|
||||
if (ret) {
|
||||
perror("ptrace(PTRACE_SETREGSET, NT_PPC_TM_CVMX) failed");
|
||||
return TEST_FAIL;
|
||||
}
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
/* VSX */
|
||||
int show_vsx(pid_t child, unsigned long *vsx)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = ptrace(PTRACE_GETVSRREGS, child, 0, vsx);
|
||||
if (ret) {
|
||||
perror("ptrace(PTRACE_GETVSRREGS) failed");
|
||||
return TEST_FAIL;
|
||||
}
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
int show_vsx_ckpt(pid_t child, unsigned long *vsx)
|
||||
{
|
||||
unsigned long regs[32];
|
||||
struct iovec iov;
|
||||
int ret;
|
||||
|
||||
iov.iov_base = (u64 *) regs;
|
||||
iov.iov_len = sizeof(regs);
|
||||
ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CVSX, &iov);
|
||||
if (ret) {
|
||||
perror("ptrace(PTRACE_GETREGSET, NT_PPC_TM_CVSX) failed");
|
||||
return TEST_FAIL;
|
||||
}
|
||||
memcpy(vsx, regs, sizeof(regs));
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
int write_vsx(pid_t child, unsigned long *vsx)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = ptrace(PTRACE_SETVSRREGS, child, 0, vsx);
|
||||
if (ret) {
|
||||
perror("ptrace(PTRACE_SETVSRREGS) failed");
|
||||
return TEST_FAIL;
|
||||
}
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
int write_vsx_ckpt(pid_t child, unsigned long *vsx)
|
||||
{
|
||||
unsigned long regs[32];
|
||||
struct iovec iov;
|
||||
int ret;
|
||||
|
||||
memcpy(regs, vsx, sizeof(regs));
|
||||
iov.iov_base = (u64 *) regs;
|
||||
iov.iov_len = sizeof(regs);
|
||||
ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TM_CVSX, &iov);
|
||||
if (ret) {
|
||||
perror("ptrace(PTRACE_SETREGSET, NT_PPC_TM_CVSX) failed");
|
||||
return TEST_FAIL;
|
||||
}
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
/* Analyse TEXASR after TM failure */
|
||||
inline unsigned long get_tfiar(void)
|
||||
{
|
||||
|
||||
Loading…
Reference in New Issue
Block a user