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net: hns: add attribute port-mode-offset for dsaf port node

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Port mode offset for each dsaf port is different. The current code is not
so readability. This patch adds configuration named port-mode-offset to
make the code simple and more readability. If port-mode-offset isn't
exists, default value 0 will be used.

Signed-off-by: Daode Huang <huangdaode@hisilicon.com>
Signed-off-by: Yisen Zhuang <Yisen.Zhuang@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Yisen.Zhuang\(Zhuangyuzeng\) 2016-04-23 17:05:14 +08:00 committed by David S. Miller
parent 850bfa3b78
commit 0d768fc62d
3 changed files with 30 additions and 25 deletions
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10
drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c
View File

@ -665,6 +665,7 @@ static int hns_mac_get_info(struct hns_mac_cb *mac_cb)
mac_cb->max_frm = MAC_DEFAULT_MTU;
mac_cb->tx_pause_frm_time = MAC_DEFAULT_PAUSE_TIME;
mac_cb->port_rst_off = mac_cb->mac_id;
mac_cb->port_mode_off = 0;
/* if the dsaf node doesn't contain a port subnode, get phy-handle
* from dsaf node
@ -703,6 +704,15 @@ static int hns_mac_get_info(struct hns_mac_cb *mac_cb)
mac_cb->mac_id);
}
ret = fwnode_property_read_u32(mac_cb->fw_port,
"port-mode-offset",
&mac_cb->port_mode_off);
if (ret) {
dev_dbg(mac_cb->dev,
"mac%d port-mode-offset not found, use default value.\n",
mac_cb->mac_id);
}
syscon = syscon_node_to_regmap(
of_parse_phandle(to_of_node(mac_cb->fw_port),
"cpld-syscon", 0));

1
drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h
View File

@ -319,6 +319,7 @@ struct hns_mac_cb {
struct regmap *cpld_ctrl;
u32 cpld_ctrl_reg;
u32 port_rst_off;
u32 port_mode_off;
struct mac_entry_idx addr_entry_idx[DSAF_MAX_VM_NUM];
u8 sfp_prsnt;
u8 cpld_led_value;

44
drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
View File

@ -265,37 +265,31 @@ phy_interface_t hns_mac_get_phy_if(struct hns_mac_cb *mac_cb)
{
u32 mode;
u32 reg;
u32 shift;
u32 phy_offset;
bool is_ver1 = AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver);
int mac_id = mac_cb->mac_id;
phy_interface_t phy_if = PHY_INTERFACE_MODE_NA;
phy_interface_t phy_if;
if (is_ver1 && HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev)) {
phy_if = PHY_INTERFACE_MODE_SGMII;
} else if (mac_id >= 0 && mac_id <= 3 &&
!HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev)) {
reg = is_ver1 ? HNS_MAC_HILINK4_REG : HNS_MAC_HILINK4V2_REG;
mode = dsaf_read_sub(mac_cb->dsaf_dev, reg);
/* mac_id 0, 1, 2, 3 ---> hilink4 lane 0, 1, 2, 3 */
shift = is_ver1 ? 0 : mac_id;
if (dsaf_get_bit(mode, shift))
phy_if = PHY_INTERFACE_MODE_XGMII;
if (is_ver1) {
if (HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev))
return PHY_INTERFACE_MODE_SGMII;
if (mac_id >= 0 && mac_id <= 3)
reg = HNS_MAC_HILINK4_REG;
else
phy_if = PHY_INTERFACE_MODE_SGMII;
} else {
reg = is_ver1 ? HNS_MAC_HILINK3_REG : HNS_MAC_HILINK3V2_REG;
mode = dsaf_read_sub(mac_cb->dsaf_dev, reg);
/* mac_id 4, 5,---> hilink3 lane 2, 3
* debug port 0(6), 1(7) ---> hilink3 lane 0, 1
*/
phy_offset = mac_cb->dsaf_dev->reset_offset - 1;
shift = is_ver1 ? 0 : mac_id >= 4 ? mac_id - 2 : phy_offset;
if (dsaf_get_bit(mode, shift))
phy_if = PHY_INTERFACE_MODE_XGMII;
reg = HNS_MAC_HILINK3_REG;
} else{
if (!HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev) && mac_id <= 3)
reg = HNS_MAC_HILINK4V2_REG;
else
phy_if = PHY_INTERFACE_MODE_SGMII;
reg = HNS_MAC_HILINK3V2_REG;
}
mode = dsaf_read_sub(mac_cb->dsaf_dev, reg);
if (dsaf_get_bit(mode, mac_cb->port_mode_off))
phy_if = PHY_INTERFACE_MODE_XGMII;
else
phy_if = PHY_INTERFACE_MODE_SGMII;
return phy_if;
}