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media: platform: mtk-mdp3: add files for chip configuration

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In order to be compatible with more MDP3 chip settings in further,
integrate and separate chip-related configurations into specific files.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
This commit is contained in:
Moudy Ho 2023-03-27 11:13:25 +08:00 committed by Hans Verkuil
parent 4168720753
commit 0cbfa7c905
4 changed files with 53 additions and 32 deletions
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2
drivers/media/platform/mediatek/mdp3/Makefile
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@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
mtk-mdp3-y += mtk-mdp3-core.o mtk-mdp3-vpu.o mtk-mdp3-regs.o
mtk-mdp3-y += mdp_cfg_data.o mtk-mdp3-core.o mtk-mdp3-vpu.o mtk-mdp3-regs.o
mtk-mdp3-y += mtk-mdp3-m2m.o
mtk-mdp3-y += mtk-mdp3-comp.o mtk-mdp3-cmdq.o

38
drivers/media/platform/mediatek/mdp3/mdp_cfg_data.c Normal file
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@ -0,0 +1,38 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2023 MediaTek Inc.
* Author: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
*/
#include "mtk-mdp3-core.h"
static const struct of_device_id mt8183_mdp_probe_infra[MDP_INFRA_MAX] = {
[MDP_INFRA_MMSYS] = { .compatible = "mediatek,mt8183-mmsys" },
[MDP_INFRA_MUTEX] = { .compatible = "mediatek,mt8183-disp-mutex" },
[MDP_INFRA_SCP] = { .compatible = "mediatek,mt8183-scp" }
};
static const struct mdp_platform_config mt8183_plat_cfg = {
.rdma_support_10bit = true,
.rdma_rsz1_sram_sharing = true,
.rdma_upsample_repeat_only = true,
.rsz_disable_dcm_small_sample = false,
.wrot_filter_constraint = false,
};
static const u32 mt8183_mutex_idx[MDP_MAX_COMP_COUNT] = {
[MDP_COMP_RDMA0] = MUTEX_MOD_IDX_MDP_RDMA0,
[MDP_COMP_RSZ0] = MUTEX_MOD_IDX_MDP_RSZ0,
[MDP_COMP_RSZ1] = MUTEX_MOD_IDX_MDP_RSZ1,
[MDP_COMP_TDSHP0] = MUTEX_MOD_IDX_MDP_TDSHP0,
[MDP_COMP_WROT0] = MUTEX_MOD_IDX_MDP_WROT0,
[MDP_COMP_WDMA] = MUTEX_MOD_IDX_MDP_WDMA,
[MDP_COMP_AAL0] = MUTEX_MOD_IDX_MDP_AAL0,
[MDP_COMP_CCORR0] = MUTEX_MOD_IDX_MDP_CCORR0,
};
const struct mtk_mdp_driver_data mt8183_mdp_driver_data = {
.mdp_probe_infra = mt8183_mdp_probe_infra,
.mdp_cfg = &mt8183_plat_cfg,
.mdp_mutex_table_idx = mt8183_mutex_idx,
};

12
drivers/media/platform/mediatek/mdp3/mtk-mdp3-cfg.h Normal file
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@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2023 MediaTek Inc.
* Author: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
*/
#ifndef __MTK_MDP3_CFG_H__
#define __MTK_MDP3_CFG_H__
extern const struct mtk_mdp_driver_data mt8183_mdp_driver_data;
#endif /* __MTK_MDP3_CFG_H__ */

33
drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c
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@ -12,40 +12,11 @@
#include <linux/remoteproc.h>
#include <linux/remoteproc/mtk_scp.h>
#include <media/videobuf2-dma-contig.h>
#include "mtk-mdp3-core.h"
#include "mtk-mdp3-cfg.h"
#include "mtk-mdp3-m2m.h"
static const struct mdp_platform_config mt8183_plat_cfg = {
.rdma_support_10bit = true,
.rdma_rsz1_sram_sharing = true,
.rdma_upsample_repeat_only = true,
.rsz_disable_dcm_small_sample = false,
.wrot_filter_constraint = false,
};
static const struct of_device_id mt8183_mdp_probe_infra[MDP_INFRA_MAX] = {
[MDP_INFRA_MMSYS] = { .compatible = "mediatek,mt8183-mmsys" },
[MDP_INFRA_MUTEX] = { .compatible = "mediatek,mt8183-disp-mutex" },
[MDP_INFRA_SCP] = { .compatible = "mediatek,mt8183-scp" }
};
static const u32 mt8183_mutex_idx[MDP_MAX_COMP_COUNT] = {
[MDP_COMP_RDMA0] = MUTEX_MOD_IDX_MDP_RDMA0,
[MDP_COMP_RSZ0] = MUTEX_MOD_IDX_MDP_RSZ0,
[MDP_COMP_RSZ1] = MUTEX_MOD_IDX_MDP_RSZ1,
[MDP_COMP_TDSHP0] = MUTEX_MOD_IDX_MDP_TDSHP0,
[MDP_COMP_WROT0] = MUTEX_MOD_IDX_MDP_WROT0,
[MDP_COMP_WDMA] = MUTEX_MOD_IDX_MDP_WDMA,
[MDP_COMP_AAL0] = MUTEX_MOD_IDX_MDP_AAL0,
[MDP_COMP_CCORR0] = MUTEX_MOD_IDX_MDP_CCORR0,
};
static const struct mtk_mdp_driver_data mt8183_mdp_driver_data = {
.mdp_probe_infra = mt8183_mdp_probe_infra,
.mdp_cfg = &mt8183_plat_cfg,
.mdp_mutex_table_idx = mt8183_mutex_idx,
};
static const struct of_device_id mdp_of_ids[] = {
{ .compatible = "mediatek,mt8183-mdp3-rdma",
.data = &mt8183_mdp_driver_data,