mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-05 11:54:01 +08:00
Merge branch 'late/fixes' into fixes
This is a series from Arnd that fixes a number of compiler warnings when building defconfigs on ARM. * late/fixes: ARM: footbridge: nw_gpio_lock is raw_spin_lock ARM: mv78xx0: correct addr_map_cfg __initdata annotation ARM: footbridge: remove RTC_IRQ definition ARM: soc: dependency warnings for errata ARM: ks8695: __arch_virt_to_dma type handling ARM: rpc: check device_register return code in ecard_probe ARM: davinci: don't mark da850_register_cpufreq as __init ARM: iop13xx: fix iq81340sc_atux_map_irq prototype ARM: iop13xx: mark iop13xx_scan_bus as __devinit ARM: mv78xx0: mark mv78xx0_timer_init as __init_refok ARM: s3c24xx: fix multiple section mismatch warnings ARM: at91: unused variable in at91_pm_verify_clocks ARM: at91: skip at91_io_desc definition for NOMMU ARM: pxa: work around duplicate definition of GPIO24_SSP1_SFRM ARM: pxa: remove sharpsl_fatal_check function ARM: pxa: define palmte2_pxa_keys conditionally ARM: pxa: Wunused-result warning in viper board file ARM: shark: fix shark_pci_init return code Fixed trivial conflicts in arch/arm/mach-at91/setup.c. Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
0b33162ec5
@ -153,7 +153,9 @@ static int at91_pm_verify_clocks(void)
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}
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}
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#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
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if (!IS_ENABLED(CONFIG_AT91_PROGRAMMABLE_CLOCKS))
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return 1;
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/* PCK0..PCK3 must be disabled, or configured to use clk32k */
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for (i = 0; i < 4; i++) {
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u32 css;
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@ -167,7 +169,6 @@ static int at91_pm_verify_clocks(void)
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return 0;
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}
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}
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#endif
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return 1;
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}
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@ -87,7 +87,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
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iotable_init(desc, 1);
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}
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static struct map_desc at91_io_desc __initdata = {
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static struct map_desc at91_io_desc __initdata __maybe_unused = {
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.virtual = (unsigned long)AT91_VA_BASE_SYS,
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.pfn = __phys_to_pfn(AT91_BASE_SYS),
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.length = SZ_16K,
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@ -939,7 +939,7 @@ static struct platform_device da850_cpufreq_device = {
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unsigned int da850_max_speed = 300000;
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int __init da850_register_cpufreq(char *async_clk)
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int da850_register_cpufreq(char *async_clk)
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{
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int i;
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@ -89,8 +89,6 @@
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#define IRQ_NETWINDER_VGA _ISA_IRQ(11)
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#define IRQ_NETWINDER_SOUND _ISA_IRQ(12)
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#undef RTC_IRQ
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#define RTC_IRQ IRQ_ISA_RTC_ALARM
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#define I8042_KBD_IRQ IRQ_ISA_KEYBOARD
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#define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE)
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#define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY
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@ -30,7 +30,7 @@
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extern int init_atu;
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static int __init
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iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
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iq81340sc_atux_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin)
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{
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WARN_ON(idsel < 1 || idsel > 2);
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@ -504,7 +504,7 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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/* Scan an IOP13XX PCI bus. nr selects which ATU we use.
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*/
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struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
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struct pci_bus * __devinit iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
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{
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int which_atu;
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struct pci_bus *bus = NULL;
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@ -34,7 +34,8 @@ extern struct bus_type platform_bus_type;
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#define __arch_dma_to_virt(dev, x) ({ (void *) (is_lbus_device(dev) ? \
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__phys_to_virt(x) : __bus_to_virt(x)); })
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#define __arch_virt_to_dma(dev, x) ({ is_lbus_device(dev) ? \
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(dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); })
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(dma_addr_t)__virt_to_phys((unsigned long)x) \
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: (dma_addr_t)__virt_to_bus(x); })
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#define __arch_pfn_to_dma(dev, pfn) \
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({ dma_addr_t __dma = __pfn_to_phys(pfn); \
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if (!is_lbus_device(dev)) \
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@ -54,7 +54,7 @@ static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, i
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/*
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* Description of the windows needed by the platform code
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*/
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static struct __initdata orion_addr_map_cfg addr_map_cfg = {
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static struct orion_addr_map_cfg addr_map_cfg __initdata = {
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.num_wins = 14,
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.remappable_wins = 8,
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.win_cfg_base = win_cfg_base,
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@ -336,7 +336,7 @@ void __init mv78xx0_init_early(void)
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orion_time_set_base(TIMER_VIRT_BASE);
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}
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static void mv78xx0_timer_init(void)
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static void __init_refok mv78xx0_timer_init(void)
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{
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orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
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IRQ_MV78XX0_TIMER_1, get_tclk());
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@ -22,6 +22,7 @@
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#include <asm/mach/map.h>
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#include <mach/pxa25x.h>
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#undef GPIO24_SSP1_SFRM
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#include <mach/pxa27x.h>
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#include <mach/audio.h>
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#include <linux/platform_data/video-pxafb.h>
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@ -105,6 +105,7 @@ static struct pxamci_platform_data palmte2_mci_platform_data = {
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.gpio_power = GPIO_NR_PALMTE2_SD_POWER,
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};
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#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
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/******************************************************************************
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* GPIO keys
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******************************************************************************/
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@ -132,6 +133,7 @@ static struct platform_device palmte2_pxa_keys = {
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.platform_data = &palmte2_pxa_keys_data,
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},
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};
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#endif
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/******************************************************************************
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* Backlight
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@ -55,7 +55,6 @@
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#ifdef CONFIG_PM
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static int sharpsl_off_charge_battery(void);
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static int sharpsl_check_battery_voltage(void);
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static int sharpsl_fatal_check(void);
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#endif
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static int sharpsl_check_battery_temp(void);
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static int sharpsl_ac_check(void);
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@ -686,53 +685,6 @@ static int corgi_pxa_pm_enter(suspend_state_t state)
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return 0;
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}
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/*
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* Check for fatal battery errors
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* Fatal returns -1
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*/
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static int sharpsl_fatal_check(void)
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{
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int buff[5], temp, i, acin;
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dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check entered\n");
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/* Check AC-Adapter */
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acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
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if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
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sharpsl_pm.machinfo->charge(0);
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udelay(100);
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sharpsl_pm.machinfo->discharge(1); /* enable discharge */
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mdelay(SHARPSL_WAIT_DISCHARGE_ON);
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}
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if (sharpsl_pm.machinfo->discharge1)
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sharpsl_pm.machinfo->discharge1(1);
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/* Check battery : check inserting battery ? */
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for (i = 0; i < 5; i++) {
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buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
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mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
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}
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if (sharpsl_pm.machinfo->discharge1)
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sharpsl_pm.machinfo->discharge1(0);
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if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
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udelay(100);
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sharpsl_pm.machinfo->charge(1);
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sharpsl_pm.machinfo->discharge(0);
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}
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temp = get_select_val(buff);
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dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %ld\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT));
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if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) ||
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(!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt)))
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return -1;
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return 0;
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}
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static int sharpsl_off_charge_error(void)
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{
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dev_err(sharpsl_pm.dev, "Offline Charger: Error occurred.\n");
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@ -768,8 +768,7 @@ static unsigned long viper_tpm;
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static int __init viper_tpm_setup(char *str)
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{
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strict_strtoul(str, 10, &viper_tpm);
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return 1;
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return strict_strtoul(str, 10, &viper_tpm) >= 0;
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}
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__setup("tpm=", viper_tpm_setup);
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@ -960,7 +960,9 @@ static int __init ecard_probe(int slot, unsigned irq, card_type_t type)
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*ecp = ec;
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slot_to_expcard[slot] = ec;
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device_register(&ec->dev);
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rc = device_register(&ec->dev);
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if (rc)
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goto nodev;
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return 0;
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@ -232,7 +232,7 @@ struct irq_chip s3c2416_irq_second = {
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/* IRQ initialisation code */
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static int __init s3c2416_add_sub(unsigned int base,
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static int s3c2416_add_sub(unsigned int base,
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void (*demux)(unsigned int,
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struct irq_desc *),
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struct irq_chip *chip,
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@ -251,7 +251,7 @@ static int __init s3c2416_add_sub(unsigned int base,
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return 0;
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}
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static void __init s3c2416_irq_add_second(void)
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static void s3c2416_irq_add_second(void)
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{
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unsigned long pend;
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unsigned long last;
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@ -287,7 +287,7 @@ static void __init s3c2416_irq_add_second(void)
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}
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}
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static int __init s3c2416_irq_add(struct device *dev,
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static int s3c2416_irq_add(struct device *dev,
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struct subsys_interface *sif)
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{
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printk(KERN_INFO "S3C2416: IRQ Support\n");
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@ -222,7 +222,7 @@ static struct irq_chip s3c2443_irq_cam = {
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/* IRQ initialisation code */
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static int __init s3c2443_add_sub(unsigned int base,
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static int s3c2443_add_sub(unsigned int base,
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void (*demux)(unsigned int,
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struct irq_desc *),
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struct irq_chip *chip,
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@ -241,7 +241,7 @@ static int __init s3c2443_add_sub(unsigned int base,
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return 0;
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}
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static int __init s3c2443_irq_add(struct device *dev,
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static int s3c2443_irq_add(struct device *dev,
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struct subsys_interface *sif)
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{
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printk("S3C2443: IRQ Support\n");
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@ -104,7 +104,7 @@ static struct s3c2410_hcd_info usb_simtec_info __initdata = {
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};
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int usb_simtec_init(void)
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int __init usb_simtec_init(void)
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{
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int ret;
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@ -41,7 +41,7 @@ static struct hw_pci shark_pci __initdata = {
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static int __init shark_pci_init(void)
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{
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if (!machine_is_shark())
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return;
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return -ENODEV;
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pcibios_min_io = 0x6000;
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pcibios_min_mem = 0x50000000;
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@ -16,7 +16,7 @@ config ARCH_TEGRA_2x_SOC
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select ARM_ERRATA_742230
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select ARM_ERRATA_751472
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select ARM_ERRATA_754327
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select ARM_ERRATA_764369
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select ARM_ERRATA_764369 if SMP
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select PL310_ERRATA_727915 if CACHE_L2X0
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select PL310_ERRATA_769419 if CACHE_L2X0
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select CPU_FREQ_TABLE if CPU_FREQ
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@ -37,7 +37,7 @@ config ARCH_TEGRA_3x_SOC
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select ARM_ERRATA_743622
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select ARM_ERRATA_751472
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select ARM_ERRATA_754322
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select ARM_ERRATA_764369
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select ARM_ERRATA_764369 if SMP
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select PL310_ERRATA_769419 if CACHE_L2X0
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select CPU_FREQ_TABLE if CPU_FREQ
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help
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@ -5,9 +5,9 @@ config UX500_SOC_COMMON
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default y
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select ARM_GIC
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select HAS_MTU
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select PL310_ERRATA_753970
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select PL310_ERRATA_753970 if CACHE_PL310
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select ARM_ERRATA_754322
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select ARM_ERRATA_764369
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select ARM_ERRATA_764369 if SMP
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select CACHE_L2X0
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select PINCTRL
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select PINCTRL_NOMADIK
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@ -74,21 +74,21 @@ static inline void netwinder_ds1620_reset(void)
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static inline void netwinder_lock(unsigned long *flags)
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{
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spin_lock_irqsave(&nw_gpio_lock, *flags);
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raw_spin_lock_irqsave(&nw_gpio_lock, *flags);
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}
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static inline void netwinder_unlock(unsigned long *flags)
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{
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spin_unlock_irqrestore(&nw_gpio_lock, *flags);
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raw_spin_unlock_irqrestore(&nw_gpio_lock, *flags);
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}
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static inline void netwinder_set_fan(int i)
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{
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unsigned long flags;
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spin_lock_irqsave(&nw_gpio_lock, flags);
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raw_spin_lock_irqsave(&nw_gpio_lock, flags);
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nw_gpio_modify_op(GPIO_FAN, i ? GPIO_FAN : 0);
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spin_unlock_irqrestore(&nw_gpio_lock, flags);
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raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
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}
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static inline int netwinder_get_fan(void)
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@ -583,9 +583,9 @@ static void kick_open(void)
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* we want to write a bit pattern XXX1 to Xilinx to enable
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* the write gate, which will be open for about the next 2ms.
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*/
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spin_lock_irqsave(&nw_gpio_lock, flags);
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raw_spin_lock_irqsave(&nw_gpio_lock, flags);
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nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
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spin_unlock_irqrestore(&nw_gpio_lock, flags);
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raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
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/*
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* let the ISA bus to catch on...
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@ -1482,9 +1482,9 @@ vnc_mute_spkr(wavnc_info *devc)
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{
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unsigned long flags;
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spin_lock_irqsave(&nw_gpio_lock, flags);
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raw_spin_lock_irqsave(&nw_gpio_lock, flags);
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nw_cpld_modify(CPLD_UNMUTE, devc->spkr_mute_state ? 0 : CPLD_UNMUTE);
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spin_unlock_irqrestore(&nw_gpio_lock, flags);
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raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
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}
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static void
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