mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-16 01:04:08 +08:00
cpm_uart: Remove !CONFIG_PPC_CPM_NEW_BINDING code
Now that arch/ppc is gone we always define CONFIG_PPC_CPM_NEW_BINDING so we can remove all the code associated with !CONFIG_PPC_CPM_NEW_BINDING. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
parent
0d8440657e
commit
0b2a2e5b77
@ -84,9 +84,6 @@ struct uart_cpm_port {
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u32 command;
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};
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#ifndef CONFIG_PPC_CPM_NEW_BINDING
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extern int cpm_uart_port_map[UART_NR];
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#endif
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extern int cpm_uart_nr;
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extern struct uart_cpm_port cpm_uart_ports[UART_NR];
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@ -42,6 +42,7 @@
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#include <linux/bootmem.h>
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#include <linux/dma-mapping.h>
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#include <linux/fs_uart_pd.h>
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#include <linux/of_platform.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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@ -49,10 +50,6 @@
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#include <asm/fs_pd.h>
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#include <asm/udbg.h>
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#ifdef CONFIG_PPC_CPM_NEW_BINDING
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#include <linux/of_platform.h>
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#endif
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#if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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@ -72,59 +69,6 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
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/**************************************************************/
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#ifndef CONFIG_PPC_CPM_NEW_BINDING
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/* Track which ports are configured as uarts */
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int cpm_uart_port_map[UART_NR];
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/* How many ports did we config as uarts */
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int cpm_uart_nr;
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/* Place-holder for board-specific stuff */
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struct platform_device* __attribute__ ((weak)) __init
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early_uart_get_pdev(int index)
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{
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return NULL;
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}
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static void cpm_uart_count(void)
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{
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cpm_uart_nr = 0;
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#ifdef CONFIG_SERIAL_CPM_SMC1
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cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
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#endif
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#ifdef CONFIG_SERIAL_CPM_SMC2
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cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
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#endif
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#ifdef CONFIG_SERIAL_CPM_SCC1
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cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
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#endif
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#ifdef CONFIG_SERIAL_CPM_SCC2
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cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
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#endif
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#ifdef CONFIG_SERIAL_CPM_SCC3
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cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
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#endif
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#ifdef CONFIG_SERIAL_CPM_SCC4
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cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
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#endif
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}
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/* Get UART number by its id */
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static int cpm_uart_id2nr(int id)
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{
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int i;
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if (id < UART_NR) {
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for (i=0; i<UART_NR; i++) {
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if (cpm_uart_port_map[i] == id)
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return i;
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}
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}
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/* not found or invalid argument */
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return -1;
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}
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#endif
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/*
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* Check, if transmit buffers are processed
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*/
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@ -935,7 +879,6 @@ static struct uart_ops cpm_uart_pops = {
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.verify_port = cpm_uart_verify_port,
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};
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#ifdef CONFIG_PPC_CPM_NEW_BINDING
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struct uart_cpm_port cpm_uart_ports[UART_NR];
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static int cpm_uart_init_port(struct device_node *np,
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@ -1012,153 +955,6 @@ out_mem:
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return ret;
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}
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#else
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struct uart_cpm_port cpm_uart_ports[UART_NR] = {
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[UART_SMC1] = {
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.port = {
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.irq = SMC1_IRQ,
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.ops = &cpm_uart_pops,
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.iotype = UPIO_MEM,
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.lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC1].port.lock),
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},
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.flags = FLAG_SMC,
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = smc1_lineif,
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},
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[UART_SMC2] = {
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.port = {
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.irq = SMC2_IRQ,
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.ops = &cpm_uart_pops,
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.iotype = UPIO_MEM,
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.lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC2].port.lock),
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},
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.flags = FLAG_SMC,
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = smc2_lineif,
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#ifdef CONFIG_SERIAL_CPM_ALT_SMC2
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.is_portb = 1,
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#endif
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},
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[UART_SCC1] = {
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.port = {
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.irq = SCC1_IRQ,
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.ops = &cpm_uart_pops,
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.iotype = UPIO_MEM,
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.lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC1].port.lock),
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},
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = scc1_lineif,
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.wait_closing = SCC_WAIT_CLOSING,
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},
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[UART_SCC2] = {
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.port = {
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.irq = SCC2_IRQ,
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.ops = &cpm_uart_pops,
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.iotype = UPIO_MEM,
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.lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC2].port.lock),
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},
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = scc2_lineif,
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.wait_closing = SCC_WAIT_CLOSING,
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},
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[UART_SCC3] = {
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.port = {
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.irq = SCC3_IRQ,
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.ops = &cpm_uart_pops,
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.iotype = UPIO_MEM,
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.lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC3].port.lock),
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},
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = scc3_lineif,
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.wait_closing = SCC_WAIT_CLOSING,
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},
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[UART_SCC4] = {
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.port = {
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.irq = SCC4_IRQ,
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.ops = &cpm_uart_pops,
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.iotype = UPIO_MEM,
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.lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC4].port.lock),
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},
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.tx_nrfifos = TX_NUM_FIFO,
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.tx_fifosize = TX_BUF_SIZE,
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.rx_nrfifos = RX_NUM_FIFO,
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.rx_fifosize = RX_BUF_SIZE,
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.set_lineif = scc4_lineif,
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.wait_closing = SCC_WAIT_CLOSING,
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},
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};
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int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
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{
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struct resource *r;
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struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
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int idx; /* It is UART_SMCx or UART_SCCx index */
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struct uart_cpm_port *pinfo;
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int line;
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u32 mem, pram;
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idx = pdata->fs_no = fs_uart_get_id(pdata);
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line = cpm_uart_id2nr(idx);
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if(line < 0) {
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printk(KERN_ERR"%s(): port %d is not registered", __func__, idx);
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return -EINVAL;
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}
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pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx];
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pinfo->brg = pdata->brg;
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if (!is_con) {
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pinfo->port.line = line;
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pinfo->port.flags = UPF_BOOT_AUTOCONF;
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}
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if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs")))
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return -EINVAL;
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mem = (u32)ioremap(r->start, r->end - r->start + 1);
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if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram")))
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return -EINVAL;
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pram = (u32)ioremap(r->start, r->end - r->start + 1);
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if(idx > fsid_smc2_uart) {
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pinfo->sccp = (scc_t *)mem;
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pinfo->sccup = (scc_uart_t *)pram;
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} else {
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pinfo->smcp = (smc_t *)mem;
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pinfo->smcup = (smc_uart_t *)pram;
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}
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pinfo->tx_nrfifos = pdata->tx_num_fifo;
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pinfo->tx_fifosize = pdata->tx_buf_size;
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pinfo->rx_nrfifos = pdata->rx_num_fifo;
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pinfo->rx_fifosize = pdata->rx_buf_size;
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pinfo->port.uartclk = pdata->uart_clk;
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pinfo->port.mapbase = (unsigned long)mem;
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pinfo->port.irq = platform_get_irq(pdev, 0);
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return 0;
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}
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#endif
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#ifdef CONFIG_SERIAL_CPM_CONSOLE
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/*
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* Print a string to the serial port trying not to disturb
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@ -1169,12 +965,7 @@ int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
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static void cpm_uart_console_write(struct console *co, const char *s,
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u_int count)
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{
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#ifdef CONFIG_PPC_CPM_NEW_BINDING
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struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
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#else
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struct uart_cpm_port *pinfo =
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&cpm_uart_ports[cpm_uart_port_map[co->index]];
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#endif
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unsigned int i;
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cbd_t __iomem *bdp, *bdbase;
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unsigned char *cp;
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@ -1252,7 +1043,6 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
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struct uart_cpm_port *pinfo;
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struct uart_port *port;
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#ifdef CONFIG_PPC_CPM_NEW_BINDING
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struct device_node *np = NULL;
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int i = 0;
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@ -1284,35 +1074,6 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
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if (ret)
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return ret;
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#else
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struct fs_uart_platform_info *pdata;
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struct platform_device* pdev = early_uart_get_pdev(co->index);
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if (!pdev) {
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pr_info("cpm_uart: console: compat mode\n");
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/* compatibility - will be cleaned up */
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cpm_uart_init_portdesc();
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}
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port =
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(struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
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pinfo = (struct uart_cpm_port *)port;
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if (!pdev) {
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if (pinfo->set_lineif)
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pinfo->set_lineif(pinfo);
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} else {
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pdata = pdev->dev.platform_data;
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if (pdata)
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if (pdata->init_ioports)
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pdata->init_ioports(pdata);
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cpm_uart_drv_get_platform_data(pdev, 1);
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}
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pinfo->flags |= FLAG_CONSOLE;
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#endif
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if (options) {
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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} else {
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@ -1386,7 +1147,6 @@ static struct uart_driver cpm_reg = {
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.nr = UART_NR,
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};
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#ifdef CONFIG_PPC_CPM_NEW_BINDING
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static int probe_index;
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static int __devinit cpm_uart_probe(struct of_device *ofdev,
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@ -1457,135 +1217,6 @@ static void __exit cpm_uart_exit(void)
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of_unregister_platform_driver(&cpm_uart_driver);
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uart_unregister_driver(&cpm_reg);
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}
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#else
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static int cpm_uart_drv_probe(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct fs_uart_platform_info *pdata;
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int ret = -ENODEV;
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if(!pdev) {
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printk(KERN_ERR"CPM UART: platform data missing!\n");
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return ret;
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}
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pdata = pdev->dev.platform_data;
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if ((ret = cpm_uart_drv_get_platform_data(pdev, 0)))
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return ret;
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pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", cpm_uart_id2nr(pdata->fs_no));
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if (pdata->init_ioports)
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pdata->init_ioports(pdata);
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ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
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return ret;
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}
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static int cpm_uart_drv_remove(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
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pr_debug("cpm_uart_drv_remove: Removing CPM UART %d\n",
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cpm_uart_id2nr(pdata->fs_no));
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uart_remove_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
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return 0;
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}
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static struct device_driver cpm_smc_uart_driver = {
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.name = "fsl-cpm-smc:uart",
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.bus = &platform_bus_type,
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.probe = cpm_uart_drv_probe,
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.remove = cpm_uart_drv_remove,
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};
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static struct device_driver cpm_scc_uart_driver = {
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.name = "fsl-cpm-scc:uart",
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.bus = &platform_bus_type,
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.probe = cpm_uart_drv_probe,
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.remove = cpm_uart_drv_remove,
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};
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/*
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This is supposed to match uart devices on platform bus,
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*/
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static int match_is_uart (struct device* dev, void* data)
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{
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struct platform_device* pdev = container_of(dev, struct platform_device, dev);
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int ret = 0;
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/* this was setfunc as uart */
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if(strstr(pdev->name,":uart")) {
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ret = 1;
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}
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return ret;
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}
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static int cpm_uart_init(void) {
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int ret;
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int i;
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struct device *dev;
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printk(KERN_INFO "Serial: CPM driver $Revision: 0.02 $\n");
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/* lookup the bus for uart devices */
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dev = bus_find_device(&platform_bus_type, NULL, 0, match_is_uart);
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/* There are devices on the bus - all should be OK */
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if (dev) {
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cpm_uart_count();
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cpm_reg.nr = cpm_uart_nr;
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if (!(ret = uart_register_driver(&cpm_reg))) {
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if ((ret = driver_register(&cpm_smc_uart_driver))) {
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uart_unregister_driver(&cpm_reg);
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return ret;
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}
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if ((ret = driver_register(&cpm_scc_uart_driver))) {
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driver_unregister(&cpm_scc_uart_driver);
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uart_unregister_driver(&cpm_reg);
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}
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}
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} else {
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/* No capable platform devices found - falling back to legacy mode */
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pr_info("cpm_uart: WARNING: no UART devices found on platform bus!\n");
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pr_info(
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"cpm_uart: the driver will guess configuration, but this mode is no longer supported.\n");
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/* Don't run this again, if the console driver did it already */
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if (cpm_uart_nr == 0)
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cpm_uart_init_portdesc();
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cpm_reg.nr = cpm_uart_nr;
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ret = uart_register_driver(&cpm_reg);
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if (ret)
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return ret;
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for (i = 0; i < cpm_uart_nr; i++) {
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int con = cpm_uart_port_map[i];
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cpm_uart_ports[con].port.line = i;
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cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
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if (cpm_uart_ports[con].set_lineif)
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cpm_uart_ports[con].set_lineif(&cpm_uart_ports[con]);
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uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
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}
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}
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return ret;
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}
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static void __exit cpm_uart_exit(void)
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{
|
||||
driver_unregister(&cpm_scc_uart_driver);
|
||||
driver_unregister(&cpm_smc_uart_driver);
|
||||
uart_unregister_driver(&cpm_reg);
|
||||
}
|
||||
#endif
|
||||
|
||||
module_init(cpm_uart_init);
|
||||
module_exit(cpm_uart_exit);
|
||||
|
@ -51,7 +51,6 @@
|
||||
|
||||
/**************************************************************/
|
||||
|
||||
#ifdef CONFIG_PPC_CPM_NEW_BINDING
|
||||
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
|
||||
{
|
||||
cpm_command(port->command, cmd);
|
||||
@ -68,75 +67,6 @@ void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram)
|
||||
iounmap(pram);
|
||||
}
|
||||
|
||||
#else
|
||||
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
|
||||
{
|
||||
ushort val;
|
||||
int line = port - cpm_uart_ports;
|
||||
volatile cpm8xx_t *cp = cpmp;
|
||||
|
||||
switch (line) {
|
||||
case UART_SMC1:
|
||||
val = mk_cr_cmd(CPM_CR_CH_SMC1, cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SMC2:
|
||||
val = mk_cr_cmd(CPM_CR_CH_SMC2, cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SCC1:
|
||||
val = mk_cr_cmd(CPM_CR_CH_SCC1, cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SCC2:
|
||||
val = mk_cr_cmd(CPM_CR_CH_SCC2, cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SCC3:
|
||||
val = mk_cr_cmd(CPM_CR_CH_SCC3, cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SCC4:
|
||||
val = mk_cr_cmd(CPM_CR_CH_SCC4, cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
|
||||
}
|
||||
cp->cp_cpcr = val;
|
||||
while (cp->cp_cpcr & CPM_CR_FLG) ;
|
||||
}
|
||||
|
||||
void smc1_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
pinfo->brg = 1;
|
||||
}
|
||||
|
||||
void smc2_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
pinfo->brg = 2;
|
||||
}
|
||||
|
||||
void scc1_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
/* XXX SCC1: insert port configuration here */
|
||||
pinfo->brg = 1;
|
||||
}
|
||||
|
||||
void scc2_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
/* XXX SCC2: insert port configuration here */
|
||||
pinfo->brg = 2;
|
||||
}
|
||||
|
||||
void scc3_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
/* XXX SCC3: insert port configuration here */
|
||||
pinfo->brg = 3;
|
||||
}
|
||||
|
||||
void scc4_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
/* XXX SCC4: insert port configuration here */
|
||||
pinfo->brg = 4;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Allocate DP-Ram and memory buffers. We need to allocate a transmit and
|
||||
* receive buffer descriptors from dual port ram, and a character
|
||||
@ -205,101 +135,3 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
|
||||
|
||||
cpm_dpfree(pinfo->dp_addr);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_PPC_CPM_NEW_BINDING
|
||||
/* Setup any dynamic params in the uart desc */
|
||||
int cpm_uart_init_portdesc(void)
|
||||
{
|
||||
pr_debug("CPM uart[-]:init portdesc\n");
|
||||
|
||||
cpm_uart_nr = 0;
|
||||
#ifdef CONFIG_SERIAL_CPM_SMC1
|
||||
cpm_uart_ports[UART_SMC1].smcp = &cpmp->cp_smc[0];
|
||||
/*
|
||||
* Is SMC1 being relocated?
|
||||
*/
|
||||
# ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
|
||||
cpm_uart_ports[UART_SMC1].smcup =
|
||||
(smc_uart_t *) & cpmp->cp_dparam[0x3C0];
|
||||
# else
|
||||
cpm_uart_ports[UART_SMC1].smcup =
|
||||
(smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC1];
|
||||
# endif
|
||||
cpm_uart_ports[UART_SMC1].port.mapbase =
|
||||
(unsigned long)&cpmp->cp_smc[0];
|
||||
cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
|
||||
cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
|
||||
cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SMC2
|
||||
cpm_uart_ports[UART_SMC2].smcp = &cpmp->cp_smc[1];
|
||||
cpm_uart_ports[UART_SMC2].smcup =
|
||||
(smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC2];
|
||||
cpm_uart_ports[UART_SMC2].port.mapbase =
|
||||
(unsigned long)&cpmp->cp_smc[1];
|
||||
cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
|
||||
cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
|
||||
cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC1
|
||||
cpm_uart_ports[UART_SCC1].sccp = &cpmp->cp_scc[0];
|
||||
cpm_uart_ports[UART_SCC1].sccup =
|
||||
(scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC1];
|
||||
cpm_uart_ports[UART_SCC1].port.mapbase =
|
||||
(unsigned long)&cpmp->cp_scc[0];
|
||||
cpm_uart_ports[UART_SCC1].sccp->scc_sccm &=
|
||||
~(UART_SCCM_TX | UART_SCCM_RX);
|
||||
cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &=
|
||||
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC2
|
||||
cpm_uart_ports[UART_SCC2].sccp = &cpmp->cp_scc[1];
|
||||
cpm_uart_ports[UART_SCC2].sccup =
|
||||
(scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC2];
|
||||
cpm_uart_ports[UART_SCC2].port.mapbase =
|
||||
(unsigned long)&cpmp->cp_scc[1];
|
||||
cpm_uart_ports[UART_SCC2].sccp->scc_sccm &=
|
||||
~(UART_SCCM_TX | UART_SCCM_RX);
|
||||
cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &=
|
||||
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC3
|
||||
cpm_uart_ports[UART_SCC3].sccp = &cpmp->cp_scc[2];
|
||||
cpm_uart_ports[UART_SCC3].sccup =
|
||||
(scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC3];
|
||||
cpm_uart_ports[UART_SCC3].port.mapbase =
|
||||
(unsigned long)&cpmp->cp_scc[2];
|
||||
cpm_uart_ports[UART_SCC3].sccp->scc_sccm &=
|
||||
~(UART_SCCM_TX | UART_SCCM_RX);
|
||||
cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &=
|
||||
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC4
|
||||
cpm_uart_ports[UART_SCC4].sccp = &cpmp->cp_scc[3];
|
||||
cpm_uart_ports[UART_SCC4].sccup =
|
||||
(scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC4];
|
||||
cpm_uart_ports[UART_SCC4].port.mapbase =
|
||||
(unsigned long)&cpmp->cp_scc[3];
|
||||
cpm_uart_ports[UART_SCC4].sccp->scc_sccm &=
|
||||
~(UART_SCCM_TX | UART_SCCM_RX);
|
||||
cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &=
|
||||
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
@ -12,16 +12,6 @@
|
||||
|
||||
#include <asm/cpm1.h>
|
||||
|
||||
/* defines for IRQs */
|
||||
#ifndef CONFIG_PPC_CPM_NEW_BINDING
|
||||
#define SMC1_IRQ (CPM_IRQ_OFFSET + CPMVEC_SMC1)
|
||||
#define SMC2_IRQ (CPM_IRQ_OFFSET + CPMVEC_SMC2)
|
||||
#define SCC1_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC1)
|
||||
#define SCC2_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC2)
|
||||
#define SCC3_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC3)
|
||||
#define SCC4_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC4)
|
||||
#endif
|
||||
|
||||
static inline void cpm_set_brg(int brg, int baud)
|
||||
{
|
||||
cpm_setbrg(brg, baud);
|
||||
|
@ -41,9 +41,7 @@
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/fs_pd.h>
|
||||
#ifdef CONFIG_PPC_CPM_NEW_BINDING
|
||||
#include <asm/prom.h>
|
||||
#endif
|
||||
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/kernel.h>
|
||||
@ -52,7 +50,6 @@
|
||||
|
||||
/**************************************************************/
|
||||
|
||||
#ifdef CONFIG_PPC_CPM_NEW_BINDING
|
||||
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
|
||||
{
|
||||
cpm_command(port->command, cmd);
|
||||
@ -106,172 +103,6 @@ void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram)
|
||||
iounmap(pram);
|
||||
}
|
||||
|
||||
#else
|
||||
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
|
||||
{
|
||||
ulong val;
|
||||
int line = port - cpm_uart_ports;
|
||||
volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
|
||||
|
||||
|
||||
switch (line) {
|
||||
case UART_SMC1:
|
||||
val = mk_cr_cmd(CPM_CR_SMC1_PAGE, CPM_CR_SMC1_SBLOCK, 0,
|
||||
cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SMC2:
|
||||
val = mk_cr_cmd(CPM_CR_SMC2_PAGE, CPM_CR_SMC2_SBLOCK, 0,
|
||||
cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SCC1:
|
||||
val = mk_cr_cmd(CPM_CR_SCC1_PAGE, CPM_CR_SCC1_SBLOCK, 0,
|
||||
cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SCC2:
|
||||
val = mk_cr_cmd(CPM_CR_SCC2_PAGE, CPM_CR_SCC2_SBLOCK, 0,
|
||||
cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SCC3:
|
||||
val = mk_cr_cmd(CPM_CR_SCC3_PAGE, CPM_CR_SCC3_SBLOCK, 0,
|
||||
cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
case UART_SCC4:
|
||||
val = mk_cr_cmd(CPM_CR_SCC4_PAGE, CPM_CR_SCC4_SBLOCK, 0,
|
||||
cmd) | CPM_CR_FLG;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
|
||||
}
|
||||
cp->cp_cpcr = val;
|
||||
while (cp->cp_cpcr & CPM_CR_FLG) ;
|
||||
|
||||
cpm2_unmap(cp);
|
||||
}
|
||||
|
||||
void smc1_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
volatile iop_cpm2_t *io = cpm2_map(im_ioport);
|
||||
volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
|
||||
|
||||
/* SMC1 is only on port D */
|
||||
io->iop_ppard |= 0x00c00000;
|
||||
io->iop_pdird |= 0x00400000;
|
||||
io->iop_pdird &= ~0x00800000;
|
||||
io->iop_psord &= ~0x00c00000;
|
||||
|
||||
/* Wire BRG1 to SMC1 */
|
||||
cpmux->cmx_smr &= 0x0f;
|
||||
pinfo->brg = 1;
|
||||
|
||||
cpm2_unmap(cpmux);
|
||||
cpm2_unmap(io);
|
||||
}
|
||||
|
||||
void smc2_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
volatile iop_cpm2_t *io = cpm2_map(im_ioport);
|
||||
volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
|
||||
|
||||
/* SMC2 is only on port A */
|
||||
io->iop_ppara |= 0x00c00000;
|
||||
io->iop_pdira |= 0x00400000;
|
||||
io->iop_pdira &= ~0x00800000;
|
||||
io->iop_psora &= ~0x00c00000;
|
||||
|
||||
/* Wire BRG2 to SMC2 */
|
||||
cpmux->cmx_smr &= 0xf0;
|
||||
pinfo->brg = 2;
|
||||
|
||||
cpm2_unmap(cpmux);
|
||||
cpm2_unmap(io);
|
||||
}
|
||||
|
||||
void scc1_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
volatile iop_cpm2_t *io = cpm2_map(im_ioport);
|
||||
volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
|
||||
|
||||
/* Use Port D for SCC1 instead of other functions. */
|
||||
io->iop_ppard |= 0x00000003;
|
||||
io->iop_psord &= ~0x00000001; /* Rx */
|
||||
io->iop_psord |= 0x00000002; /* Tx */
|
||||
io->iop_pdird &= ~0x00000001; /* Rx */
|
||||
io->iop_pdird |= 0x00000002; /* Tx */
|
||||
|
||||
/* Wire BRG1 to SCC1 */
|
||||
cpmux->cmx_scr &= 0x00ffffff;
|
||||
cpmux->cmx_scr |= 0x00000000;
|
||||
pinfo->brg = 1;
|
||||
|
||||
cpm2_unmap(cpmux);
|
||||
cpm2_unmap(io);
|
||||
}
|
||||
|
||||
void scc2_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
/*
|
||||
* STx GP3 uses the SCC2 secondary option pin assignment
|
||||
* which this driver doesn't account for in the static
|
||||
* pin assignments. This kind of board specific info
|
||||
* really has to get out of the driver so boards can
|
||||
* be supported in a sane fashion.
|
||||
*/
|
||||
volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
|
||||
#ifndef CONFIG_STX_GP3
|
||||
volatile iop_cpm2_t *io = cpm2_map(im_ioport);
|
||||
|
||||
io->iop_pparb |= 0x008b0000;
|
||||
io->iop_pdirb |= 0x00880000;
|
||||
io->iop_psorb |= 0x00880000;
|
||||
io->iop_pdirb &= ~0x00030000;
|
||||
io->iop_psorb &= ~0x00030000;
|
||||
#endif
|
||||
cpmux->cmx_scr &= 0xff00ffff;
|
||||
cpmux->cmx_scr |= 0x00090000;
|
||||
pinfo->brg = 2;
|
||||
|
||||
cpm2_unmap(cpmux);
|
||||
cpm2_unmap(io);
|
||||
}
|
||||
|
||||
void scc3_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
volatile iop_cpm2_t *io = cpm2_map(im_ioport);
|
||||
volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
|
||||
|
||||
io->iop_pparb |= 0x008b0000;
|
||||
io->iop_pdirb |= 0x00880000;
|
||||
io->iop_psorb |= 0x00880000;
|
||||
io->iop_pdirb &= ~0x00030000;
|
||||
io->iop_psorb &= ~0x00030000;
|
||||
cpmux->cmx_scr &= 0xffff00ff;
|
||||
cpmux->cmx_scr |= 0x00001200;
|
||||
pinfo->brg = 3;
|
||||
|
||||
cpm2_unmap(cpmux);
|
||||
cpm2_unmap(io);
|
||||
}
|
||||
|
||||
void scc4_lineif(struct uart_cpm_port *pinfo)
|
||||
{
|
||||
volatile iop_cpm2_t *io = cpm2_map(im_ioport);
|
||||
volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
|
||||
|
||||
io->iop_ppard |= 0x00000600;
|
||||
io->iop_psord &= ~0x00000600; /* Tx/Rx */
|
||||
io->iop_pdird &= ~0x00000200; /* Rx */
|
||||
io->iop_pdird |= 0x00000400; /* Tx */
|
||||
|
||||
cpmux->cmx_scr &= 0xffffff00;
|
||||
cpmux->cmx_scr |= 0x0000001b;
|
||||
pinfo->brg = 4;
|
||||
|
||||
cpm2_unmap(cpmux);
|
||||
cpm2_unmap(io);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Allocate DP-Ram and memory buffers. We need to allocate a transmit and
|
||||
* receive buffer descriptors from dual port ram, and a character
|
||||
@ -340,111 +171,3 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
|
||||
|
||||
cpm_dpfree(pinfo->dp_addr);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_PPC_CPM_NEW_BINDING
|
||||
/* Setup any dynamic params in the uart desc */
|
||||
int cpm_uart_init_portdesc(void)
|
||||
{
|
||||
#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2)
|
||||
u16 *addr;
|
||||
#endif
|
||||
pr_debug("CPM uart[-]:init portdesc\n");
|
||||
|
||||
cpm_uart_nr = 0;
|
||||
#ifdef CONFIG_SERIAL_CPM_SMC1
|
||||
cpm_uart_ports[UART_SMC1].smcp = (smc_t *) cpm2_map(im_smc[0]);
|
||||
cpm_uart_ports[UART_SMC1].port.mapbase =
|
||||
(unsigned long)cpm_uart_ports[UART_SMC1].smcp;
|
||||
|
||||
cpm_uart_ports[UART_SMC1].smcup =
|
||||
(smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC1], PROFF_SMC_SIZE);
|
||||
addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC1_BASE], 2);
|
||||
*addr = PROFF_SMC1;
|
||||
cpm2_unmap(addr);
|
||||
|
||||
cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
|
||||
cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
|
||||
cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SMC2
|
||||
cpm_uart_ports[UART_SMC2].smcp = (smc_t *) cpm2_map(im_smc[1]);
|
||||
cpm_uart_ports[UART_SMC2].port.mapbase =
|
||||
(unsigned long)cpm_uart_ports[UART_SMC2].smcp;
|
||||
|
||||
cpm_uart_ports[UART_SMC2].smcup =
|
||||
(smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC2], PROFF_SMC_SIZE);
|
||||
addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC2_BASE], 2);
|
||||
*addr = PROFF_SMC2;
|
||||
cpm2_unmap(addr);
|
||||
|
||||
cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
|
||||
cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
|
||||
cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC1
|
||||
cpm_uart_ports[UART_SCC1].sccp = (scc_t *) cpm2_map(im_scc[0]);
|
||||
cpm_uart_ports[UART_SCC1].port.mapbase =
|
||||
(unsigned long)cpm_uart_ports[UART_SCC1].sccp;
|
||||
cpm_uart_ports[UART_SCC1].sccup =
|
||||
(scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC1], PROFF_SCC_SIZE);
|
||||
|
||||
cpm_uart_ports[UART_SCC1].sccp->scc_sccm &=
|
||||
~(UART_SCCM_TX | UART_SCCM_RX);
|
||||
cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &=
|
||||
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC2
|
||||
cpm_uart_ports[UART_SCC2].sccp = (scc_t *) cpm2_map(im_scc[1]);
|
||||
cpm_uart_ports[UART_SCC2].port.mapbase =
|
||||
(unsigned long)cpm_uart_ports[UART_SCC2].sccp;
|
||||
cpm_uart_ports[UART_SCC2].sccup =
|
||||
(scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC2], PROFF_SCC_SIZE);
|
||||
|
||||
cpm_uart_ports[UART_SCC2].sccp->scc_sccm &=
|
||||
~(UART_SCCM_TX | UART_SCCM_RX);
|
||||
cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &=
|
||||
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC3
|
||||
cpm_uart_ports[UART_SCC3].sccp = (scc_t *) cpm2_map(im_scc[2]);
|
||||
cpm_uart_ports[UART_SCC3].port.mapbase =
|
||||
(unsigned long)cpm_uart_ports[UART_SCC3].sccp;
|
||||
cpm_uart_ports[UART_SCC3].sccup =
|
||||
(scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC3], PROFF_SCC_SIZE);
|
||||
|
||||
cpm_uart_ports[UART_SCC3].sccp->scc_sccm &=
|
||||
~(UART_SCCM_TX | UART_SCCM_RX);
|
||||
cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &=
|
||||
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_CPM_SCC4
|
||||
cpm_uart_ports[UART_SCC4].sccp = (scc_t *) cpm2_map(im_scc[3]);
|
||||
cpm_uart_ports[UART_SCC4].port.mapbase =
|
||||
(unsigned long)cpm_uart_ports[UART_SCC4].sccp;
|
||||
cpm_uart_ports[UART_SCC4].sccup =
|
||||
(scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC4], PROFF_SCC_SIZE);
|
||||
|
||||
cpm_uart_ports[UART_SCC4].sccp->scc_sccm &=
|
||||
~(UART_SCCM_TX | UART_SCCM_RX);
|
||||
cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &=
|
||||
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
|
||||
cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock();
|
||||
cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
@ -12,16 +12,6 @@
|
||||
|
||||
#include <asm/cpm2.h>
|
||||
|
||||
/* defines for IRQs */
|
||||
#ifndef CONFIG_PPC_CPM_NEW_BINDING
|
||||
#define SMC1_IRQ SIU_INT_SMC1
|
||||
#define SMC2_IRQ SIU_INT_SMC2
|
||||
#define SCC1_IRQ SIU_INT_SCC1
|
||||
#define SCC2_IRQ SIU_INT_SCC2
|
||||
#define SCC3_IRQ SIU_INT_SCC3
|
||||
#define SCC4_IRQ SIU_INT_SCC4
|
||||
#endif
|
||||
|
||||
static inline void cpm_set_brg(int brg, int baud)
|
||||
{
|
||||
cpm_setbrg(brg, baud);
|
||||
|
Loading…
Reference in New Issue
Block a user