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ASoC: jz4740: Improve build test coverage
Allow the jz4740 audio drivers to be build when CONFIG_COMPILE_TEST is selected. This should improve the build test coverage. There is one small piece of platform dependent code in the jz4740-i2s driver. It uses the DMA request type constants which are defined in a platform specific header. We can solve this by moving them from the platform specific header to the I2S driver. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -22,8 +22,6 @@ enum jz4740_dma_request_type {
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JZ4740_DMA_TYPE_UART_RECEIVE = 21,
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JZ4740_DMA_TYPE_SPI_TRANSMIT = 22,
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JZ4740_DMA_TYPE_SPI_RECEIVE = 23,
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JZ4740_DMA_TYPE_AIC_TRANSMIT = 24,
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JZ4740_DMA_TYPE_AIC_RECEIVE = 25,
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JZ4740_DMA_TYPE_MMC_TRANSMIT = 26,
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JZ4740_DMA_TYPE_MMC_RECEIVE = 27,
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JZ4740_DMA_TYPE_TCU = 28,
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@ -1,24 +1,29 @@
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config SND_JZ4740_SOC
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tristate "SoC Audio for Ingenic JZ4740 SoC"
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depends on MACH_JZ4740 && SND_SOC
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depends on MACH_JZ4740 || COMPILE_TEST
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select SND_SOC_GENERIC_DMAENGINE_PCM
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help
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Say Y or M if you want to add support for codecs attached to
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the JZ4740 I2S interface. You will also need to select the audio
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interfaces to support below.
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if SND_JZ4740_SOC
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config SND_JZ4740_SOC_I2S
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depends on SND_JZ4740_SOC
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tristate "SoC Audio (I2S protocol) for Ingenic JZ4740 SoC"
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depends on HAS_IOMEM
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help
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Say Y if you want to use I2S protocol and I2S codec on Ingenic JZ4740
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based boards.
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config SND_JZ4740_SOC_QI_LB60
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tristate "SoC Audio support for Qi LB60"
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depends on SND_JZ4740_SOC && JZ4740_QI_LB60
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depends on HAS_IOMEM
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depends on JZ4740_QI_LB60 || COMPILE_TEST
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select SND_JZ4740_SOC_I2S
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select SND_SOC_JZ4740_CODEC
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help
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Say Y if you want to add support for ASoC audio on the Qi LB60 board
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a.k.a Qi Ben NanoNote.
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endif
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@ -31,10 +31,11 @@
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#include <sound/initval.h>
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#include <sound/dmaengine_pcm.h>
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#include <asm/mach-jz4740/dma.h>
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#include "jz4740-i2s.h"
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#define JZ4740_DMA_TYPE_AIC_TRANSMIT 24
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#define JZ4740_DMA_TYPE_AIC_RECEIVE 25
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#define JZ_REG_AIC_CONF 0x00
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#define JZ_REG_AIC_CTRL 0x04
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#define JZ_REG_AIC_I2S_FMT 0x10
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