From 152ac60677aa3760d0850de0db33d495f55e8aba Mon Sep 17 00:00:00 2001 From: Hongbin Ji Date: Wed, 22 Feb 2023 17:21:28 +0800 Subject: [PATCH 1/5] spi: cadence-quadspi: Fix cancel the indirect read mask This is to cancel the indirect read transfer process, so should be use CQSPI_REG_INDIRECTRD_CANCEL_MASK Signed-off-by: Hongbin Ji Link: https://lore.kernel.org/r/20230222092128.4237-1-jhb_ee@163.com Signed-off-by: Mark Brown --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 2954c06a7f57..64b6a460d739 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -786,7 +786,7 @@ failrd: writel(0, reg_base + CQSPI_REG_IRQMASK); /* Cancel the indirect read */ - writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK, + writel(CQSPI_REG_INDIRECTRD_CANCEL_MASK, reg_base + CQSPI_REG_INDIRECTRD); return ret; } From 078a5517d22342eb0474046d3e891427a2552e3c Mon Sep 17 00:00:00 2001 From: Dhruva Gole Date: Thu, 23 Feb 2023 15:22:02 +0530 Subject: [PATCH 2/5] spi: spi-sn-f-ospi: fix duplicate flag while assigning to mode_bits Replace the SPI_TX_OCTAL flag that appeared two time with SPI_RX_OCTAL in the chain of '|' operators while assigning to mode_bits Fixes: 1b74dd64c861 ("spi: Add Socionext F_OSPI SPI flash controller driver") Reported-by: David Binderman Link: https://lore.kernel.org/all/DB6P189MB0568F3BE9384315F5C8C1A3E9CA49@DB6P189MB0568.EURP189.PROD.OUTLOOK.COM/ Cc: stable@vger.kernel.org Signed-off-by: Dhruva Gole Link: https://lore.kernel.org/r/20230223095202.924626-1-d-gole@ti.com Signed-off-by: Mark Brown --- drivers/spi/spi-sn-f-ospi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-sn-f-ospi.c b/drivers/spi/spi-sn-f-ospi.c index 348c6e1edd38..333b22dfd8db 100644 --- a/drivers/spi/spi-sn-f-ospi.c +++ b/drivers/spi/spi-sn-f-ospi.c @@ -611,7 +611,7 @@ static int f_ospi_probe(struct platform_device *pdev) return -ENOMEM; ctlr->mode_bits = SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL - | SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_OCTAL + | SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL | SPI_MODE_0 | SPI_MODE_1 | SPI_LSB_FIRST; ctlr->mem_ops = &f_ospi_mem_ops; ctlr->bus_num = -1; From f7482d8285b638be87a594a30edaaf1341135c1a Mon Sep 17 00:00:00 2001 From: Krishna Yarlagadda Date: Thu, 23 Feb 2023 21:56:34 +0530 Subject: [PATCH 3/5] spi: tegra210-quad: set half duplex flag Tegra QSPI controller only supports half duplex transfers. Set half duplex constrain flag. Signed-off-by: Krishna Yarlagadda Link: https://lore.kernel.org/r/20230223162635.19747-3-kyarlagadda@nvidia.com Signed-off-by: Mark Brown --- drivers/spi/spi-tegra210-quad.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index 9f356612ba7e..258e3b8c9c2c 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -1532,6 +1532,7 @@ static int tegra_qspi_probe(struct platform_device *pdev) master->mode_bits = SPI_MODE_0 | SPI_MODE_3 | SPI_CS_HIGH | SPI_TX_DUAL | SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD; master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | SPI_BPW_MASK(8); + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->setup = tegra_qspi_setup; master->transfer_one_message = tegra_qspi_transfer_one_message; master->num_chipselect = 1; From 047ee71ae4f412d8819e39e4b08c588fa299cfc2 Mon Sep 17 00:00:00 2001 From: Krishna Yarlagadda Date: Fri, 24 Feb 2023 22:10:34 +0530 Subject: [PATCH 4/5] spi: tegra210-quad: Fix validate combined sequence Check for non dma transfers that do not fit in FIFO has issue and skips combined sequence for Tegra234 & Tegra241 which does not have GPCDMA. Fixes: 1b8342cc4a38 ("spi: tegra210-quad: combined sequence mode") Signed-off-by: Krishna Yarlagadda Link: https://lore.kernel.org/r/20230224164034.56933-1-kyarlagadda@nvidia.com Signed-off-by: Mark Brown --- drivers/spi/spi-tegra210-quad.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index 258e3b8c9c2c..9aaca2289c59 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -1297,7 +1297,7 @@ static bool tegra_qspi_validate_cmb_seq(struct tegra_qspi *tqspi, if (xfer->len > 4 || xfer->len < 3) return false; xfer = list_next_entry(xfer, transfer_list); - if (!tqspi->soc_data->has_dma || xfer->len > (QSPI_FIFO_DEPTH << 2)) + if (!tqspi->soc_data->has_dma && xfer->len > (QSPI_FIFO_DEPTH << 2)) return false; return true; From 2449d436681d40bc63ec2c766fd51b632270d8a7 Mon Sep 17 00:00:00 2001 From: Krishna Yarlagadda Date: Tue, 28 Feb 2023 01:34:28 +0530 Subject: [PATCH 5/5] spi: tegra210-quad: Fix iterator outside loop Fix warn: iterator used outside loop: 'xfer'. 'xfer' variable contain invalid value in few conditions. Complete transfer within DATA phase in successful case and at the end for failed transfer. Reported-by: Dan Carpenter Link:https://lore.kernel.org/all/202210191211.46FkzKmv-lkp@intel.com/ Fixes: 8777dd9dff40 ("spi: tegra210-quad: Fix combined sequence") Signed-off-by: Krishna Yarlagadda Link: https://lore.kernel.org/r/20230227200428.45832-1-kyarlagadda@nvidia.com Signed-off-by: Mark Brown --- drivers/spi/spi-tegra210-quad.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index 9aaca2289c59..0b9bc3b7f53a 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -1156,6 +1156,10 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi, ret = -EIO; goto exit; } + if (!xfer->cs_change) { + tegra_qspi_transfer_end(spi); + spi_transfer_delay_exec(xfer); + } break; default: ret = -EINVAL; @@ -1164,14 +1168,14 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi, msg->actual_length += xfer->len; transfer_phase++; } - if (!xfer->cs_change) { - tegra_qspi_transfer_end(spi); - spi_transfer_delay_exec(xfer); - } ret = 0; exit: msg->status = ret; + if (ret < 0) { + tegra_qspi_transfer_end(spi); + spi_transfer_delay_exec(xfer); + } return ret; }