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ARM: dts: r8a7792: add EtherAVB clocks
Add the EtherAVB clock and its parent, HP clock to the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -471,6 +471,13 @@
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clock-div = <6>;
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clock-div = <6>;
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clock-mult = <1>;
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clock-mult = <1>;
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};
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};
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hp_clk: hp {
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
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#clock-cells = <0>;
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clock-div = <12>;
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clock-mult = <1>;
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};
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p_clk: p {
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p_clk: p {
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compatible = "fixed-factor-clock";
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
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clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
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@ -538,6 +545,15 @@
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clock-output-names = "hscif1", "hscif0", "scif3",
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clock-output-names = "hscif1", "hscif0", "scif3",
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"scif2", "scif1", "scif0";
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"scif2", "scif1", "scif0";
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};
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};
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mstp8_clks: mstp8_clks@e6150990 {
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compatible = "renesas,r8a7792-mstp-clocks",
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"renesas,cpg-mstp-clocks";
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reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
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clocks = <&hp_clk>;
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#clock-cells = <1>;
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clock-indices = <R8A7792_CLK_ETHERAVB>;
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clock-output-names = "etheravb";
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};
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mstp9_clks: mstp9_clks@e6150994 {
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mstp9_clks: mstp9_clks@e6150994 {
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compatible = "renesas,r8a7792-mstp-clocks",
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compatible = "renesas,r8a7792-mstp-clocks",
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"renesas,cpg-mstp-clocks";
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"renesas,cpg-mstp-clocks";
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