mirror of
https://github.com/edk2-porting/linux-next.git
synced 2025-01-10 06:34:17 +08:00
ARM: dts: r8a7792: add EtherAVB clocks
Add the EtherAVB clock and its parent, HP clock to the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
parent
63359c2ddc
commit
08cafff67e
@ -471,6 +471,13 @@
|
||||
clock-div = <6>;
|
||||
clock-mult = <1>;
|
||||
};
|
||||
hp_clk: hp {
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
|
||||
#clock-cells = <0>;
|
||||
clock-div = <12>;
|
||||
clock-mult = <1>;
|
||||
};
|
||||
p_clk: p {
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
|
||||
@ -538,6 +545,15 @@
|
||||
clock-output-names = "hscif1", "hscif0", "scif3",
|
||||
"scif2", "scif1", "scif0";
|
||||
};
|
||||
mstp8_clks: mstp8_clks@e6150990 {
|
||||
compatible = "renesas,r8a7792-mstp-clocks",
|
||||
"renesas,cpg-mstp-clocks";
|
||||
reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
|
||||
clocks = <&hp_clk>;
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <R8A7792_CLK_ETHERAVB>;
|
||||
clock-output-names = "etheravb";
|
||||
};
|
||||
mstp9_clks: mstp9_clks@e6150994 {
|
||||
compatible = "renesas,r8a7792-mstp-clocks",
|
||||
"renesas,cpg-mstp-clocks";
|
||||
|
Loading…
Reference in New Issue
Block a user