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rt2x00: Update comments regarding TXWI and TX_STA_FIFO
Add some comments about the TXWI fields and the TX_STA_FIFO register. Especially describe the relationship between the TXWI field PACKETID and the PID field in the TX_STA_FIFO register. Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1318,7 +1318,25 @@
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#define TX_STA_CNT2_TX_UNDER_FLOW_COUNT FIELD32(0xffff0000)
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/*
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* TX_STA_FIFO: TX Result for specific PID status fifo register
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* TX_STA_FIFO: TX Result for specific PID status fifo register.
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*
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* This register is implemented as FIFO with 16 entries in the HW. Each
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* register read fetches the next tx result. If the FIFO is full because
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* it wasn't read fast enough after the according interrupt (TX_FIFO_STATUS)
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* triggered, the hw seems to simply drop further tx results.
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*
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* VALID: 1: this tx result is valid
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* 0: no valid tx result -> driver should stop reading
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* PID_TYPE: The PID latched from the PID field in the TXWI, can be used
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* to match a frame with its tx result (even though the PID is
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* only 4 bits wide).
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* TX_SUCCESS: Indicates tx success (1) or failure (0)
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* TX_AGGRE: Indicates if the frame was part of an aggregate (1) or not (0)
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* TX_ACK_REQUIRED: Indicates if the frame needed to get ack'ed (1) or not (0)
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* WCID: The wireless client ID.
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* MCS: The tx rate used during the last transmission of this frame, be it
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* successful or not.
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* PHYMODE: The phymode used for the transmission.
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*/
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#define TX_STA_FIFO 0x1718
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#define TX_STA_FIFO_VALID FIELD32(0x00000001)
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@ -1945,6 +1963,13 @@ struct mac_iveiv_entry {
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/*
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* Word1
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* ACK: 0: No Ack needed, 1: Ack needed
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* NSEQ: 0: Don't assign hw sequence number, 1: Assign hw sequence number
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* BW_WIN_SIZE: BA windows size of the recipient
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* WIRELESS_CLI_ID: Client ID for WCID table access
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* MPDU_TOTAL_BYTE_COUNT: Length of 802.11 frame
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* PACKETID: Will be latched into the TX_STA_FIFO register once the according
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* frame was processed. 0: Don't report tx status for this frame.
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*/
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#define TXWI_W1_ACK FIELD32(0x00000001)
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#define TXWI_W1_NSEQ FIELD32(0x00000002)
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