mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-28 15:13:55 +08:00
drm/radeon: move lockup detection code into radeon_ring.c
It isn't chipset specific, so it makes no sense to have that inside r100.c. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
parent
6c6f478370
commit
069211e555
@ -2424,7 +2424,6 @@ bool evergreen_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *rin
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u32 srbm_status;
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u32 grbm_status;
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u32 grbm_status_se0, grbm_status_se1;
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struct r100_gpu_lockup *lockup = &rdev->config.evergreen.lockup;
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int r;
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srbm_status = RREG32(SRBM_STATUS);
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@ -2432,7 +2431,7 @@ bool evergreen_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *rin
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grbm_status_se0 = RREG32(GRBM_STATUS_SE0);
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grbm_status_se1 = RREG32(GRBM_STATUS_SE1);
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if (!(grbm_status & GUI_ACTIVE)) {
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r100_gpu_lockup_update(lockup, ring);
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radeon_ring_lockup_update(ring);
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return false;
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}
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/* force CP activities */
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@ -2444,7 +2443,7 @@ bool evergreen_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *rin
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radeon_ring_unlock_commit(rdev, ring);
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}
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ring->rptr = RREG32(CP_RB_RPTR);
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return r100_gpu_cp_is_lockup(rdev, lockup, ring);
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return radeon_ring_test_lockup(rdev, ring);
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}
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static int evergreen_gpu_soft_reset(struct radeon_device *rdev)
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@ -1397,7 +1397,6 @@ bool cayman_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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u32 srbm_status;
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u32 grbm_status;
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u32 grbm_status_se0, grbm_status_se1;
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struct r100_gpu_lockup *lockup = &rdev->config.cayman.lockup;
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int r;
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srbm_status = RREG32(SRBM_STATUS);
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@ -1405,7 +1404,7 @@ bool cayman_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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grbm_status_se0 = RREG32(GRBM_STATUS_SE0);
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grbm_status_se1 = RREG32(GRBM_STATUS_SE1);
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if (!(grbm_status & GUI_ACTIVE)) {
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r100_gpu_lockup_update(lockup, ring);
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radeon_ring_lockup_update(ring);
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return false;
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}
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/* force CP activities */
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@ -1418,7 +1417,7 @@ bool cayman_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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}
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/* XXX deal with CP0,1,2 */
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ring->rptr = RREG32(ring->rptr_reg);
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return r100_gpu_cp_is_lockup(rdev, lockup, ring);
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return radeon_ring_test_lockup(rdev, ring);
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}
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static int cayman_gpu_soft_reset(struct radeon_device *rdev)
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@ -2159,59 +2159,6 @@ int r100_mc_wait_for_idle(struct radeon_device *rdev)
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return -1;
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}
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void r100_gpu_lockup_update(struct r100_gpu_lockup *lockup, struct radeon_ring *ring)
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{
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lockup->last_cp_rptr = ring->rptr;
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lockup->last_jiffies = jiffies;
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}
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/**
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* r100_gpu_cp_is_lockup() - check if CP is lockup by recording information
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* @rdev: radeon device structure
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* @lockup: r100_gpu_lockup structure holding CP lockup tracking informations
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* @cp: radeon_cp structure holding CP information
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*
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* We don't need to initialize the lockup tracking information as we will either
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* have CP rptr to a different value of jiffies wrap around which will force
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* initialization of the lockup tracking informations.
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*
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* A possible false positivie is if we get call after while and last_cp_rptr ==
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* the current CP rptr, even if it's unlikely it might happen. To avoid this
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* if the elapsed time since last call is bigger than 2 second than we return
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* false and update the tracking information. Due to this the caller must call
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* r100_gpu_cp_is_lockup several time in less than 2sec for lockup to be reported
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* the fencing code should be cautious about that.
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*
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* Caller should write to the ring to force CP to do something so we don't get
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* false positive when CP is just gived nothing to do.
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*
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**/
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bool r100_gpu_cp_is_lockup(struct radeon_device *rdev, struct r100_gpu_lockup *lockup, struct radeon_ring *ring)
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{
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unsigned long cjiffies, elapsed;
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cjiffies = jiffies;
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if (!time_after(cjiffies, lockup->last_jiffies)) {
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/* likely a wrap around */
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lockup->last_cp_rptr = ring->rptr;
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lockup->last_jiffies = jiffies;
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return false;
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}
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if (ring->rptr != lockup->last_cp_rptr) {
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/* CP is still working no lockup */
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lockup->last_cp_rptr = ring->rptr;
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lockup->last_jiffies = jiffies;
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return false;
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}
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elapsed = jiffies_to_msecs(cjiffies - lockup->last_jiffies);
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if (elapsed >= 10000) {
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dev_err(rdev->dev, "GPU lockup CP stall for more than %lumsec\n", elapsed);
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return true;
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}
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/* give a chance to the GPU ... */
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return false;
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}
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bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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{
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u32 rbbm_status;
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@ -2219,7 +2166,7 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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rbbm_status = RREG32(R_000E40_RBBM_STATUS);
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if (!G_000E40_GUI_ACTIVE(rbbm_status)) {
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r100_gpu_lockup_update(&rdev->config.r100.lockup, ring);
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radeon_ring_lockup_update(ring);
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return false;
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}
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/* force CP activities */
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@ -2231,7 +2178,7 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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radeon_ring_unlock_commit(rdev, ring);
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}
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ring->rptr = RREG32(ring->rptr_reg);
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return r100_gpu_cp_is_lockup(rdev, &rdev->config.r100.lockup, ring);
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return radeon_ring_test_lockup(rdev, ring);
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}
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void r100_bm_disable(struct radeon_device *rdev)
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@ -384,7 +384,7 @@ bool r300_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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rbbm_status = RREG32(R_000E40_RBBM_STATUS);
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if (!G_000E40_GUI_ACTIVE(rbbm_status)) {
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r100_gpu_lockup_update(&rdev->config.r300.lockup, ring);
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radeon_ring_lockup_update(ring);
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return false;
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}
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/* force CP activities */
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@ -396,7 +396,7 @@ bool r300_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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radeon_ring_unlock_commit(rdev, ring);
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}
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ring->rptr = RREG32(RADEON_CP_RB_RPTR);
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return r100_gpu_cp_is_lockup(rdev, &rdev->config.r300.lockup, ring);
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return radeon_ring_test_lockup(rdev, ring);
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}
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int r300_asic_reset(struct radeon_device *rdev)
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@ -1350,19 +1350,13 @@ bool r600_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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u32 srbm_status;
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u32 grbm_status;
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u32 grbm_status2;
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struct r100_gpu_lockup *lockup;
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int r;
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if (rdev->family >= CHIP_RV770)
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lockup = &rdev->config.rv770.lockup;
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else
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lockup = &rdev->config.r600.lockup;
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srbm_status = RREG32(R_000E50_SRBM_STATUS);
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grbm_status = RREG32(R_008010_GRBM_STATUS);
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grbm_status2 = RREG32(R_008014_GRBM_STATUS2);
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if (!G_008010_GUI_ACTIVE(grbm_status)) {
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r100_gpu_lockup_update(lockup, ring);
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radeon_ring_lockup_update(ring);
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return false;
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}
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/* force CP activities */
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@ -1374,7 +1368,7 @@ bool r600_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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radeon_ring_unlock_commit(rdev, ring);
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}
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ring->rptr = RREG32(ring->rptr_reg);
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return r100_gpu_cp_is_lockup(rdev, lockup, ring);
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return radeon_ring_test_lockup(rdev, ring);
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}
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int r600_asic_reset(struct radeon_device *rdev)
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@ -670,6 +670,8 @@ struct radeon_ring {
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unsigned ring_size;
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unsigned ring_free_dw;
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int count_dw;
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unsigned long last_activity;
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unsigned last_rptr;
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uint64_t gpu_addr;
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uint32_t align_mask;
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uint32_t ptr_mask;
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@ -814,6 +816,8 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *cp);
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void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *cp);
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void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *cp);
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int radeon_ring_test(struct radeon_device *rdev, struct radeon_ring *cp);
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void radeon_ring_lockup_update(struct radeon_ring *ring);
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bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring);
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int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size,
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unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,
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u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop);
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@ -1272,16 +1276,10 @@ struct radeon_asic {
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/*
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* Asic structures
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*/
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struct r100_gpu_lockup {
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unsigned long last_jiffies;
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u32 last_cp_rptr;
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};
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struct r100_asic {
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const unsigned *reg_safe_bm;
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unsigned reg_safe_bm_size;
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u32 hdp_cntl;
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struct r100_gpu_lockup lockup;
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};
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struct r300_asic {
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@ -1289,7 +1287,6 @@ struct r300_asic {
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unsigned reg_safe_bm_size;
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u32 resync_scratch;
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u32 hdp_cntl;
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struct r100_gpu_lockup lockup;
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};
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struct r600_asic {
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@ -1311,7 +1308,6 @@ struct r600_asic {
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unsigned tiling_group_size;
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unsigned tile_config;
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unsigned backend_map;
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struct r100_gpu_lockup lockup;
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};
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struct rv770_asic {
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@ -1337,7 +1333,6 @@ struct rv770_asic {
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unsigned tiling_group_size;
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unsigned tile_config;
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unsigned backend_map;
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struct r100_gpu_lockup lockup;
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};
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struct evergreen_asic {
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@ -1364,7 +1359,6 @@ struct evergreen_asic {
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unsigned tiling_group_size;
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unsigned tile_config;
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unsigned backend_map;
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struct r100_gpu_lockup lockup;
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};
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struct cayman_asic {
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@ -1403,7 +1397,6 @@ struct cayman_asic {
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unsigned multi_gpu_tile_size;
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unsigned tile_config;
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struct r100_gpu_lockup lockup;
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};
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struct si_asic {
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@ -1434,7 +1427,6 @@ struct si_asic {
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unsigned multi_gpu_tile_size;
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unsigned tile_config;
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struct r100_gpu_lockup lockup;
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};
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union radeon_asic_config {
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@ -103,11 +103,6 @@ int r100_pci_gart_enable(struct radeon_device *rdev);
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void r100_pci_gart_disable(struct radeon_device *rdev);
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int r100_debugfs_mc_info_init(struct radeon_device *rdev);
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int r100_gui_wait_for_idle(struct radeon_device *rdev);
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void r100_gpu_lockup_update(struct r100_gpu_lockup *lockup,
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struct radeon_ring *cp);
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bool r100_gpu_cp_is_lockup(struct radeon_device *rdev,
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struct r100_gpu_lockup *lockup,
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struct radeon_ring *cp);
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void r100_ib_fini(struct radeon_device *rdev);
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int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
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void r100_irq_disable(struct radeon_device *rdev);
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@ -396,6 +396,59 @@ void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *rin
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mutex_unlock(&ring->mutex);
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}
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void radeon_ring_lockup_update(struct radeon_ring *ring)
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{
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ring->last_rptr = ring->rptr;
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ring->last_activity = jiffies;
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}
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/**
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* radeon_ring_test_lockup() - check if ring is lockedup by recording information
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* @rdev: radeon device structure
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* @ring: radeon_ring structure holding ring information
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*
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* We don't need to initialize the lockup tracking information as we will either
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* have CP rptr to a different value of jiffies wrap around which will force
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* initialization of the lockup tracking informations.
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*
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* A possible false positivie is if we get call after while and last_cp_rptr ==
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* the current CP rptr, even if it's unlikely it might happen. To avoid this
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* if the elapsed time since last call is bigger than 2 second than we return
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* false and update the tracking information. Due to this the caller must call
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* radeon_ring_test_lockup several time in less than 2sec for lockup to be reported
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* the fencing code should be cautious about that.
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*
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* Caller should write to the ring to force CP to do something so we don't get
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* false positive when CP is just gived nothing to do.
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*
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**/
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bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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{
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unsigned long cjiffies, elapsed;
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uint32_t rptr;
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cjiffies = jiffies;
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if (!time_after(cjiffies, ring->last_activity)) {
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/* likely a wrap around */
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radeon_ring_lockup_update(ring);
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return false;
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}
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rptr = RREG32(ring->rptr_reg);
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ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
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if (ring->rptr != ring->last_rptr) {
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/* CP is still working no lockup */
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radeon_ring_lockup_update(ring);
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return false;
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}
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elapsed = jiffies_to_msecs(cjiffies - ring->last_activity);
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if (elapsed >= 10000) {
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dev_err(rdev->dev, "GPU lockup CP stall for more than %lumsec\n", elapsed);
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return true;
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}
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/* give a chance to the GPU ... */
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return false;
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}
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int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
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unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,
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u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop)
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@ -2217,7 +2217,6 @@ bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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u32 srbm_status;
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u32 grbm_status, grbm_status2;
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u32 grbm_status_se0, grbm_status_se1;
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struct r100_gpu_lockup *lockup = &rdev->config.si.lockup;
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int r;
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srbm_status = RREG32(SRBM_STATUS);
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@ -2226,7 +2225,7 @@ bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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grbm_status_se0 = RREG32(GRBM_STATUS_SE0);
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grbm_status_se1 = RREG32(GRBM_STATUS_SE1);
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if (!(grbm_status & GUI_ACTIVE)) {
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r100_gpu_lockup_update(lockup, ring);
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radeon_ring_lockup_update(ring);
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return false;
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}
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/* force CP activities */
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@ -2239,7 +2238,7 @@ bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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}
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/* XXX deal with CP0,1,2 */
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ring->rptr = RREG32(ring->rptr_reg);
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return r100_gpu_cp_is_lockup(rdev, lockup, ring);
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return radeon_ring_test_lockup(rdev, ring);
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}
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static int si_gpu_soft_reset(struct radeon_device *rdev)
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