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dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather
The AXIDMA and CDMA HW can be either direct-access or scatter-gather version. These are SW incompatible. The driver can handle both versions: a DT property was used to tell the driver whether to assume the HW is in scatter-gather mode. This patch makes the driver to autodetect this information. The DT property is not required anymore. No changes for VDMA. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -86,6 +86,7 @@
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#define XILINX_DMA_DMASR_DMA_DEC_ERR BIT(6)
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#define XILINX_DMA_DMASR_DMA_SLAVE_ERR BIT(5)
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#define XILINX_DMA_DMASR_DMA_INT_ERR BIT(4)
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#define XILINX_DMA_DMASR_SG_MASK BIT(3)
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#define XILINX_DMA_DMASR_IDLE BIT(1)
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#define XILINX_DMA_DMASR_HALTED BIT(0)
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#define XILINX_DMA_DMASR_DELAY_MASK GENMASK(31, 24)
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@ -414,7 +415,6 @@ struct xilinx_dma_config {
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* @dev: Device Structure
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* @common: DMA device structure
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* @chan: Driver specific DMA channel
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* @has_sg: Specifies whether Scatter-Gather is present or not
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* @mcdma: Specifies whether Multi-Channel is present or not
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* @flush_on_fsync: Flush on frame sync
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* @ext_addr: Indicates 64 bit addressing is supported by dma device
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@ -434,7 +434,6 @@ struct xilinx_dma_device {
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struct device *dev;
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struct dma_device common;
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struct xilinx_dma_chan *chan[XILINX_DMA_MAX_CHANS_PER_DEVICE];
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bool has_sg;
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bool mcdma;
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u32 flush_on_fsync;
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bool ext_addr;
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@ -2421,7 +2420,6 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev,
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chan->dev = xdev->dev;
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chan->xdev = xdev;
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chan->has_sg = xdev->has_sg;
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chan->desc_pendingcount = 0x0;
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chan->ext_addr = xdev->ext_addr;
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/* This variable ensures that descriptors are not
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@ -2521,6 +2519,15 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev,
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chan->stop_transfer = xilinx_dma_stop_transfer;
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}
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/* check if SG is enabled (only for AXIDMA and CDMA) */
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if (xdev->dma_config->dmatype != XDMA_TYPE_VDMA) {
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if (dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) &
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XILINX_DMA_DMASR_SG_MASK)
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chan->has_sg = true;
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dev_dbg(chan->dev, "ch %d: SG %s\n", chan->id,
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chan->has_sg ? "enabled" : "disabled");
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}
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/* Initialize the tasklet */
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tasklet_init(&chan->tasklet, xilinx_dma_do_tasklet,
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(unsigned long)chan);
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@ -2659,7 +2666,6 @@ static int xilinx_dma_probe(struct platform_device *pdev)
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return PTR_ERR(xdev->regs);
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/* Retrieve the DMA engine properties from the device tree */
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xdev->has_sg = of_property_read_bool(node, "xlnx,include-sg");
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xdev->max_buffer_len = GENMASK(XILINX_DMA_MAX_TRANS_LEN_MAX - 1, 0);
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if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {
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