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ARM: convert arm/arm64 arch timer to use CLKSRC_OF init
This converts arm and arm64 to use CLKSRC_OF DT based initialization for the arch timer. A new function arch_timer_arch_init is added to allow for arch specific setup. This has a side effect of enabling sched_clock on omap5 and exynos5. There should not be any reason not to use the arch timers for sched_clock. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-sh@vger.kernel.org Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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@ -10,8 +10,7 @@
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#include <clocksource/arm_arch_timer.h>
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#ifdef CONFIG_ARM_ARCH_TIMER
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int arch_timer_of_register(void);
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int arch_timer_sched_clock_init(void);
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int arch_timer_arch_init(void);
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/*
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* These register accessors are marked inline so the compiler can
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@ -110,16 +109,6 @@ static inline void __cpuinit arch_counter_set_user_access(void)
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asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
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}
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#else
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static inline int arch_timer_of_register(void)
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{
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return -ENXIO;
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}
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static inline int arch_timer_sched_clock_init(void)
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{
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return -ENXIO;
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}
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#endif
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#endif
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@ -39,26 +39,15 @@ static void __init arch_timer_delay_timer_register(void)
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register_current_timer_delay(&arch_delay_timer);
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}
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int __init arch_timer_of_register(void)
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{
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int ret;
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ret = arch_timer_init();
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if (ret)
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return ret;
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arch_timer_delay_timer_register();
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return 0;
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}
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int __init arch_timer_sched_clock_init(void)
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int __init arch_timer_arch_init(void)
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{
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u32 arch_timer_rate = arch_timer_get_rate();
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if (arch_timer_rate == 0)
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return -ENXIO;
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arch_timer_delay_timer_register();
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/* Cache the sched_clock multiplier to save a divide in the hot path. */
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sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;
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sched_clock_func = arch_timer_sched_clock;
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@ -216,7 +216,6 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
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.map_io = exynos5_dt_map_io,
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.init_machine = exynos5_dt_machine_init,
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.init_late = exynos_init_late,
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.init_time = exynos4_timer_init,
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.dt_compat = exynos5_dt_compat,
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.restart = exynos5_restart,
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.reserve = exynos5_reserve,
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@ -21,7 +21,6 @@
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#include <linux/percpu.h>
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#include <linux/of.h>
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#include <asm/arch_timer.h>
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#include <asm/localtimer.h>
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#include <plat/cpu.h>
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@ -469,11 +468,6 @@ static void __init exynos4_timer_resources(void)
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void __init exynos4_timer_init(void)
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{
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if (soc_is_exynos5440()) {
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arch_timer_of_register();
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return;
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}
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if ((soc_is_exynos4210()) || (soc_is_exynos5250()))
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mct_int_type = MCT_INT_SPI;
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else
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@ -15,6 +15,7 @@
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*/
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/clocksource.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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@ -28,7 +29,6 @@
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#include <linux/amba/bus.h>
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#include <linux/clk-provider.h>
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#include <asm/arch_timer.h>
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#include <asm/cacheflush.h>
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#include <asm/cputype.h>
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#include <asm/smp_plat.h>
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@ -118,9 +118,6 @@ static void __init highbank_timer_init(void)
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sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
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sp804_clockevents_init(timer_base, irq, "timer0");
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arch_timer_of_register();
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arch_timer_sched_clock_init();
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clocksource_of_init();
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}
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@ -46,7 +46,6 @@
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#include <asm/smp_twd.h>
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#include <asm/sched_clock.h>
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#include <asm/arch_timer.h>
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#include "omap_hwmod.h"
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#include "omap_device.h"
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#include <plat/counter-32k.h>
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@ -624,9 +623,7 @@ void __init omap5_realtime_timer_init(void)
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omap5_sync32k_timer_init();
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realtime_counter_init();
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err = arch_timer_of_register();
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if (err)
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pr_err("%s: arch_timer_register failed %d\n", __func__, err);
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clocksource_of_init();
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}
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#endif /* CONFIG_SOC_OMAP5 */
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@ -90,6 +90,5 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
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.init_irq = emev2_init_irq,
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.init_machine = kzm9d_add_standard_devices,
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.init_late = shmobile_init_late,
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.init_time = shmobile_timer_init,
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.dt_compat = kzm9d_boards_compat_dt,
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MACHINE_END
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@ -456,7 +456,6 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
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.nr_irqs = NR_IRQS_LEGACY,
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.init_irq = irqchip_init,
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.init_machine = emev2_add_standard_devices_dt,
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.init_time = shmobile_timer_init,
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.dt_compat = emev2_boards_compat_dt,
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MACHINE_END
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@ -906,7 +906,6 @@ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
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.init_irq = r8a7740_init_irq,
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.handle_irq = shmobile_handle_irq_intc,
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.init_machine = r8a7740_add_standard_devices_dt,
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.init_time = shmobile_timer_init,
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.dt_compat = r8a7740_boards_compat_dt,
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MACHINE_END
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@ -1175,7 +1175,6 @@ DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
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.init_irq = sh7372_init_irq,
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.handle_irq = shmobile_handle_irq_intc,
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.init_machine = sh7372_add_standard_devices_dt,
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.init_time = shmobile_timer_init,
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.dt_compat = sh7372_boards_compat_dt,
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MACHINE_END
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@ -923,7 +923,6 @@ DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
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.nr_irqs = NR_IRQS_LEGACY,
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.init_irq = sh73a0_init_irq_dt,
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.init_machine = sh73a0_add_standard_devices_dt,
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.init_time = shmobile_timer_init,
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.dt_compat = sh73a0_boards_compat_dt,
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MACHINE_END
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#endif /* CONFIG_USE_OF */
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@ -19,10 +19,8 @@
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/clocksource.h>
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#include <linux/delay.h>
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#include <asm/arch_timer.h>
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#include <asm/mach/time.h>
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#include <asm/smp_twd.h>
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void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
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unsigned int mult, unsigned int div)
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@ -63,6 +61,5 @@ void __init shmobile_earlytimer_init(void)
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void __init shmobile_timer_init(void)
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{
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arch_timer_of_register();
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arch_timer_sched_clock_init();
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clocksource_of_init();
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}
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@ -1,6 +1,7 @@
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/*
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* Versatile Express V2M Motherboard Support
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*/
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#include <linux/clocksource.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/mmci.h>
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@ -23,7 +24,6 @@
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#include <linux/regulator/machine.h>
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#include <linux/vexpress.h>
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#include <asm/arch_timer.h>
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#include <asm/mach-types.h>
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#include <asm/sizes.h>
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#include <asm/mach/arch.h>
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@ -446,10 +446,7 @@ static void __init v2m_dt_timer_init(void)
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irq_of_parse_and_map(node, 0));
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}
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arch_timer_of_register();
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if (arch_timer_sched_clock_init() != 0)
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versatile_sched_clock_init(vexpress_get_24mhz_clock_base(),
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versatile_sched_clock_init(vexpress_get_24mhz_clock_base(),
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24000000);
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}
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@ -23,21 +23,13 @@
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#include <linux/of_platform.h>
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#include <linux/smp.h>
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#include <asm/arch_timer.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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static void __init virt_init(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static void __init virt_timer_init(void)
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{
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WARN_ON(arch_timer_of_register() != 0);
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WARN_ON(arch_timer_sched_clock_init() != 0);
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}
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static const char *virt_dt_match[] = {
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"linux,dummy-virt",
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NULL
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@ -47,7 +39,6 @@ extern struct smp_operations virt_smp_ops;
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DT_MACHINE_START(VIRT, "Dummy Virtual Machine")
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.init_irq = irqchip_init,
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.init_time = virt_timer_init,
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.init_machine = virt_init,
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.smp = smp_ops(virt_smp_ops),
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.dt_compat = virt_dt_match,
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@ -130,4 +130,9 @@ static inline u64 arch_counter_get_cntvct(void)
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return cval;
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}
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static inline int arch_timer_arch_init(void)
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{
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return 0;
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}
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#endif
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@ -32,6 +32,7 @@
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#include <linux/timer.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/clocksource.h>
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#include <clocksource/arm_arch_timer.h>
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@ -77,10 +78,11 @@ void __init time_init(void)
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{
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u32 arch_timer_rate;
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if (arch_timer_init())
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panic("Unable to initialise architected timer.\n");
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clocksource_of_init();
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arch_timer_rate = arch_timer_get_rate();
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if (!arch_timer_rate)
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panic("Unable to initialise architected timer.\n");
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/* Cache the sched_clock multiplier to save a divide in the hot path. */
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sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;
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@ -62,6 +62,7 @@ config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
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config ARM_ARCH_TIMER
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bool
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select CLKSRC_OF if OF
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config CLKSRC_METAG_GENERIC
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def_bool y if METAG
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@ -337,22 +337,14 @@ out:
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return err;
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}
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static const struct of_device_id arch_timer_of_match[] __initconst = {
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{ .compatible = "arm,armv7-timer", },
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{ .compatible = "arm,armv8-timer", },
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{},
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};
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int __init arch_timer_init(void)
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static void __init arch_timer_init(struct device_node *np)
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{
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struct device_node *np;
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u32 freq;
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int i;
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np = of_find_matching_node(NULL, arch_timer_of_match);
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if (!np) {
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pr_err("arch_timer: can't find DT node\n");
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return -ENODEV;
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if (arch_timer_get_rate()) {
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pr_warn("arch_timer: multiple nodes in dt, skipping\n");
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return;
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}
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/* Try to determine the frequency from the device tree or CNTFRQ */
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@ -378,7 +370,7 @@ int __init arch_timer_init(void)
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if (!arch_timer_ppi[PHYS_SECURE_PPI] ||
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!arch_timer_ppi[PHYS_NONSECURE_PPI]) {
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pr_warn("arch_timer: No interrupt available, giving up\n");
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return -EINVAL;
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return;
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}
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}
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@ -387,5 +379,8 @@ int __init arch_timer_init(void)
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else
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arch_timer_read_counter = arch_counter_get_cntpct;
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return arch_timer_register();
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arch_timer_register();
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arch_timer_arch_init();
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}
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CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_init);
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CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_init);
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@ -31,18 +31,12 @@
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#ifdef CONFIG_ARM_ARCH_TIMER
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extern int arch_timer_init(void);
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extern u32 arch_timer_get_rate(void);
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extern u64 (*arch_timer_read_counter)(void);
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extern struct timecounter *arch_timer_get_timecounter(void);
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#else
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static inline int arch_timer_init(void)
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{
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return -ENXIO;
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}
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static inline u32 arch_timer_get_rate(void)
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{
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return 0;
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