mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-16 09:13:55 +08:00
Char: cyclades, add firmware loading
cyclades, add firmware loading Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Jiri Slaby
Linus Torvalds
parent
cf3a386c08
commit
054f5b0aaa
@ -646,6 +646,7 @@
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/bitops.h>
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#include <linux/firmware.h>
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#include <asm/system.h>
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#include <asm/io.h>
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@ -680,6 +681,44 @@ static void cy_send_xchar(struct tty_struct *tty, char ch);
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#define STD_COM_FLAGS (0)
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/* firmware stuff */
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#define ZL_MAX_BLOCKS 16
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#define DRIVER_VERSION 0x02010203
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#define RAM_SIZE 0x80000
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#define Z_FPGA_LOADED(X) ((readl(&(X)->init_ctrl) & (1<<17)) != 0)
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enum zblock_type {
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ZBLOCK_PRG = 0,
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ZBLOCK_FPGA = 1
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};
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struct zfile_header {
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char name[64];
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char date[32];
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char aux[32];
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u32 n_config;
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u32 config_offset;
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u32 n_blocks;
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u32 block_offset;
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u32 reserved[9];
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} __attribute__ ((packed));
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struct zfile_config {
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char name[64];
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u32 mailbox;
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u32 function;
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u32 n_blocks;
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u32 block_list[ZL_MAX_BLOCKS];
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} __attribute__ ((packed));
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struct zfile_block {
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u32 type;
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u32 file_offset;
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u32 ram_offset;
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u32 size;
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} __attribute__ ((packed));
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static struct tty_driver *cy_serial_driver;
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#ifdef CONFIG_ISA
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@ -4735,17 +4774,295 @@ static int __init cy_detect_isa(void)
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} /* cy_detect_isa */
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#ifdef CONFIG_PCI
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static void __devinit plx_init(void __iomem * addr, __u32 initctl)
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static inline int __devinit cyc_isfwstr(const char *str, unsigned int size)
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{
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unsigned int a;
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for (a = 0; a < size && *str; a++, str++)
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if (*str & 0x80)
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return -EINVAL;
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for (; a < size; a++, str++)
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if (*str)
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return -EINVAL;
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return 0;
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}
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static inline void __devinit cyz_fpga_copy(void __iomem *fpga, u8 *data,
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unsigned int size)
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{
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for (; size > 0; size--) {
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cy_writel(fpga, *data++);
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udelay(10);
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}
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}
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static void __devinit plx_init(struct pci_dev *pdev, int irq,
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struct RUNTIME_9060 __iomem *addr)
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{
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/* Reset PLX */
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cy_writel(addr + initctl, readl(addr + initctl) | 0x40000000);
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cy_writel(&addr->init_ctrl, readl(&addr->init_ctrl) | 0x40000000);
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udelay(100L);
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cy_writel(addr + initctl, readl(addr + initctl) & ~0x40000000);
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cy_writel(&addr->init_ctrl, readl(&addr->init_ctrl) & ~0x40000000);
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/* Reload Config. Registers from EEPROM */
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cy_writel(addr + initctl, readl(addr + initctl) | 0x20000000);
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cy_writel(&addr->init_ctrl, readl(&addr->init_ctrl) | 0x20000000);
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udelay(100L);
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cy_writel(addr + initctl, readl(addr + initctl) & ~0x20000000);
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cy_writel(&addr->init_ctrl, readl(&addr->init_ctrl) & ~0x20000000);
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/* For some yet unknown reason, once the PLX9060 reloads the EEPROM,
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* the IRQ is lost and, thus, we have to re-write it to the PCI config.
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* registers. This will remain here until we find a permanent fix.
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*/
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pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, irq);
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}
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static int __devinit __cyz_load_fw(const struct firmware *fw,
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const char *name, const u32 mailbox, void __iomem *base,
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void __iomem *fpga)
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{
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void *ptr = fw->data;
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struct zfile_header *h = ptr;
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struct zfile_config *c, *cs;
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struct zfile_block *b, *bs;
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unsigned int a, tmp, len = fw->size;
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#define BAD_FW KERN_ERR "Bad firmware: "
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if (len < sizeof(*h)) {
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printk(BAD_FW "too short: %u<%zu\n", len, sizeof(*h));
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return -EINVAL;
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}
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cs = ptr + h->config_offset;
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bs = ptr + h->block_offset;
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if ((void *)(cs + h->n_config) > ptr + len ||
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(void *)(bs + h->n_blocks) > ptr + len) {
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printk(BAD_FW "too short");
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return -EINVAL;
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}
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if (cyc_isfwstr(h->name, sizeof(h->name)) ||
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cyc_isfwstr(h->date, sizeof(h->date))) {
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printk(BAD_FW "bad formatted header string\n");
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return -EINVAL;
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}
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if (strncmp(name, h->name, sizeof(h->name))) {
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printk(BAD_FW "bad name '%s' (expected '%s')\n", h->name, name);
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return -EINVAL;
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}
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tmp = 0;
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for (c = cs; c < cs + h->n_config; c++) {
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for (a = 0; a < c->n_blocks; a++)
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if (c->block_list[a] > h->n_blocks) {
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printk(BAD_FW "bad block ref number in cfgs\n");
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return -EINVAL;
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}
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if (c->mailbox == mailbox && c->function == 0) /* 0 is normal */
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tmp++;
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}
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if (!tmp) {
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printk(BAD_FW "nothing appropriate\n");
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return -EINVAL;
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}
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for (b = bs; b < bs + h->n_blocks; b++)
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if (b->file_offset + b->size > len) {
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printk(BAD_FW "bad block data offset\n");
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return -EINVAL;
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}
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/* everything is OK, let's seek'n'load it */
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for (c = cs; c < cs + h->n_config; c++)
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if (c->mailbox == mailbox && c->function == 0)
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break;
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for (a = 0; a < c->n_blocks; a++) {
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b = &bs[c->block_list[a]];
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if (b->type == ZBLOCK_FPGA) {
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if (fpga != NULL)
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cyz_fpga_copy(fpga, ptr + b->file_offset,
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b->size);
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} else {
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if (base != NULL)
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memcpy_toio(base + b->ram_offset,
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ptr + b->file_offset, b->size);
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}
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}
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#undef BAD_FW
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return 0;
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}
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static int __devinit cyz_load_fw(struct pci_dev *pdev, void __iomem *base_addr,
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struct RUNTIME_9060 __iomem *ctl_addr, int irq)
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{
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const struct firmware *fw;
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struct FIRM_ID __iomem *fid = base_addr + ID_ADDRESS;
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struct CUSTOM_REG __iomem *cust = base_addr;
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struct ZFW_CTRL __iomem *pt_zfwctrl;
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u8 *tmp;
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u32 mailbox, status;
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unsigned int i;
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int retval;
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retval = request_firmware(&fw, "cyzfirm.bin", &pdev->dev);
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if (retval) {
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dev_err(&pdev->dev, "can't get firmware\n");
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goto err;
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}
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/* Check whether the firmware is already loaded and running. If
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positive, skip this board */
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if (Z_FPGA_LOADED(ctl_addr) && readl(&fid->signature) == ZFIRM_ID) {
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u32 cntval = readl(base_addr + 0x190);
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udelay(100);
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if (cntval != readl(base_addr + 0x190)) {
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/* FW counter is working, FW is running */
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dev_dbg(&pdev->dev, "Cyclades-Z FW already loaded. "
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"Skipping board.\n");
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retval = 0;
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goto err_rel;
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}
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}
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/* start boot */
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cy_writel(&ctl_addr->intr_ctrl_stat, readl(&ctl_addr->intr_ctrl_stat) &
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~0x00030800UL);
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mailbox = readl(&ctl_addr->mail_box_0);
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if (mailbox == 0 || Z_FPGA_LOADED(ctl_addr)) {
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/* stops CPU and set window to beginning of RAM */
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cy_writel(&ctl_addr->loc_addr_base, WIN_CREG);
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cy_writel(&cust->cpu_stop, 0);
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cy_writel(&ctl_addr->loc_addr_base, WIN_RAM);
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udelay(100);
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}
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plx_init(pdev, irq, ctl_addr);
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if (mailbox != 0) {
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/* load FPGA */
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retval = __cyz_load_fw(fw, "Cyclom-Z", mailbox, NULL,
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base_addr);
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if (retval)
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goto err_rel;
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if (!Z_FPGA_LOADED(ctl_addr)) {
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dev_err(&pdev->dev, "fw upload successful, but fw is "
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"not loaded\n");
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goto err_rel;
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}
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}
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/* stops CPU and set window to beginning of RAM */
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cy_writel(&ctl_addr->loc_addr_base, WIN_CREG);
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cy_writel(&cust->cpu_stop, 0);
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cy_writel(&ctl_addr->loc_addr_base, WIN_RAM);
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udelay(100);
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/* clear memory */
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for (tmp = base_addr; (void *)tmp < base_addr + RAM_SIZE; tmp++)
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cy_writeb(tmp, 255);
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if (mailbox != 0) {
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/* set window to last 512K of RAM */
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cy_writel(&ctl_addr->loc_addr_base, WIN_RAM + RAM_SIZE);
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//sleep(1);
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for (tmp = base_addr; (void *)tmp < base_addr + RAM_SIZE; tmp++)
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cy_writeb(tmp, 255);
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/* set window to beginning of RAM */
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cy_writel(&ctl_addr->loc_addr_base, WIN_RAM);
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//sleep(1);
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}
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retval = __cyz_load_fw(fw, "Cyclom-Z", mailbox, base_addr, NULL);
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release_firmware(fw);
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if (retval)
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goto err;
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/* finish boot and start boards */
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cy_writel(&ctl_addr->loc_addr_base, WIN_CREG);
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cy_writel(&cust->cpu_start, 0);
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cy_writel(&ctl_addr->loc_addr_base, WIN_RAM);
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i = 0;
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while ((status = readl(&fid->signature)) != ZFIRM_ID && i++ < 40)
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msleep(100);
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if (status != ZFIRM_ID) {
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if (status == ZFIRM_HLT) {
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dev_err(&pdev->dev, "you need an external power supply "
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"for this number of ports. Firmware halted and "
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"board reset.\n");
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retval = -EIO;
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goto err;
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}
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dev_warn(&pdev->dev, "fid->signature = 0x%x... Waiting "
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"some more time\n", status);
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while ((status = readl(&fid->signature)) != ZFIRM_ID &&
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i++ < 200)
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msleep(100);
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if (status != ZFIRM_ID) {
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dev_err(&pdev->dev, "Board not started in 20 seconds! "
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"Giving up. (fid->signature = 0x%x)\n",
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status);
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dev_info(&pdev->dev, "*** Warning ***: if you are "
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"upgrading the FW, please power cycle the "
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"system before loading the new FW to the "
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"Cyclades-Z.\n");
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if (Z_FPGA_LOADED(ctl_addr))
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plx_init(pdev, irq, ctl_addr);
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retval = -EIO;
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goto err;
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}
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dev_dbg(&pdev->dev, "Firmware started after %d seconds.\n",
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i / 10);
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}
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pt_zfwctrl = base_addr + readl(&fid->zfwctrl_addr);
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dev_dbg(&pdev->dev, "fid=> %p, zfwctrl_addr=> %x, npt_zfwctrl=> %p\n",
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base_addr + ID_ADDRESS, readl(&fid->zfwctrl_addr),
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base_addr + readl(&fid->zfwctrl_addr));
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dev_info(&pdev->dev, "Cyclades-Z FW loaded: version = %x, ports = %u\n",
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readl(&pt_zfwctrl->board_ctrl.fw_version),
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readl(&pt_zfwctrl->board_ctrl.n_channel));
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if (readl(&pt_zfwctrl->board_ctrl.n_channel) == 0) {
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dev_warn(&pdev->dev, "no Cyclades-Z ports were found. Please "
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"check the connection between the Z host card and the "
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"serial expanders.\n");
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if (Z_FPGA_LOADED(ctl_addr))
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plx_init(pdev, irq, ctl_addr);
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dev_info(&pdev->dev, "Null number of ports detected. Board "
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"reset.\n");
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retval = 0;
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goto err;
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}
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cy_writel(&pt_zfwctrl->board_ctrl.op_system, C_OS_LINUX);
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cy_writel(&pt_zfwctrl->board_ctrl.dr_version, DRIVER_VERSION);
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/*
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Early firmware failed to start looking for commands.
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This enables firmware interrupts for those commands.
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*/
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cy_writel(&ctl_addr->intr_ctrl_stat, readl(&ctl_addr->intr_ctrl_stat) |
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(1 << 17));
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cy_writel(&ctl_addr->intr_ctrl_stat, readl(&ctl_addr->intr_ctrl_stat) |
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0x00030800UL);
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plx_init(pdev, irq, ctl_addr);
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return 0;
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err_rel:
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release_firmware(fw);
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err:
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return retval;
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}
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static int __devinit cy_pci_probe(struct pci_dev *pdev,
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@ -4827,16 +5144,9 @@ static int __devinit cy_pci_probe(struct pci_dev *pdev,
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}
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/* Disable interrupts on the PLX before resetting it */
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cy_writew(addr0 + 0x68,
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readw(addr0 + 0x68) & ~0x0900);
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cy_writew(addr0 + 0x68, readw(addr0 + 0x68) & ~0x0900);
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plx_init(addr0, 0x6c);
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/* For some yet unknown reason, once the PLX9060 reloads
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the EEPROM, the IRQ is lost and, thus, we have to
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re-write it to the PCI config. registers.
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This will remain here until we find a permanent
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fix. */
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pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, irq);
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plx_init(pdev, irq, addr0);
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mailbox = (u32)readl(&ctl_addr->mail_box_0);
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@ -4877,6 +5187,9 @@ static int __devinit cy_pci_probe(struct pci_dev *pdev,
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if ((mailbox == ZO_V1) || (mailbox == ZO_V2))
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cy_writel(addr2 + ID_ADDRESS, 0L);
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retval = cyz_load_fw(pdev, addr2, addr0, irq);
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if (retval)
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goto err_unmap;
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/* This must be a Cyclades-8Zo/PCI. The extendable
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version will have a different device_id and will
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be allocated its maximum number of ports. */
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@ -4953,15 +5266,7 @@ static int __devinit cy_pci_probe(struct pci_dev *pdev,
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case PLX_9060:
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case PLX_9080:
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default: /* Old boards, use PLX_9060 */
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plx_init(addr0, 0x6c);
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/* For some yet unknown reason, once the PLX9060 reloads
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the EEPROM, the IRQ is lost and, thus, we have to
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re-write it to the PCI config. registers.
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This will remain here until we find a permanent
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fix. */
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pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, irq);
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plx_init(pdev, irq, addr0);
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cy_writew(addr0 + 0x68, readw(addr0 + 0x68) | 0x0900);
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break;
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}
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