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dmaengine: xilinx_dma: Extend dma_config structure to store max channel count
Extend dma_config structure to store the max channel count. This input is used to populate dma device channel nodes at the fixed offset. It serves as a preparatory patch for removing dma channel DT node order dependency, added in the subsequent commit. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Link: https://lore.kernel.org/r/1580388865-9960-2-git-send-email-radhey.shyam.pandey@xilinx.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -125,7 +125,9 @@
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#define XILINX_VDMA_ENABLE_VERTICAL_FLIP BIT(0)
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/* HW specific definitions */
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#define XILINX_DMA_MAX_CHANS_PER_DEVICE 0x20
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#define XILINX_MCDMA_MAX_CHANS_PER_DEVICE 0x20
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#define XILINX_DMA_MAX_CHANS_PER_DEVICE 0x2
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#define XILINX_CDMA_MAX_CHANS_PER_DEVICE 0x1
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#define XILINX_DMA_DMAXR_ALL_IRQ_MASK \
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(XILINX_DMA_DMASR_FRM_CNT_IRQ | \
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@ -468,6 +470,7 @@ struct xilinx_dma_config {
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struct clk **tx_clk, struct clk **txs_clk,
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struct clk **rx_clk, struct clk **rxs_clk);
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irqreturn_t (*irq_handler)(int irq, void *data);
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const int max_channels;
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};
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/**
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@ -2939,23 +2942,27 @@ static const struct xilinx_dma_config axidma_config = {
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.dmatype = XDMA_TYPE_AXIDMA,
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.clk_init = axidma_clk_init,
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.irq_handler = xilinx_dma_irq_handler,
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.max_channels = XILINX_DMA_MAX_CHANS_PER_DEVICE,
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};
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static const struct xilinx_dma_config aximcdma_config = {
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.dmatype = XDMA_TYPE_AXIMCDMA,
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.clk_init = axidma_clk_init,
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.irq_handler = xilinx_mcdma_irq_handler,
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.max_channels = XILINX_MCDMA_MAX_CHANS_PER_DEVICE,
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};
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static const struct xilinx_dma_config axicdma_config = {
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.dmatype = XDMA_TYPE_CDMA,
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.clk_init = axicdma_clk_init,
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.irq_handler = xilinx_dma_irq_handler,
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.max_channels = XILINX_CDMA_MAX_CHANS_PER_DEVICE,
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};
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static const struct xilinx_dma_config axivdma_config = {
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.dmatype = XDMA_TYPE_VDMA,
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.clk_init = axivdma_clk_init,
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.irq_handler = xilinx_dma_irq_handler,
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.max_channels = XILINX_DMA_MAX_CHANS_PER_DEVICE,
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};
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static const struct of_device_id xilinx_dma_of_ids[] = {
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