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drm/amd/display: Use macro for invalid OPP ID

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[WHY]
This is meant to make it clearer that 0xf is not a valid OPP ID, and
that code making use of OPP IDs should not accept this value.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wesley Chalmers 2019-05-23 11:54:12 -04:00 committed by Alex Deucher
parent c5509aadcf
commit 043f5bb630
5 changed files with 9 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
View File

@ -63,7 +63,7 @@ void hubp1_set_blank(struct hubp *hubp, bool blank)
}
hubp->mpcc_id = 0xf;
hubp->opp_id = 0xf;
hubp->opp_id = OPP_ID_INVALID;
}
}
@ -1253,7 +1253,7 @@ void dcn10_hubp_construct(
hubp1->hubp_shift = hubp_shift;
hubp1->hubp_mask = hubp_mask;
hubp1->base.inst = inst;
hubp1->base.opp_id = 0xf;
hubp1->base.opp_id = OPP_ID_INVALID;
hubp1->base.mpcc_id = 0xf;
}

4
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View File

@ -1086,7 +1086,7 @@ static void dcn10_init_pipes(struct dc *dc, struct dc_state *context)
pipe_ctx->plane_res.dpp = dpp;
pipe_ctx->plane_res.mpcc_inst = dpp->inst;
hubp->mpcc_id = dpp->inst;
hubp->opp_id = 0xf;
hubp->opp_id = OPP_ID_INVALID;
hubp->power_gated = false;
dc->res_pool->opps[i]->mpc_tree_params.opp_id = dc->res_pool->opps[i]->inst;
@ -2437,7 +2437,7 @@ static void dcn10_apply_ctx_for_surface(
if (pipe_ctx->plane_state && !old_pipe_ctx->plane_state) {
if (old_pipe_ctx->stream_res.tg == tg &&
old_pipe_ctx->plane_res.hubp &&
old_pipe_ctx->plane_res.hubp->opp_id != 0xf)
old_pipe_ctx->plane_res.hubp->opp_id != OPP_ID_INVALID)
dcn10_disable_plane(dc, old_pipe_ctx);
}

2
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
View File

@ -694,7 +694,7 @@ bool hubp2_construct(
hubp2->hubp_shift = hubp_shift;
hubp2->hubp_mask = hubp_mask;
hubp2->base.inst = inst;
hubp2->base.opp_id = 0xf;
hubp2->base.opp_id = OPP_ID_INVALID;
hubp2->base.mpcc_id = 0xf;
return true;

4
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
View File

@ -605,7 +605,7 @@ static void dcn20_init_hw(struct dc *dc)
pipe_ctx->plane_res.dpp = dpp;
pipe_ctx->plane_res.mpcc_inst = dpp->inst;
hubp->mpcc_id = dpp->inst;
hubp->opp_id = 0xf;
hubp->opp_id = OPP_ID_INVALID;
hubp->power_gated = false;
pipe_ctx->stream_res.opp = NULL;
@ -1307,7 +1307,7 @@ static void dcn20_apply_ctx_for_surface(
if (pipe_ctx->plane_state && !old_pipe_ctx->plane_state) {
if (old_pipe_ctx->stream_res.tg == tg &&
old_pipe_ctx->plane_res.hubp &&
old_pipe_ctx->plane_res.hubp->opp_id != 0xf)
old_pipe_ctx->plane_res.hubp->opp_id != OPP_ID_INVALID)
dcn20_disable_plane(dc, old_pipe_ctx);
}

2
drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
View File

@ -28,6 +28,8 @@
#include "mem_input.h"
#define OPP_ID_INVALID 0xf
enum cursor_pitch {
CURSOR_PITCH_64_PIXELS = 0,