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clk: meson-gxbb: expose spdif master clock

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Expose the spdif master clock and the mux to select the appropriate spdif
clock parent depending on the data source.

Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
This commit is contained in:
Jerome Brunet 2017-03-02 15:23:38 +01:00
parent b4d44cdcaf
commit 0420dbb5ac
2 changed files with 4 additions and 2 deletions
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4
drivers/clk/meson/gxbb.h
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@ -280,10 +280,10 @@
/* CLKID_CTS_AMCLK */
#define CLKID_CTS_AMCLK_SEL 108
#define CLKID_CTS_AMCLK_DIV 109
#define CLKID_CTS_MCLK_I958 110
/* CLKID_CTS_MCLK_I958 */
#define CLKID_CTS_MCLK_I958_SEL 111
#define CLKID_CTS_MCLK_I958_DIV 112
#define CLKID_CTS_I958 113
/* CLKID_CTS_I958 */
#define NR_CLKS 114

2
include/dt-bindings/clock/gxbb-clkc.h
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@ -45,5 +45,7 @@
#define CLKID_MALI_1 105
#define CLKID_MALI 106
#define CLKID_CTS_AMCLK 107
#define CLKID_CTS_MCLK_I958 110
#define CLKID_CTS_I958 113
#endif /* __GXBB_CLKC_H */